On SI/CI/AI, driver still need to release smu's fw,
it was not related to other hw ip's fw load_type.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay
initialize gfx/sdma before dpm features enabled.
and disable dpm features before gfx/sdma fini.
Acked-by: Alex Deucher
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/cik.c | 17 +
drivers/gpu/drm/amd/amdgpu/si.c| 13 +++--
drivers/gpu/drm/amd/amdgpu/soc15.c
. start_smu, used for load smu firmware in smu7/8 and
check smu firmware version.
2. request_smu_load_fw, used for load other ip's firmware
on smu7/8 and add firmware loading staus check.
v2: release ucode bo when gfx hw fini.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0
Following lm-sensors 3.0.0,
Only enable pwm1 sysfs when fan control mode(pwm1_enable)
in manual
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu
Add fan1_target for get/set fan speed in RPM unit
Add fan1_min/fan1_max for get min, max fan speed in RPM unit
Add fan1_enable to enable/disable the fan1 sensor
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h| 3 +
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
the condition always false and the code
path never be executed. so remove them.
v2: add comments
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c| 1 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 5
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index a3e2ed1..12e577c 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b
1. make uvd_v7_0_enc_get_destroy_msg static
2. drop a function variable that always true
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 10 +++---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 12
2 files changed, 7 insertions(+), 15 deletions(-)
diff --git
1. make uvd_v7_0_enc_get_destroy_msg static
2. drop a function variable that always true
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 10 +++---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 12
2 files changed, 7 insertions(+), 15 deletions(-)
diff --git
on smu7/8 and add firmware loading staus check.
v2: default fw loading type is via smu for VI, driver call smu
to load all fw at the begin of hw init.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vi.c| 16 ++
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
. As the smu has been hang, so the dgpu resume
will failed.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm
initialize gfx/sdma before dpm features enabled.
and disable dpm features before gfx/sdma fini.
Acked-by: Alex Deucher
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/cik.c | 17 +
drivers/gpu/drm/amd/amdgpu/si.c| 13 +++--
drivers/gpu/drm/amd/amdgpu/soc15.c
on smu7/8 and add firmware loading staus check.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +++-
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 14 +++--
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 4 +-
.../gpu/drm/amd/powerplay/smumgr
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c| 1 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 5 -
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 5 -
4 files changed, 12 deletions
HW CG feature will be enabled after hw ip initialized
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
b/drivers/gpu/drm/amd/powerplay/smumgr
SDMA IP can be power up/down via smu message
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 8
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
3 files changed, 27
the vcn power will be controlled by VCN.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
b/drivers/gpu/drm/amd/powerplay
smu only expose interface to other ip blocks.
in order to reduce dependence between smu and other ip blocks
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 1 +
drivers/gpu/drm/amd/powerplay
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 8ef4a53..2ceab76 100644
the vcn power will be controlled by VCN.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
b/drivers/gpu/drm/amd/powerplay
SDMA IP can be power up/down via smu message
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 8
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
3 files changed, 27
smu only expose interface to other ip blocks.
in order to reduce dependence between smu and other ip blocks
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 1 +
drivers/gpu/drm/amd/powerplay
Partially revert:
commit 91079a250cbe ("drm/amdgpu: Change the gfx/sdma init/fini sequence")'
drm/amdgpu: Change the gfx/sdma init/fini sequence
Currently sdma ip is power up when smu hw init, so can't change
the hw sequence on Rv.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdg
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 9da4a1b..517a721 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b
initialize gfx/sdma before dpm features enabled.
and disable dpm features before gfx/sdma fini.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/cik.c | 17 +
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +--
drivers/gpu/drm/amd/amdgpu/si.c
Need to disable dpm features before halt rlc.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 14 +
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 37
2 files changed, 33 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu
before halt rlc/cp, need to
1. enter rlc safe mode
2. wait rlc/cp idle
Signed-off-by: Hang Zhou
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 86 ---
1 file changed, 59 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
the CG related registers have been programed in golden setting
PG register default value is 0.
Signed-off-by: Hang Zhou
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
User can set fan's revolution per minute via
fan1_input.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h| 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 28 +-
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 1 +
drivers/gpu/drm/amd
set the target rpm value to wrong register.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
The minRPM speed maybe equal to zero. so need to check
input RPM not equal to 0, otherwise cause divide-by-zero driver crash.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
Honour display's request for min engine clock/memory clock.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 25 +++
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
b/drivers/gpu
this can avoid hard hang and be useful for debug.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
b/drivers/gpu/drm/amd/powerplay
interface to set power state task
either dpm enabled or powerplay enabled
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display
change function name gfx_v6/7/8/9_0_gpu_init to
gfx_v6/7/8/9_0_constants_init.
this function is just for init gfx constants such
as max pipes, render backends...
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 10
This is required by gfx hw and can fix the rlc hang when
do s3 stree test on Cz/St.
Signed-off-by: Hang Zhou
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b
when hw_fini/suspend, smu only need to power on uvd block
if uvd pg is supported, don't need to call uvd to do hw_init.
v2: fix typo in patch descriptions.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
For SI/Kv, the power state is managed by function
amdgpu_pm_compute_clocks.
when dpm enabled, we should call amdgpu_pm_compute_clocks
to update current power state instand of set boot state.
this change can fix the oops when kfd driver was enabled on Kv.
Signed-off-by: Rex Zhu
---
drivers/gpu
Forgot to add vce pg support via smu for Kaveri/Mullins.
Fixes: 561a5c83eadd ("drm/amd/pp: Unify powergate_uvd/vce/mmhub
to set_powergating_by_smu")
v2: refine patch descriptions suggested by Michel
Tested-by: Michel Dänzer
Signed-off-by: Rex Zhu
---
drive
As we have unify powergate_uvd/vce/mmhub to set_powergating_by_smu,
and set_powergating_by_smu was supported by both dpm and powerplay.
so remove the else case.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 35 --
1 file changed, 35
when hw_fini/suspend, smu only need to power up uvd block
if uvd pg is supported, don't need to call vce to do hw_init.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
b
Forgot to add vce pg support via smu for Kaveri/Mullins.
Regresstion issue caused by
'commit 561a5c83eadd ("drm/amd/pp: Unify powergate_uvd/vce/mmhub
to set_powergating_by_smu")'
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 41 +++
when ac/dc switch, driver will be notified by acpi event.
then the power source will be updated. so don't need to
get power source when set power state.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm
1. initialize kiq before initialize gfx ring.
2. set kiq ring ready immediately when kiq initialize
successfully.
3. split function gfx_v9_0_kiq_resume into two functions.
gfx_v9_0_kiq_resume is for kiq initialize.
gfx_v9_0_kcq_resume is for kcq initialize.
Signed-off-by: Rex Zhu
1. initialize kiq before initialize gfx ring.
2. set kiq ring ready immediately when kiq initialize
successfully.
3. split function gfx_v8_0_kiq_resume into two functions.
gfx_v8_0_kiq_resume is for kiq initialize.
gfx_v8_0_kcq_resume is for kcq initialize.
Signed-off-by: Rex Zhu
Deucher
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index
In function ‘gfx_v9_0_check_fw_write_wait’:
warning: enumeration value ‘CHIP_TAHITI’ not handled in switch [-Wswitch]
Always add default case in case there is no match
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers
Deucher
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index
Send all kcq unmap_queue packets and then wait for
complete.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 33 -
1 file changed, 16 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd
There are no any logical changes here.
1. if kcq can be enabled via kiq, we don't need to
do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
sync the ring complete, remove the duplicate code.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 72
Send all kcq unmap_queue packets and then wait for
complete.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 29 +++--
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu
There are no any logical changes here.
1. if kcq can be enabled via kiq, we don't need to
do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
sync the ring complete, remove the duplicate code.
v2: alloc 6 (not 7) dws for unmap_queues
Signed-off-by: Rex Zhu
---
drivers/gpu
There are no any logical changes here.
1. if kcq can be enabled via kiq, we don't need to
do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
sync the ring complete, remove the duplicate code.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 80
Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.
Pointed out by Francis David
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
Unify to set power ungate state before suspend/fini.
Remove the workaround code for gfx off feature in
amdgpu_device.c.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 11 +--
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4
drivers/gpu/drm/amd/amdgpu
there is no logical change in this patch.
1. change function names:
amdgpu_device_ip_late_set_pg/cg_state to
amdgpu_device_set_pg/cg_state.
2. add a function argument cg/pg_state, so
we can enable/disable cg/pg through those functions
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd
After set power ungate state, set clock ungate state
before driver suspend or fini.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 56 +++---
1 file changed, 5 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Cancel the delay work to avoid the corner case that
ib test was not running when suspend
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu
Also ajust the gfx donamin voltage on Tonga when user overdriver
the voltage.
For Tonga, Driver do not update user's setting to voltage table
in smu, we only pick up a minimum value from voltage table that
not less than the user's setting.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd
there may be gfx off delay work pending when suspend/driver
unload, need to cancel them first.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu
Different from ordinary stoney,For Stoney Fanless,
smu firmware do not poweron/off acp tiles, so need to
poweron/off acp in driver.
Partially revert
'commit f766dd23e5ce ("drm/amdgpu/acp: Powrgate acp via smu")'
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_a
use amdgpu_gfx_off_ctrl function so driver can arbitrate
whether the gfx ip can be power off or power on.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 6 ++
2 files changed, 4 insertions(+), 8 deletions
this patch is a workaround for the gpu hang
at video end time if play video with gfx off enabled.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu
delay to enable gfx off feature to avoid gfx on/off frequently
suggested by Alex and Evan.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 8 ++--
3
v2:
1. drop the special handling for the hw IP
suggested by hawking and Christian.
2. refine the variable name suggested by Flora.
This funciton as the entry of gfx off ctrl feature.
we arbitrat gfx off feature enable/disable in this
function.
Signed-off-by: Rex Zhu
---
drivers/gpu
As gfx off is supported on Rv/Vega12, so this check is
helpful and necessary when visit gfx regesiter via mmio.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 10 +++
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 31 +-
2 files
gfx off support in smu can be via powergate_gfx interface.
so remove the gfx_off_control interface.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 1 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers
As more hw ip pg feature have been enabled(especial gfx off),
so need to check the hw power state before read/write registers
through mmio.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 1 +
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 21
this patch is a workaround for the gpu hang
at video end time if play video with gfx off enabled.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu
use amdgpu_gfx_off_ctrl function so driver can arbitrate
whether the gfx ip can be power off or power on.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 6 ++
2 files changed, 4 insertions(+), 8 deletions
delay to enable gfx off feature to avoid gfx on/off frequently
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 6 --
3 files changed, 21 insertions
This funciton as the entry of gfx off ctrl feature.
we arbitrat gfx off feature enable/disable in this
function.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 52
so driver can powergate acp block after asic initialized
to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index b5b66c3
Call smu to power gate/ungate acp instand of only
powr down acp tiles in acp block.
when smu power gate acp:
smu will turn off clock, power down acp tiles,check and
enter in ULV state.
when smu ungate acp:
smu will exit ulv, turn on clocks, power on acp tiles.
Signed-off-by: Rex Zhu
From: Vijendar Mukunda
Removed condition checks to skip the power gating feature for
stoney platform.
Signed-off-by: Vijendar Mukunda
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 53 -
1 file changed, 25 insertions(+), 28 deletions
when ACP block not enabled, we power off
acp block to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c| 18 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
From: Rex Zhu
if board uses AZ rather than ACP, we power down acp
through smu to save power.
v2: handle S3/S4 and hw_fini (Alex)
Signed-off-by: Rex Zhu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 20 +---
1 file changed, 17 insertions(+), 3
This test was reversed so it would end up leading to vddnb value
can't be read on APU.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu
the voltage showed in debugfs and hwmon should be in mV
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr
Only delete the dead temp variables in Polaris.
Signed-off-by: Rex Zhu
---
.../drm/amd/powerplay/smumgr/polaris10_smumgr.c| 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
b/drivers/gpu/drm
DIDTConfig_Polaris12[] table missed a big chunk of data.
Pointed by aidan.fabius
Signed-off-by: Rex Zhu
---
.../gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c | 43 ++
1 file changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c
b
if board uses AZ rather than ACP, we power down acp
through smu to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
b/drivers/gpu/drm/amd/amdgpu
when ACP block not enabled, we power off
acp block to save power.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c| 18 ++
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 -
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
This can fix the issue resume from S3, the user's OD setting
were reverted to default.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers
Use the vddc limit before read them from vbios
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr
avoid the error in dmesg:
[drm:dm_pp_get_static_clocks]
*ERROR* DM_PPLIB: invalid powerlevel state: 0!
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay
Except special naming as *_in_khz, The default clock unit in powerplay
is in 10KHz. so need to * 10 as expecting clock frequency in display
is in kHz.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
avoid the error in dmesg:
[drm:dm_pp_get_static_clocks]
*ERROR* DM_PPLIB: invalid powerlevel state: 0!
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
display can get clock info through this function.
implement this function for vega10 and old asics.
from vega12, there is no power state management. so need other
interface to notify display the clock info
Signed-off-by: Rex Zhu
---
.../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 2
The default clock unit in powerplay is 10KHz.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
so we can read/write the registers in CLK domain
through RREG32/WREG32_SOC15
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b
powerplay can notify smu to recalculates the maximum deep-sleep
divider that display allowed.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display
From: Rex Zhu
delete the same struct define in powerplay, share the struct
with display.
Acked-by: Alex Deucher
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/include/dm_pp_interface.h | 37 ++-
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 2 +-
drivers/gpu/drm
Set memory clocks same as soc clocks
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm
powerplay/dpm export all interfaces in struct amd_pm_funcs.
so call common exported interfaces instand of powerplay inner interfaces
Also not include header file hwmgr.h
Signed-off-by: Rex Zhu
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 80 +++---
1 file changed
From: Rex Zhu
Display can notify smu to enable pwe after gpu suspend.
It is used in case when display resumes from S3 and wants to start
audio driver by enabling pwe
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 7 ---
drivers/gpu/drm/amd/powerplay
From: Rex Zhu
Convert clock unit 10KHz to KHz as the data sturct defined.
e.g.
struct pp_clock_with_latency {
uint32_t clocks_in_khz;
uint32_t latency_in_us;
};
Meanwhile revert the same conversion in display side.
Acked-by: Alex Deucher
Acked-by: Harry Wentland
Signed-off
use ppfeaturemask to enable/disable stutter mode.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm
/disable this feature easily.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/include/amd_shared.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
User can enable/disable stutter mode through module parameter
stutter_mode.
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd
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