struct pp_hwmgr *hwmgr);
int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
int (*enable_mgpu_fan_boost)(struct pp_hwmgr *hwmgr);
+int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t
clock);
+int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
};
st
Looks reasonable to me.
Acked-by: Alex Deucher
From: Wu, Hersen
Sent: Wednesday, December 5, 2018 1:03:57 PM
To: amd-gfx@lists.freedesktop.org; Zhu, Rex; Deucher, Alexander
Subject: RE: [PATCH] drm/amd/powerplay: rv dal-pplib interface refactor
powerplay part
Hello, Alex, Rex,
Would you please help review the change?
Thanks,
Hersen
[WHY] clarify dal input parameters to pplib interface, remove un-used
parameters. dal knows exactly which parameters needed and their effects at
pplib and smu sides.
current dal sequence for dcn1_update_clock to
[WHY] clarify dal input parameters to pplib interface, remove
un-used parameters. dal knows exactly which parameters needed
and their effects at pplib and smu sides.
current dal sequence for dcn1_update_clock to pplib:
1.smu10_display_clock_voltage_request for dcefclk
