Unfortunately, further testing shows that this doesn't actually fix the
problem. FWIW, that test runs very reliably on SI with the radeon drm,
but with the amdgpu drm it fails. VI is fine on amdgpu, which is why I
was sent down this road.
Anyway, back to trying to figure this out :/
Cheers,
N
From: Nicolai Hähnle
Bring the code in line with what the radeon module does.
Without this change, the fence following the IB may be signalled
to the CPU even though some data written by shaders may not have
been written back yet.
This change fixes the OpenGL CTS test
GL45-CTS.gtf32.GL3Tests.pa