[PATCH 13/19] drm/amd/display: disconnect MPCC only on OTG change

[Qingqing Zhuo]

From: Ayush Gupta <ayugu...@amd.com>

[Why]
Framedrops are observed while playing Vp9 and Av1 10 bit
video on 8k resolution using VSR while playback controls
are disappeared/appeared

[How]
Now ODM 2 to 1 is disabled for 5k or greater resolutions on VSR.

Cc: sta...@vger.kernel.org
Cc: Mario Limonciello <mario.limoncie...@amd.com>
Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
Signed-off-by: Ayush Gupta <ayugu...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index f6f72e7c9e86..633491331722 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -1914,6 +1914,7 @@ int dcn32_populate_dml_pipes_from_context(
        struct pipe_ctx *pipe;
        bool subvp_in_use = false;
        struct dc_crtc_timing *timing;
+       bool vsr_odm_support = false;
 
        dcn20_populate_dml_pipes_from_context(dc, context, pipes, 
fast_validate);
 
@@ -1931,12 +1932,15 @@ int dcn32_populate_dml_pipes_from_context(
                timing = &pipe->stream->timing;
 
                pipes[pipe_cnt].pipe.dest.odm_combine_policy = 
dm_odm_combine_policy_dal;
+               vsr_odm_support = (res_ctx->pipe_ctx[i].stream->src.width >= 
5120 &&
+                               res_ctx->pipe_ctx[i].stream->src.width > 
res_ctx->pipe_ctx[i].stream->dst.width);
                if (context->stream_count == 1 &&
                                context->stream_status[0].plane_count == 1 &&
                                
!dc_is_hdmi_signal(res_ctx->pipe_ctx[i].stream->signal) &&
                                
is_h_timing_divisible_by_2(res_ctx->pipe_ctx[i].stream) &&
                                pipe->stream->timing.pix_clk_100hz * 100 > 
DCN3_2_VMIN_DISPCLK_HZ &&
-                               
dc->debug.enable_single_display_2to1_odm_policy) {
+                               dc->debug.enable_single_display_2to1_odm_policy 
&&
+                               !vsr_odm_support) { //excluding 2to1 ODM 
combine on >= 5k vsr
                        pipes[pipe_cnt].pipe.dest.odm_combine_policy = 
dm_odm_combine_policy_2to1;
                }
                pipe_cnt++;
-- 
2.34.1