From: Yongqiang Sun <yongqiang....@amd.com>

[Why]
vstartup calculation is incorrect due to use 2 number of cursors and
result in an underflow when playing video in full screen mode and
combines graphic plane and video plane.

[How]
Apply new policy for dml calculation.
1 cursor for graphic plane, 0 cursor for video plane.

Signed-off-by: Yongqiang Sun <yongqiang....@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c |  6 ++----
 .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 15 ++++++++++-----
 .../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c |  3 ++-
 .../drm/amd/display/dc/dml/display_mode_structs.h |  1 +
 4 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index a9a43b397db9..94ac34106776 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -299,7 +299,6 @@ void optc1_set_vtg_params(struct timing_generator *optc,
        uint32_t asic_blank_end;
        uint32_t v_init;
        uint32_t v_fp2 = 0;
-       int32_t vertical_line_start;
 
        struct optc *optc1 = DCN10TG_FROM_TG(optc);
 
@@ -316,9 +315,8 @@ void optc1_set_vtg_params(struct timing_generator *optc,
                        patched_crtc_timing.v_border_top;
 
        /* if VSTARTUP is before VSYNC, FP2 is the offset, otherwise 0 */
-       vertical_line_start = asic_blank_end - optc1->vstartup_start + 1;
-       if (vertical_line_start < 0)
-               v_fp2 = -vertical_line_start;
+       if (optc1->vstartup_start > asic_blank_end)
+               v_fp2 = optc1->vstartup_start - asic_blank_end;
 
        /* Interlace */
        if (REG(OTG_INTERLACE_CONTROL)) {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 4ce701877ffa..c629a7b45f56 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -153,6 +153,7 @@ struct _vcs_dpi_ip_params_st dcn2_0_ip = {
        .xfc_supported = true,
        .xfc_fill_bw_overhead_percent = 10.0,
        .xfc_fill_constant_bytes = 0,
+       .number_of_cursors = 1,
 };
 
 struct _vcs_dpi_ip_params_st dcn2_0_nv14_ip = {
@@ -220,7 +221,8 @@ struct _vcs_dpi_ip_params_st dcn2_0_nv14_ip = {
        .xfc_supported = true,
        .xfc_fill_bw_overhead_percent = 10.0,
        .xfc_fill_constant_bytes = 0,
-       .ptoi_supported = 0
+       .ptoi_supported = 0,
+       .number_of_cursors = 1,
 };
 
 struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc = {
@@ -2042,14 +2044,17 @@ int dcn20_populate_dml_pipes_from_context(
                /* todo: default max for now, until there is logic reflecting 
this in dc*/
                pipes[pipe_cnt].dout.output_bpc = 12;
                /*
-                * Use max cursor settings for calculations to minimize
+                * For graphic plane, cursor number is 1, nv12 is 0
                 * bw calculations due to cursor on/off
                 */
-               pipes[pipe_cnt].pipe.src.num_cursors = 2;
+               if (res_ctx->pipe_ctx[i].plane_state &&
+                               res_ctx->pipe_ctx[i].plane_state->address.type 
== PLN_ADDR_TYPE_VIDEO_PROGRESSIVE)
+                       pipes[pipe_cnt].pipe.src.num_cursors = 0;
+               else
+                       pipes[pipe_cnt].pipe.src.num_cursors = 
dc->dml.ip.number_of_cursors;
+
                pipes[pipe_cnt].pipe.src.cur0_src_width = 256;
                pipes[pipe_cnt].pipe.src.cur0_bpp = dm_cur_32bit;
-               pipes[pipe_cnt].pipe.src.cur1_src_width = 256;
-               pipes[pipe_cnt].pipe.src.cur1_bpp = dm_cur_32bit;
 
                if (!res_ctx->pipe_ctx[i].plane_state) {
                        pipes[pipe_cnt].pipe.src.is_hsplit = 
pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index c87eb7b9c060..158f7c8b55ae 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -156,7 +156,8 @@ struct _vcs_dpi_ip_params_st dcn2_1_ip = {
        .xfc_supported = false,
        .xfc_fill_bw_overhead_percent = 10.0,
        .xfc_fill_constant_bytes = 0,
-       .ptoi_supported = 0
+       .ptoi_supported = 0,
+       .number_of_cursors = 1,
 };
 
 struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 
b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
index a1d68e06cf21..dfd3be452766 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
@@ -204,6 +204,7 @@ struct _vcs_dpi_ip_params_st {
        unsigned int LineBufferFixedBpp;
        unsigned int 
can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one;
        unsigned int bug_forcing_LC_req_same_size_fixed;
+       unsigned int number_of_cursors;
 };
 
 struct _vcs_dpi_display_xfc_params_st {
-- 
2.25.1

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