[PATCH 16/19] drm/amd/display: fix wrong index used in dccg32_set_dpstreamclk

[Qingqing Zhuo]

From: Hersen Wu <hersenxs...@amd.com>

[Why & How]
When merging commit 8f6de23e03f1
("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming"),
index change was not picked up.

Cc: sta...@vger.kernel.org
Cc: Mario Limonciello <mario.limoncie...@amd.com>
Fixes: 8f6de23e03f1 ("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming")
Reviewed-by: Qingqing Zhuo <qingqing.z...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
Signed-off-by: Hersen Wu <hersenxs...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c 
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
index 5dbef498580b..ffbb739d85b6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
@@ -293,8 +293,7 @@ static void dccg32_set_dpstreamclk(
        dccg32_set_dtbclk_p_src(dccg, src, otg_inst);
 
        /* enabled to select one of the DTBCLKs for pipe */
-       switch (otg_inst)
-       {
+       switch (dp_hpo_inst) {
        case 0:
                REG_UPDATE_2(DPSTREAMCLK_CNTL,
                             DPSTREAMCLK0_EN,
-- 
2.34.1