RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-03-03 Thread Quan, Evan
, Hersen Cc: Quan, Evan ; amd-gfx@lists.freedesktop.org; Feng, Kenneth Subject: Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3 On Fri, Feb 28, 2020 at 3:59 PM Wu, Hersen wrote: > > Follow Evan's review, add smu->mutex. > > &

RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-03-03 Thread Wu, Hersen
, Kenneth Subject: Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3 On Fri, Feb 28, 2020 at 3:59 PM Wu, Hersen wrote: > > Follow Evan's review, add smu->mutex. > > > This interface is for dGPU Navi1x. Linux dc-pplib interface dep

Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-03-02 Thread Alex Deucher
27, 2020 9:58 PM > To: Wu, Hersen ; amd-gfx@lists.freedesktop.org > > Cc: Feng, Kenneth ; Wu, Hersen > Subject: RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock > settings to smu resume from s3 > > Thanks. But could you help to confirm whether this is corr

Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-02-28 Thread Wu, Hersen
_smu_write_watermarks_table(adev); + return 0; } -- 2.17.1 From: Quan, Evan Sent: February 27, 2020 9:58 PM To: Wu, Hersen ; amd-gfx@lists.freedesktop.org Cc: Feng, Kenneth ; Wu, Hersen Subject: RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermar

RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-02-27 Thread Quan, Evan
ATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3 This interface is for dGPU Navi1x. Linux dc-pplib interface depends on window driver dc implementation. For Navi1x, clock settings of dcn watermarks are fixed. the settings should be passed to smu d

Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-02-27 Thread Alex Deucher
On Thu, Feb 27, 2020 at 10:54 AM Hersen Wu wrote: > > This interface is for dGPU Navi1x. Linux dc-pplib interface depends > on window driver dc implementation. > > For Navi1x, clock settings of dcn watermarks are fixed. the settings > should be passed to smu during boot up and resume from s3.

[PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

2020-02-27 Thread Hersen Wu
This interface is for dGPU Navi1x. Linux dc-pplib interface depends on window driver dc implementation. For Navi1x, clock settings of dcn watermarks are fixed. the settings should be passed to smu during boot up and resume from s3. boot up: dc calculate dcn watermark clock settings within