RE: [PATCH 2/2] drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH.

2018-06-20 Thread Grodzovsky, Andrey
> -Original Message- > From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] > Sent: Wednesday, June 20, 2018 2:37 AM > To: Grodzovsky, Andrey ; amd- > g...@lists.freedesktop.org > Cc: Panariti, David ; Haehnle, Nicolai > > Subject: Re: [PATCH 2/2]

Re: [PATCH 2/2] drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH.

2018-06-20 Thread Christian König
Am 19.06.2018 um 18:09 schrieb Andrey Grodzovsky: Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually

[PATCH 2/2] drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH.

2018-06-19 Thread Andrey Grodzovsky
Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually succeed for the first one but fail for the reset