On 2022-09-28 16:46, Christian König wrote:
> Am 28.09.22 um 15:52 schrieb Michel Dänzer:
>> On 2022-09-28 03:01, Zhu, Jiadong wrote:>
>>> Please make sure umd is calling the libdrm function to create context with
>>> different priories,
>>> amdgpu_cs_ctx_create2(device_handle,
Am 28.09.22 um 15:52 schrieb Michel Dänzer:
On 2022-09-28 03:01, Zhu, Jiadong wrote:>
Please make sure umd is calling the libdrm function to create context with
different priories,
amdgpu_cs_ctx_create2(device_handle, AMDGPU_CTX_PRIORITY_HIGH, _handle).
Yes, I double-checked that, and that it
On 2022-09-28 03:01, Zhu, Jiadong wrote:>
> Please make sure umd is calling the libdrm function to create context with
> different priories,
> amdgpu_cs_ctx_create2(device_handle, AMDGPU_CTX_PRIORITY_HIGH,
> _handle).
Yes, I double-checked that, and that it returns success.
> Here is the
gt;> happen yet(lots of hangs has been fixed in the previous patches).
>>>
>>> I will ask QA team to do more test.
>>>
>>> Thanks,
>>> JIadong
>>>
>>> -Original Message-
>>> From: Christian König
>>> Sent: Monday, Sep
es).
I will ask QA team to do more test.
Thanks,
JIadong
-Original Message-
From: Christian König
Sent: Monday, September 26, 2022 2:49 PM
To: Zhu, Jiadong ; amd-gfx@lists.freedesktop.org
Cc: Tuikov, Luben ; Koenig, Christian
; Grodzovsky, Andrey
Subject: Re: [PATCH 4/4] drm/amdgpu: MCBP ba
ssage-
>> From: Christian König
>> Sent: Monday, September 26, 2022 2:49 PM
>> To: Zhu, Jiadong ; amd-gfx@lists.freedesktop.org
>> Cc: Tuikov, Luben ; Koenig, Christian
>> ; Grodzovsky, Andrey
>> Subject: Re: [PATCH 4/4] drm/amdgpu: MCBP based on DRM schedu
H 4/4] drm/amdgpu: MCBP based on DRM scheduler (v6)
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Am 23.09.22 um 15:16 schrieb jiadong@amd.com:
From: "Jiadong.Zhu"
Trigger Mid-Command Buffer
QA team to do more test.
Thanks,
JIadong
-Original Message-
From: Christian König
Sent: Monday, September 26, 2022 2:49 PM
To: Zhu, Jiadong ; amd-gfx@lists.freedesktop.org
Cc: Tuikov, Luben ; Koenig, Christian
; Grodzovsky, Andrey
Subject: Re: [PATCH 4/4] drm/amdgpu: MCBP based o
Am 23.09.22 um 15:16 schrieb jiadong@amd.com:
From: "Jiadong.Zhu"
Trigger Mid-Command Buffer Preemption according to the priority of the software
rings and the hw fence signalling condition.
The muxer saves the locations of the indirect buffer frames from the software
ring together with
From: "Jiadong.Zhu"
Trigger Mid-Command Buffer Preemption according to the priority of the software
rings and the hw fence signalling condition.
The muxer saves the locations of the indirect buffer frames from the software
ring together with the fence sequence number in its fifo queue, and pops
10 matches
Mail list logo
