Reviewed-by: Evan Quan <evan.q...@amd.com>
> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Wednesday, June 13, 2018 7:18 PM > To: amd-gfx@lists.freedesktop.org > Cc: Zhu, Rex <rex....@amd.com> > Subject: [PATCH 2/7] drm/amd/pp: Rename enable_per_cu_power_gating > to powergate_gfx > > keep consistent with powergate_uvd/vce/mmhub > > Signed-off-by: Rex Zhu <rex....@amd.com> > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 +++--- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h | 2 +- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 +- > 5 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index da98208..b69da11 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -236,13 +236,13 @@ static int pp_set_powergating_state(void *handle, > pr_err("gfx off control failed!\n"); > } > > - if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) { > - pr_debug("%s was not implemented.\n", __func__); > + if (hwmgr->hwmgr_func->powergate_gfx == NULL) { > + pr_info("%s was not implemented.\n", __func__); > return 0; > } > > /* Enable/disable GFX per cu powergating through SMU */ > - return hwmgr->hwmgr_func- > >enable_per_cu_power_gating(hwmgr, > + return hwmgr->hwmgr_func->powergate_gfx(hwmgr, > state == AMD_PG_STATE_GATE); > } > > diff --git > a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c > index 4149562..683b29a 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c > @@ -416,7 +416,7 @@ int smu7_update_clock_gatings(struct pp_hwmgr > *hwmgr, > * Powerplay will only control the static per CU Power Gating. > * Dynamic per CU Power Gating will be done in gfx. > */ > -int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool > enable) > +int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable) > { > struct amdgpu_device *adev = hwmgr->adev; > > diff --git > a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h > index be7f66d..fc8f8a6 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h > @@ -33,6 +33,6 @@ > int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr); int > smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, > const uint32_t *msg_id); > -int smu7_enable_per_cu_power_gating(struct pp_hwmgr *hwmgr, bool > enable); > +int smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable); > > #endif > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > index b73e200..b4c93a9 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > @@ -5044,7 +5044,7 @@ static int smu7_set_power_profile_mode(struct > pp_hwmgr *hwmgr, long *input, uint > .get_fan_control_mode = smu7_get_fan_control_mode, > .force_clock_level = smu7_force_clock_level, > .print_clock_levels = smu7_print_clock_levels, > - .enable_per_cu_power_gating = > smu7_enable_per_cu_power_gating, > + .powergate_gfx = smu7_powergate_gfx, > .get_sclk_od = smu7_get_sclk_od, > .set_sclk_od = smu7_set_sclk_od, > .get_mclk_od = smu7_get_mclk_od, > diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > index 9b07d6e..95e29a2 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > @@ -302,7 +302,7 @@ struct pp_hwmgr_func { > int (*power_off_asic)(struct pp_hwmgr *hwmgr); > int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum > pp_clock_type type, uint32_t mask); > int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum > pp_clock_type type, char *buf); > - int (*enable_per_cu_power_gating)(struct pp_hwmgr *hwmgr, bool > enable); > + int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable); > int (*get_sclk_od)(struct pp_hwmgr *hwmgr); > int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); > int (*get_mclk_od)(struct pp_hwmgr *hwmgr); > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
