Thanks very much. I get it now.
-Original Messages-
From: "Christian König"
Sent Time: 2021-06-04 15:40:08 (Friday)
To: "Chen Lei" , "Alex Deucher"
Cc: "amd-gfx list"
Subject: Re: [BUG] Data race when use PACKET3_DMA_DATA?
Hi,
I t
.
Did I need to insert the fence packet explicitly after the dispatch packet?
-Original Messages-
From: "Alex Deucher"
Sent Time: 2021-06-03 10:11:46 (Thursday)
To: "Chen Lei"
Cc: "amd-gfx list"
Subject: Re: Re: [BUG] Data race when use PACKET3_DMA_DA
?
-Original Messages-
From: "Alex Deucher"
Sent Time: 2021-06-03 10:11:46 (Thursday)
To: "Chen Lei"
Cc: "amd-gfx list"
Subject: Re: Re: [BUG] Data race when use PACKET3_DMA_DATA?
On Wed, Jun 2, 2021 at 8:29 PM Chen Lei wrote:
Hi Alex. Thanks for your
ts in the queue. If you want it to wait for
the pipeline to drain you'll need to insert a fence packet (e.g.,
RELEASE_MEM).
Alex
>
> -Original Messages-
> From: "Alex Deucher"
> Sent Time: 2021-06-02 21:37:51 (Wednesday)
> To: "Chen Lei"
>
after launching the OpenCL kernel. If so, is there
any way to sync the CP engine until the OpenCL kernel is complete?
-Original Messages-
From: "Alex Deucher"
Sent Time: 2021-06-02 21:37:51 (Wednesday)
To: "Chen Lei"
Cc: "amd-gfx list"
Subject
On Wed, Jun 2, 2021 at 8:44 AM Chen Lei wrote:
>
> Hi, I noticed that there are two ways to do DMA for amd gpu: the SDMA copy
> packet and the PM4 dma packet.
>
> I had tested the PM4 dma packet: PACKET3_DMA_DATA. In most of time, it works.
>
> But when I launch an OpenCL kernel followed by a
