On 5/31/23 16:01, Alex Deucher wrote:
> On Mon, May 29, 2023 at 5:45 AM Michel Dänzer wrote:
>>
>> On 4/12/23 03:23, Zhang, Jesse(Jie) wrote:
>>>
>>> Due to raven/raven2 maybe enable sclk slow down,
>>> they cannot get clock count by the RLC at the auto level of dpm
>>> performance.
>>>
On Mon, May 29, 2023 at 5:45 AM Michel Dänzer wrote:
>
> On 4/12/23 03:23, Zhang, Jesse(Jie) wrote:
> >
> > Due to raven/raven2 maybe enable sclk slow down,
> > they cannot get clock count by the RLC at the auto level of dpm
> > performance.
> > So switch to golden tsc register.
>
>
On 4/12/23 03:23, Zhang, Jesse(Jie) wrote:
>
> Due to raven/raven2 maybe enable sclk slow down,
> they cannot get clock count by the RLC at the auto level of dpm
> performance.
> So switch to golden tsc register.
At least on this ThinkPad E595 with Picasso, the issue with this change
desktop.org; Deucher, Alexander
; Quan, Evan ; Zhang, Yifan
Subject: drm/amdgpu/gfx9: switch to golden tsc registers for raven/raven2
[AMD Official Use Only - General]
Due to raven/raven2 maybe enable sclk slow down,
they cannot get clock count by the RLC at the auto level of dpm perfor
[AMD Official Use Only - General]
Due to raven/raven2 maybe enable sclk slow down,
they cannot get clock count by the RLC at the auto level of dpm performance.
So switch to golden tsc register.
Signed-off-by: Jesse Zhang mailto:jesse.zh...@amd.com>>
Signed-off-by: Evan Quan
