current code missed the 128 DW after SWITCH_BUFFER, even without vm flush, we
still need those 128 DW betwen previous frame's SWITCH_BUFFER and current
frame's CE ib,
and this patch fixed this issue as well otherwise in SRIOV case (Unigeen
HEAVEN) CE will meet vm fault, and in steam OS case (D
On 19/01/17 07:18 AM, Grodzovsky, Andrey wrote:
>> From: Michel Dänzer [mailto:mic...@daenzer.net]
>> On 17/01/17 07:16 AM, Laurent Pinchart wrote:
>>> On Monday 16 Jan 2017 10:44:57 Andrey Grodzovsky wrote:
Change-Id: Iad3e0b9b3546e4e4dc79be9233daf4fe4dba83e0
Signed-off-by: Andrey Grodzo
Virtual display doesn't allocate amdgpu_encoder when initializing,
so will get invaild pointer if try to free amdgpu_encoder when
unloading driver.
Signed-off-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/dr
> -Original Message-
> From: Michel Dänzer [mailto:mic...@daenzer.net]
> Sent: Tuesday, January 17, 2017 8:50 PM
> To: Laurent Pinchart
> Cc: dri-de...@lists.freedesktop.org; Grodzovsky, Andrey;
> daniel.vet...@intel.com; amd-gfx@lists.freedesktop.org;
> nouv...@lists.freedesktop.org
> Subj
Coo, pushed to staging.
Tom
From: Deucher, Alexander
Sent: Wednesday, January 18, 2017 13:47
To: StDenis, Tom; Alex Deucher
Cc: amd-gfx list
Subject: RE: [PATCH] drm/amd/amdgpu: Add PCI info to gca_config debugfs
Whoops, sorry, I glanced quickly and thought yo
Whoops, sorry, I glanced quickly and thought you were grabbing the vendor and
device ids, not the revision. Carry on :)
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
StDenis, Tom
Sent: Wednesday, January 18, 2017 1:45 PM
To: Alex Deucher
Cc: amd-gfx list
Subject: Re:
I am grabbing revision. Unless there's some other PCI revision value I'm
missing :-)
Tom
From: Alex Deucher
Sent: Wednesday, January 18, 2017 13:40
To: Tom St Denis
Cc: amd-gfx list; StDenis, Tom
Subject: Re: [PATCH] drm/amd/amdgpu: Add PCI info to gca_config
On Wed, Jan 18, 2017 at 1:25 PM, Tom St Denis wrote:
> So we can determine which device the entry is before connecting
> a display.
>
> Signed-off-by: Tom St Denis
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/d
So we can determine which device the entry is before connecting
a display.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgp
Am 18.01.2017 um 15:45 schrieb Pixel Ding:
From: Ding Pixel
Return success when the ring is properly initialized, otherwise return
failure.
Tonga SRIOV VF doesn't have UVD and VCE engines, the initialization of
these IPs is bypassed. The system crashes if application submit IB to
their rings w
On Wed, Jan 18, 2017 at 5:08 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> If .../share/X11/xorg.conf.d/10-amdgpu.conf doesn't exist, but the ati
> wrapper is loaded, it will otherwise try to use the radeon driver even
> for GPUs driven by the amdgpu kernel driver. This can only fail,
> pote
From: Ding Pixel
Return success when the ring is properly initialized, otherwise return
failure.
Tonga SRIOV VF doesn't have UVD and VCE engines, the initialization of
these IPs is bypassed. The system crashes if application submit IB to
their rings which are not ready to use. It could be a comm
Christian,
Thank you for the quick comments. The revision is coming soon.
—
Sincerely Yours,
Pixel
On 18/01/2017, 9:26 PM, "Christian König" wrote:
>Am 18.01.2017 um 11:37 schrieb Pixel Ding:
>> From: Ding Pixel
>>
>> Return success when the ring is properly initialized, otherwise ret
Am 18.01.2017 um 11:37 schrieb Pixel Ding:
From: Ding Pixel
Return success when the ring is properly initialized, otherwise return
failure.
Tonga SRIOV VF doesn't have UVD and VCE engines, the initialization of
these IPs is bypassed. The system crashes if application submit IB to
their rings w
From: Ding Pixel
Return success when the ring is properly initialized, otherwise return
failure.
Tonga SRIOV VF doesn't have UVD and VCE engines, the initialization of
these IPs is bypassed. The system crashes if application submit IB to
their rings which are not ready to use. It could be a comm
suppose hw_submit_count in gpu_scheduler is 2 (by default), and
without suppress frame size under 256, we may sometime submit 256dw,
and sometime submit 512 dw, and that could lead to CPU override ring
buffer content which is under processing by GPU, e.g. :
The max_dw parameter for amdgpu_ring
Hi Michel,
On Wednesday 18 Jan 2017 10:50:01 Michel Dänzer wrote:
> On 17/01/17 07:16 AM, Laurent Pinchart wrote:
> > On Monday 16 Jan 2017 10:44:57 Andrey Grodzovsky wrote:
> >> Change-Id: Iad3e0b9b3546e4e4dc79be9233daf4fe4dba83e0
> >> Signed-off-by: Andrey Grodzovsky
> >> ---
> >>
> >> .../dr
previously we always insert 128nops behind vm_flush, which
may lead to DAMframe size above 256 dw and automatially aligned
to 512 dw.
now we calculate how many DWs already inserted after vm_flush
and make up for the reset to pad up to 128dws before emit_ib.
that way we only take 256 dw per submit.
previously we always insert 128nops behind vm_flush, which
may lead to DAMframe size above 256 dw and automatially aligned
to 512 dw.
now we calculate how many DWs already inserted after vm_flush
and make up for the reset to pad up to 128dws before emit_ib.
that way we only take 256 dw per submit.
>First question why do we want to limit the dw per submit to 256? Some
>limitation for SRIOV?
[ML]
suppose hw_submit_count in gpu_scheduler is 2 (by default), and without
suppress frame size under 256, we may sometime submit 256dw, and sometime
submit 512 dw, and that could lead to CPU overrid
From: Michel Dänzer
If .../share/X11/xorg.conf.d/10-amdgpu.conf doesn't exist, but the ati
wrapper is loaded, it will otherwise try to use the radeon driver even
for GPUs driven by the amdgpu kernel driver. This can only fail,
potentially in bad ways.
Signed-off-by: Michel Dänzer
---
src/ati.c
Am 18.01.2017 um 06:55 schrieb Monk Liu:
previously we always insert 128nops behind vm_flush, which
may lead to DAMframe size above 256 dw and automatially aligned
to 512 dw.
now we calculate how many DWs already inserted after vm_flush
and make up for the reset to pad up to 128dws before emit_i
Am 18.01.2017 um 06:00 schrieb Xiangliang Yu:
Reboot process will call HW fini functions of IP blocks. For virt,
need to send event three before hw fini and send event four after
hw fini.
Signed-off-by: Xiangliang Yu
Reviewed-by: Christian König for both patches.
---
drivers/gpu/drm/amd/
Reviewed-by: Christian König for the series.
Regards,
Christian.
Am 18.01.2017 um 03:40 schrieb Monk Liu:
Monk Liu (3):
drm/amdgpu:set cond_exec polling value to 1 in ring_init
drm/amdgpu:Preamble is forbid to be ignored in SRIOV
drm/amdgpu:insert switch buffer only for VM submit
d
previously we always insert 128nops behind vm_flush, which
may lead to DAMframe size above 256 dw and automatially aligned
to 512 dw.
now we calculate how many DWs already inserted after vm_flush
and make up for the reset to pad up to 128dws before emit_ib.
that way we only take 256 dw per submit
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