on vega10, driver can run into a NULL-pointer dereference.
Change-Id: I8e2de5343f804d6e736f620ff6d3d6e6488fb970
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Am 05.04.2017 um 08:43 schrieb Junwei Zhang:
By default, the value is set by individual gmc.
if a specific value is input, it overrides the global value for all
Signed-off-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
Change-Id: I9d170ff4893e982a955f19a91764cdfed619bc85
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
index
Am 05.04.2017 um 11:11 schrieb Monk Liu:
SRIOV currently only can load ucode directly, and PSP
block is not supported by VF temporarily.
will remove this restrict and use PSP load all ucode
even for SRIOV later
Change-Id: I6df5c4088c7c72d01928d5af8bfe5520447619ba
Signed-off-by: Monk Liu
From: Christian König
We need an array of pointers to IRQ sources, not an array of sources.
Signed-off-by: Christian König
Reported-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 7 ---
1 file
SRIOV currently only can load ucode directly, and PSP
block is not supported by VF temporarily.
will remove this restrict and use PSP load all ucode
even for SRIOV later
Change-Id: I6df5c4088c7c72d01928d5af8bfe5520447619ba
Signed-off-by: Monk Liu
---
they are lack in the bringup stage, we need them for GPU reset
feature.
Change-Id: I43165a223277f77a6e85d8c28749b690d7f8d51e
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 133 ++
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 5
From: Christian König
Added with "handle CPU access for split VRAM buffers".
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On Wed, Apr 5, 2017 at 7:30 AM, Tom St Denis wrote:
> My firmware is
>
> fw.VCE == .feature==0 .firmware==0x34040300
> fw.UVD == .feature==0 .firmware==0x015b0b00
> fw.MC == .feature==0 .firmware==0x
> fw.ME == .feature==46
On 05/04/17 09:06 AM, Alex Deucher wrote:
On Wed, Apr 5, 2017 at 7:30 AM, Tom St Denis wrote:
My firmware is
fw.VCE == .feature==0 .firmware==0x34040300
fw.UVD == .feature==0 .firmware==0x015b0b00
fw.MC == .feature==0 .firmware==0x
Am 05.04.2017 um 15:32 schrieb Alex Deucher:
On Wed, Apr 5, 2017 at 5:01 AM, Christian König wrote:
Am 05.04.2017 um 08:43 schrieb Junwei Zhang:
By default, the value is set by individual gmc.
if a specific value is input, it overrides the global value for all
On 05.04.2017 15:46, Alex Deucher wrote:
Cc: 13.0 17.0
Signed-off-by: Alex Deucher
Reviewed-by: Nicolai Hähnle
---
include/pci_ids/radeonsi_pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git
On Wed, Apr 5, 2017 at 5:01 AM, Christian König wrote:
> Am 05.04.2017 um 08:43 schrieb Junwei Zhang:
>>
>> By default, the value is set by individual gmc.
>> if a specific value is input, it overrides the global value for all
>>
>> Signed-off-by: Junwei Zhang
>-Original Message-
>From: Daniel Drake [mailto:dr...@endlessm.com]
>Sent: Thursday, March 30, 2017 7:15 PM
>To: Nath, Arindam
>Cc: j...@8bytes.org; Deucher, Alexander; Bridgman, John; amd-
>g...@lists.freedesktop.org; io...@lists.linux-foundation.org; Suthikulpanit,
>Suravee; Linux
Hey Tom,
If it's the same as your old firmware you might be missing an extra step. I
usually just run the kernel 'make install' as that usually take care of the
distro specific quirks.
Regards,
Andres
On Apr 5, 2017 9:56 AM, "Deucher, Alexander"
wrote:
> >
Am 05.04.2017 um 15:46 schrieb Alex Deucher:
Cc: 13.0 17.0
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
---
include/pci_ids/radeonsi_pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff
> -Original Message-
> From: StDenis, Tom
> Sent: Wednesday, April 05, 2017 9:14 AM
> To: Alex Deucher
> Cc: Andres Rodriguez; Deucher, Alexander; Tom St Denis; amd-
> g...@lists.freedesktop.org
> Subject: Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"
>
> On 05/04/17 09:06
On Wed, Apr 5, 2017 at 2:43 AM, Junwei Zhang wrote:
> By default, the value is set by individual gmc.
> if a specific value is input, it overrides the global value for all
>
> Signed-off-by: Junwei Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Rex Zhu
> Sent: Wednesday, April 05, 2017 15:55
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/display: fix NULL pointer dereference.
>
> on vega10, driver can
Ping?
On Tue, Mar 14, 2017 at 3:32 PM, Alex Deucher wrote:
> Even if we disable clockgating, we still need to make sure the
> cp/rlc interrupts are enabled for powergating which might still
> be enabled.
>
> Signed-off-by: Alex Deucher
> ---
>
The issue seems already fixed by the following commit
{{{
commit 52184bbf4773512d7c83fe21a0b4b4ec4be27caf
Author: Jordan Lazare
Date: Wed Apr 5 15:05:51 2017 -0400
drm/amd/display: fix nullptr on vega initialization
Change-Id:
It needs to happen after asic_init as asic_init expects
the registers to be in the default power up state.
This should fix S3 on vega10.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 +++--
1 file changed, 7 insertions(+), 6
Reviewed-by: Xiangliang Yu for the series.
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Wednesday, April 05, 2017 5:11 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
From: Christian König
Enable concurrent VM flushes for Vega10.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 51 +++---
1 file changed, 28 insertions(+), 23 deletions(-)
diff --git
From: Christian König
Add the info which ring belonging to which VMHUB.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 3 +++
From: Christian König
Rather inefficient, but this way we only need to flush the current hub.
I wonder if we shouldn't make nails with heads and separate the VMID ranges
completely.
Signed-off-by: Christian König
---
From: Christian König
For Vega10 we have 18 VM invalidation engines for each VMHUB.
Start to assign them manually to the rings.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
From: Christian König
Drop invalidating both hubs from each engine.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 36 +--
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 60 +-
On 05/04/17 10:15 AM, Christian König wrote:
Am 05.04.2017 um 15:26 schrieb Tom St Denis:
Introduce WREG32_FIELD15 macro for SOC15 architectures.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
For the series or just 1/10?
Tom
On 04/05/2017 01:43 AM, Junwei Zhang wrote:
> By default, the value is set by individual gmc.
> if a specific value is input, it overrides the global value for all
>
> Signed-off-by: Junwei Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
>
On 05/04/17 11:34 AM, Andres Rodriguez wrote:
Hey Tom,
If it's the same as your old firmware you might be missing an extra
step. I usually just run the kernel 'make install' as that usually take
care of the distro specific quirks.
I manually load the module but for sanity I did a make install
On Wed, Apr 5, 2017 at 12:21 PM, Christian König
wrote:
> From: Christian König
>
> Drop invalidating both hubs from each engine.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 36
On Wed, Apr 5, 2017 at 9:26 AM, Tom St Denis wrote:
> Use new WREG32_FIELD15 macro
>
> Signed-off-by: Tom St Denis
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +---
> 1 file
On Wed, Apr 5, 2017 at 12:21 PM, Christian König
wrote:
> From: Christian König
>
> For Vega10 we have 18 VM invalidation engines for each VMHUB.
>
> Start to assign them manually to the rings.
>
> Signed-off-by: Christian König
On Wed, Apr 5, 2017 at 12:21 PM, Christian König
wrote:
> From: Christian König
>
> Add the info which ring belonging to which VMHUB.
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
On Wed, Apr 5, 2017 at 12:21 PM, Christian König
wrote:
> From: Christian König
>
> Rather inefficient, but this way we only need to flush the current hub.
>
> I wonder if we shouldn't make nails with heads and separate the VMID ranges
>
Change-Id: I861ba3c85c182fdb6b89533029b3272191f331f5
Signed-off-by: Alex Xie
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
3 files changed, 3 insertions(+), 3
Change-Id: Ic1cb6252482bcf9602c7700c3db075b9edf20e2a
Signed-off-by: Alex Xie
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
By default, the value is set by individual gmc.
if a specific value is input, it overrides the global value for all
Signed-off-by: Junwei Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 44
My firmware is
fw.VCE == .feature==0 .firmware==0x34040300
fw.UVD == .feature==0 .firmware==0x015b0b00
fw.MC == .feature==0 .firmware==0x
fw.ME == .feature==46 .firmware==0x00a1
fw.PFP == .feature==46 .firmware==0x00eb
fw.CE ==
Change-Id: Ia251723599024fe258b018a53078d340af01207e
Signed-off-by: Alex Xie
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
4 files
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Alex Xie
> Sent: Wednesday, April 05, 2017 5:31 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Xie, AlexBin
> Subject: [PATCH] drm/amdgpu: Fix compilation warning
>
> Change-Id:
It's not used in gfx 6/7/8 so drop it from gfx 9 as well.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 175 +-
1 file changed, 1 insertion(+), 174 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
Use new WREG32_FIELD15 macro
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Use new WREG32_FIELD macro
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Introduce WREG32_FIELD15 macro for SOC15 architectures.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 +++
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git
Use new WREG32_FIELD15 macro
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Use new WREG32_FIELD15 macro.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 49527c0c2696..6bc9856e67a7 100644
---
Use new WREG32_FIELD15 macro.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Use new WREG32_FIELD15 macro
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
Cc: 13.0 17.0
Signed-off-by: Alex Deucher
---
include/pci_ids/radeonsi_pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/pci_ids/radeonsi_pci_ids.h
b/include/pci_ids/radeonsi_pci_ids.h
index f4139ea..1058682
Am 05.04.2017 um 15:26 schrieb Tom St Denis:
Introduce WREG32_FIELD15 macro for SOC15 architectures.
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
On Tue, Apr 4, 2017 at 11:58 PM, Evan Quan wrote:
> Signed-off-by: Evan Quan
> Signed-off-by: Alex Deucher
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h | 57
On Wed, Apr 5, 2017 at 5:39 AM, Christian König wrote:
> From: Christian König
>
> Added with "handle CPU access for split VRAM buffers".
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
On Wed, Apr 5, 2017 at 5:47 AM, Christian König wrote:
> From: Christian König
>
> We need an array of pointers to IRQ sources, not an array of sources.
>
> Signed-off-by: Christian König
> Reported-by: Dan Carpenter
On Wed, Apr 5, 2017 at 5:11 AM, Monk Liu wrote:
> Change-Id: I70035e7946e2f66804ae5c3bc846d148c633a057
> Signed-off-by: Monk Liu
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/soc15.c | 20
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