Am 30.04.19 um 17:36 schrieb Kuehling, Felix:
> On 2019-04-30 5:32 a.m., Christian König wrote:
>> [CAUTION: External Email]
>>
>> Am 30.04.19 um 01:16 schrieb Kuehling, Felix:
>>> On 2019-04-29 8:34 a.m., Christian König wrote:
Am 28.04.19 um 09:44 schrieb Kuehling, Felix:
> From: Kent
On Tue, Apr 30, 2019 at 2:22 PM Kazlauskas, Nicholas
wrote:
>
> On 4/30/19 3:44 AM, Michel Dänzer wrote:
> > [CAUTION: External Email]
> >
> > On 2019-04-30 9:37 a.m., Mario Kleiner wrote:
> >> Allow to detect any connected display to be marked as
> >> VRR capable. This is useful for testing the
On 2019-04-30 5:32 a.m., Christian König wrote:
> [CAUTION: External Email]
>
> Am 30.04.19 um 01:16 schrieb Kuehling, Felix:
>> On 2019-04-29 8:34 a.m., Christian König wrote:
>>> Am 28.04.19 um 09:44 schrieb Kuehling, Felix:
From: Kent Russell
GTT size is currently limited to
Am 30.04.19 um 16:48 schrieb Trigger Huang:
amdgpu_vm_make_compute is used to turn a GFX VM into a compute VM,
the prerequisite is this VM is clean. Let's check if some page tables
are already filled , while not check if some mapping is already made.
Signed-off-by: Trigger Huang
---
On 2019-04-30 9:25 a.m., Andrey Konovalov wrote:
> [CAUTION: External Email]
>
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
>
On Tue, Apr 30, 2019 at 1:10 PM Christian König
wrote:
>
> Am 30.04.19 um 17:14 schrieb Trigger Huang:
> > In Multi-VFs stress test, sometimes we see IRQ lost when running
> > benchmark, just rearm it.
>
> Well I think I have seen that on bare metal as well, it would certainly
> explain some very
On 2019-04-30 1:03 p.m., Koenig, Christian wrote:
> Am 30.04.19 um 17:36 schrieb Kuehling, Felix:
>> On 2019-04-30 5:32 a.m., Christian König wrote:
>>> [CAUTION: External Email]
>>>
>>> Am 30.04.19 um 01:16 schrieb Kuehling, Felix:
On 2019-04-29 8:34 a.m., Christian König wrote:
> Am
On 2019-04-30 9:25 a.m., Andrey Konovalov wrote:
> [CAUTION: External Email]
>
> This patch is a part of a series that extends arm64 kernel ABI to allow to
> pass tagged user pointers (with the top byte set to something else other
> than 0x00) as syscall arguments.
>
> radeon_ttm_tt_pin_userptr()
Am 30.04.19 um 17:14 schrieb Trigger Huang:
In Multi-VFs stress test, sometimes we see IRQ lost when running
benchmark, just rearm it.
Well I think I have seen that on bare metal as well, it would certainly
explain some very odd behavior I've got from the IH block.
Have you pinged the hw
From: "Leo (Hanghong) Ma"
[Why]
To send sdp message immediately from a single slot.
[How]
Modify the generic SDP message interface, and use GSP4 to send immediate
sdp message.
Change-Id: I3f4c5ed84a021ee030d002d0155d6541f04930b9
Signed-off-by: Leo (Hanghong) Ma
Reviewed-by: Harry Wentland
From: Dmytro Laktyushkin
These are internal otg params and should be handled as such.
Thich change passes the params as function arguments.
Change-Id: I84caccd330c59994865fe2157aa1af137122df12
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
From: Dmytro Laktyushkin
It makes no logical sense being there
Change-Id: I55fe8eca7613be81132680a2a58bd58d874eb2b6
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +--
From: Samson Tam
[Why]
DM doesn't need to know which link cap is being retrieved ( verified
or preferred ). Let DC figure it out.
[How]
Change name.
Change-Id: I5585ac7dcdf58216b2942f7ab6758c5d15719d0d
Signed-off-by: Samson Tam
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
From: Charlene Liu
[Description]
This is for HDMI 6Ghz mode before we load the driver, because VBIOS
not support HDMI (6Ghz mode)
Reset to redriver/retimer setting for the setting for below 340Mhz.
Change-Id: I998b371d075c570ccea4305345e5fd66d2cbdf2e
Signed-off-by: Charlene Liu
Reviewed-by:
From: Nicholas Kazlauskas
[Why]
Surface scaling info updates can affect bandwidth and blocks. We need
to be checking these with global validation to avoid underflow or
corruption.
[How]
Drop the state->allow_modeset early exit in
dm_determine_update_type_for_commit. Most of those should be
From: Eric Yang
[Why]
Upon closer inspection, our previous implementation is missing
code for programming de-spread and DP DTO. Porting this logic
into driver is rather involved, as there are a lot of table
look ups. So for now move back to calling vbios cmd table
[How]
Go back to calling vbios
From: Nicholas Kazlauskas
[Why]
Plane scaling parameters are not correctly filled or updated when
performing fast updates.
They're filled when creating the dc plane state and during atomic check.
While the atomic check code path happens for the plane even during fast
updates, the issue is that
From: Joshua Aberback
Add a fast_validate parameter in dc_validate_global_state for future use
Change-Id: If7a7ea618ba85bdddc8ee4419cd01e2fae3fda93
Signed-off-by: Joshua Aberback
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
From: Dmytro Laktyushkin
This function needs to re-calculate the scaling on the pipe
that loses it's half.
Change-Id: I448583eb13f17f868377aab2b1a5d68beb43989f
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
From: Nicholas Kazlauskas
[Why]
As long as we have at least one non-cursor plane enabled on a CRTC then
the CRTC itself can remain enabled.
This will allow for commits where there's an overlay plane enabled but
no primary plane enabled.
[How]
Remove existing primary plane fb != NULL checks and
From: Joshua Aberback
[Why]
We used this change to investigate the performance of bandwidth validation,
it will be useful to have if we need to investigate further.
[How]
We use performance counter tick numbers to profile performance, they live
at dc->debug.bw_val_profile (set .enable in
From: Roman Li
[Why]
In fill_plane_buffer_attributes() we calculate chroma/luma
assuming that the surface_pixel_format is always valid.
If it's not the case, there's a risk of divide by zero error.
[How]
Check if format valid before calculating pixel format attributes
Change-Id:
From: Nicholas Kazlauskas
[Why]
The overlay will be incorrectly placed *below* the primary plane for
commits with state->allow_modeset = true because the primary plane
won't be removed and recreated in the same commit.
[How]
Add the should_reset_plane helper to determine if the plane should be
From: Nicholas Kazlauskas
[Why]
Pitch was only calculated based on format whenever the plane state
was recreated. This could result in surface corruption due to the
incorrect pitch being programmed when the surface pitch changed during
commits where state->allow_modeset = false.
[How]
From: Nicholas Kazlauskas
[Why]
An assertion is thrown when using SURFACE_PIXEL_FORMAT_GRPH_RGB565
formats on DCE since the prescale_params->scale wasn't being filled.
Found by a dmesg-fail when running the
igt@kms_plane@pixel-format-pipe-a-planes test on Baffin.
[How]
Fill in the scale
From: Aric Cyr
Change-Id: I5ec540c83bb1bb01efb5a67d9dd17a518ef6edaf
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
From: Nicholas Kazlauskas
[Why]
We need DC's color space to match the color encoding and color space
specified by userspace to correctly render YUV surfaces.
[How]
Add the DRM color properties when the DC plane supports NV12.
Change-Id: Ie3eb9800a9a7954d05f691b277e7ca5a25164d5d
Signed-off-by:
Summary of Changes
*Cursor fixes
*Set clocks split refactor
*Refactor watermark programing
Anthony Koo (1):
drm/amd/display: fix multi display seamless boot case
Aric Cyr (2):
drm/amd/display: 3.2.28
drm/amd/display: 3.2.29
Charlene Liu (3):
drm/amd/display: add SW_USE_I2C_REG request.
From: Eric Yang
[Why]
To simply logic for setting DCN specific clocks, we will send
SMU message directly through the VBIOS message box.
[How]
Add new structure in pp_smu to hold functions to set clocks
through vbios message box
Change-Id: I8dcad7a1ebb8a9ae317d03e492d9090af5d3443c
From: Aric Cyr
Change-Id: I2e35170195717fa417ddaeb372efe2908722d4a9
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
From: Nicholas Kazlauskas
[Why]
When x or y is negative we set the x and y values to 0 and compensate
with a positive cursor hotspot in DM since DC expects positive cursor
values.
When x or y is less than or equal to the maximum cursor width or height
the cursor hotspot is clamped so the
From: Yongqiang Sun
Change-Id: Ibe60745eaaea72d694ceb9d22936eae0abae5674
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
From: Aric Cyr
Change-Id: Id37ddaf1186ee12ea1b40b5e991ac575f006c039
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
From: Samson Tam
[Why]
Emulating passive dongle on USB-C port causes issue on some asics.
[How]
Check for DP_IS_USB_C flag in bios parser and propagate it to
encoder features flags. If DP_IS_USB_C flag is set and it is trying to
emulate passive dongle, then return fail.
Change-Id:
From: Charlene Liu
Change-Id: I7ca5ff67a2d2f701e7e974cae7a93e7622669ac5
Signed-off-by: Charlene Liu
Reviewed-by: Duke Du
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 29 +--
.../gpu/drm/amd/display/dc/core/dc_stream.c | 4 +--
From: Nicholas Kazlauskas
[Why]
Planes have downscaling limits and upscaling limits per format and DM
is expected to validate these using DC caps. We should fail atomic
check validation if we aren't capable of doing the scaling.
[How]
We don't currently create store which DC plane maps to which
From: Yongqiang Sun
Refactor programming watermark function:
Divided into urgent watermark, stutter watermark and pstate watermark.
Change-Id: I95ca189767237aedf91e454f1f7215cdcc8c1821
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
From: Jun Lei
[why]
there are some scaling capabilities such as fp16 which are known to be
unsupported
on a given ASIC. exposing these static capabilities allows much simpler
implementation
for OS interfaces which require to report such static capabilities to reduce the
number of dynamic
From: Chris Park
[Why]
Part of HDMI 2.1 requires AVI InfoFrame version update
from current V2 to V3 for new VICs, and V4 for
new colorimetry.
[How]
Implement V3 and V4 AVI InfoFrame.
If (C1, C0)=(1, 1) and (EC2, EC1, EC0)=(1, 1, 1),
the Source shall use 20 AVI InfoFrame Version 4.
If VIC >=
From: Charlene Liu
[Description]
This is for DC_I2c arbitration use between HW use/SW use and DMCU use.
Change-Id: I44fd98c0e0ff91bb71dac8a9c57b50cf6ec5921f
Signed-off-by: Charlene Liu
Reviewed-by: Krunoslav Kovac
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
From: Chris Park
[Why]
Part of HDMI 2.1 requires AVI InfoFrame version update
from current V2 to V4 for new colorimetry.
[How]
Define V4 AVI InfoFrame ACE0-ACE3 bit.
Change-Id: Ie840136e661ea72ac90be6894e19c44e376d4679
Signed-off-by: Chris Park
Reviewed-by: Nevenko Stupar
Acked-by:
From: Anthony Koo
[Why]
Unlike external DP panels, internal eDP does not perform
verify link caps because the panel connection is fixed.
So if GOP enabled the eDP at boot, we can retain its
trained link settings to optimize.
[How]
Read the lane count and link rate by reading this
information
From: Nicholas Kazlauskas
[Why]
We currently don't do DC validation for medium or full updates where
the plane state isn't created. There are some medium and full updates
that can cause bandwidth or clock changes to occur resulting in
underflow or corruption.
We need to be able to fill surface
From: Nicholas Kazlauskas
[Why]
Hardware can support video surfaces and DC tells us which planes are
suitable via DC plane caps.
[How]
The supported formats array will now vary based on what DC tells us,
so create an array and fill it dynamically based on plane types and
caps.
Ideally we'd
From: David Francis
[Why]
On some compositors, with two monitors attached, VT terminal
switch can cause a graphical issue by the following means:
There are two streams, one for each monitor. Each stream has one
plane
current state:
M1:S1->P1
M2:S2->P2
The user calls for a
From: Nicholas Kazlauskas
[Why]
DC expects the surface memory address to identify the surface.
This doesn't work with what we're doing with the temporary surfaces,
it will always assume this is a full update because the surface
isn't in the current context.
[How]
Use the surface directly. This
From: Nicholas Kazlauskas
[Why]
DM thinks that the update type should be full whenever a stream or
plane is added or removed (including recreations).
This won't match in the case where DC thinks what looks like a fast
update to DM is actually a medium or full - like scaling changes that
affect
From: Anthony Koo
[Why]
There is a scenario that causes eDP to become blank if
there are multiple displays connected, and the external
display is set as the primary display such that the first
flip comes to the external display.
In this scenario, we call our optimize function before
the eDP
From: David Francis
[Why]
dc_stream_get_crtc_position can return false.
This was unhandled in delay_cursor_until_vupdate
[How]
If dc_stream_get_crtc_position returns false, something
is weird. Don't delay.
Change-Id: Id0fc61792aaa248594deb46d9984bcb3fb78559c
Signed-off-by: David Francis
amdgpu_vm_make_compute is used to turn a GFX VM into a compute VM,
the prerequisite is this VM is clean. Let's check if some page tables
are already filled , while not check if some mapping is already made.
Signed-off-by: Trigger Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 33
In Multi-VFs stress test, sometimes we see IRQ lost when running
benchmark, just rearm it.
Signed-off-by: Trigger Huang
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 37 +-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git
Hi Christian,
Thanks for the quick response.
One thing I want to confirm, per my understanding that CSA is only used by CP
preemption for KCQ and KGQ path, but in KFD user mode queue path, can we delete
CSA?
If yes, then maybe we can split this topic into two patches
1, the original one that
Am 30.04.19 um 12:28 schrieb Huang, Trigger:
Hi Christian,
Thanks for the quick response.
One thing I want to confirm, per my understanding that CSA is only used by CP
preemption for KCQ and KGQ path, but in KFD user mode queue path, can we delete
CSA?
If yes, then maybe we can split this
Thanks, Ok, I got it.
That makes more clear.
Thanks & Best Wishes,
Trigger Huang
-Original Message-
From: Christian König
Sent: Tuesday, April 30, 2019 6:32 PM
To: Huang, Trigger ; Koenig, Christian
; Kuehling, Felix ;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:
Hi Christian & Felix,
Thanks for the information.
But actually currently CSA is mapped only in amdgpu_driver_open_kms under
SR-IOV.
So would you give more information about ' Well that is exactly what we already
do here'? Where I can find its implementation?
On the other hand, I will try the
Am 30.04.19 um 01:16 schrieb Kuehling, Felix:
On 2019-04-29 8:34 a.m., Christian König wrote:
Am 28.04.19 um 09:44 schrieb Kuehling, Felix:
From: Kent Russell
GTT size is currently limited to the minimum of VRAM size or 3/4 of
system memory. This severely limits the quanitity of system
Am 30.04.19 um 11:53 schrieb Huang, Trigger:
> Hi Christian & Felix,
>
> Thanks for the information.
>
> But actually currently CSA is mapped only in amdgpu_driver_open_kms under
> SR-IOV.
> So would you give more information about ' Well that is exactly what we
> already do here'? Where I can
Am 30.04.19 um 05:20 schrieb Alex Deucher:
On Mon, Apr 29, 2019 at 11:16 PM Evan Quan wrote:
Every ring type can have its own timeout setting.
- V2: update lockup_timeout parameter format and cosmetic fixes
- V3: invalidate 0 and negative values
- V4: update lockup_timeout parameter
Well that is exactly what we already do here. The only problem is we do
the wrong check amdgpu_vm_make_compute().
Instead of checking if some page tables are already filled we check if
some mapping is already made.
Regards,
Christian.
Am 30.04.19 um 01:34 schrieb Kuehling, Felix:
I
Allow to detect any connected display to be marked as
VRR capable. This is useful for testing the basics of
VRR mode, e.g., scheduling and timestamping, BTR, and
transition logic, on non-VRR capable displays, e.g.,
to perform IGT test-suit kms_vrr test runs.
This fake VRR display mode is enabled
On 2019-04-30 9:37 a.m., Mario Kleiner wrote:
> Allow to detect any connected display to be marked as
> VRR capable. This is useful for testing the basics of
> VRR mode, e.g., scheduling and timestamping, BTR, and
> transition logic, on non-VRR capable displays, e.g.,
> to perform IGT test-suit
SR-IOV host side will send IDH_QUERY_ALIVE to guest VM to check
if this guest VM is still alive (not destroyed). The only thing
guest KMD need to do is to send ACK back to host.
Signed-off-by: Trigger Huang
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 3 +++
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
On 4/30/19 3:44 AM, Michel Dänzer wrote:
> [CAUTION: External Email]
>
> On 2019-04-30 9:37 a.m., Mario Kleiner wrote:
>> Allow to detect any connected display to be marked as
>> VRR capable. This is useful for testing the basics of
>> VRR mode, e.g., scheduling and timestamping, BTR, and
>>
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
This patch adds ksys_ wrappers to the following memory syscalls:
brk, get_mempolicy (renamed kernel_get_mempolicy
=== Overview
arm64 has a feature called Top Byte Ignore, which allows to embed pointer
tags into the top byte of each pointer. Userspace programs (such as
HWASan, a memory debugging tool [1]) might use this feature and pass
tagged user pointers to the kernel through syscalls or other interfaces.
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
do_pages_move() is used in the implementation of the move_pages syscall.
Untag user pointers in this function.
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
This patch adds a simple test, that calls the uname syscall with a
tagged user pointer as an argument. Without the
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
amdgpu_ttm_tt_get_user_pages() uses provided user pointers for vma
lookups, which can only by done with untagged
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
radeon_ttm_tt_pin_userptr() uses provided user pointers for vma
lookups, which can only by done with untagged
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
vaddr_get_pfn() uses provided user pointers for vma lookups, which can
only by done with untagged pointers.
Untag
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
mlx4_get_umem_mr() uses provided user pointers for vma lookups, which can
only by done with untagged pointers.
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
This patch allows tagged pointers to be passed to the following memory
syscalls: brk, get_mempolicy, madvise, mbind,
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
strncpy_from_user and strnlen_user accept user addresses as arguments, and
do not go through the same path as
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
userfaultfd_register() and userfaultfd_unregister() use provided user
pointers for vma lookups, which can only by
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
copy_from_user (and a few other similar functions) are used to copy data
from user memory into the kernel memory or
To allow arm64 syscalls to accept tagged pointers from userspace, we must
untag them when they are passed to the kernel. Since untagging is done in
generic parts of the kernel, the untagged_addr macro needs to be defined
for all architectures.
Define it as a noop for architectures other than
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
videobuf_dma_contig_user_get() uses provided user pointers for vma
lookups, which can only by done with untagged
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
tee_shm_register()->optee_shm_unregister()->check_mem_type() uses provided
user pointers for vma lookups (via
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
mm/gup.c provides a kernel interface that accepts user addresses and
manipulates user pages directly (for example
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
In copy_mount_options a user address is being subtracted from TASK_SIZE.
If the address is lower than TASK_SIZE, the
This patch is a part of a series that extends arm64 kernel ABI to allow to
pass tagged user pointers (with the top byte set to something else other
than 0x00) as syscall arguments.
get_vaddr_frames uses provided user pointers for vma lookups, which can
only by done with untagged pointers. Instead
amdgpu_vm_make_compute is used to turn a GFX VM into a compute VM,
the prerequisite is this VM is clean. Let's check if some page tables
are already filled , while not check if some mapping is already made.
Signed-off-by: Trigger Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 36
Am 30.04.19 um 16:18 schrieb Trigger Huang:
amdgpu_vm_make_compute is used to turn a GFX VM into a compute VM,
the prerequisite is this VM is clean. Let's check if some page tables
are already filled , while not check if some mapping is already made.
Signed-off-by: Trigger Huang
---
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