thanks,
i will make a new patch to fix this problem.
Best Regards,
Kevin
From: Quan, Evan
Sent: Friday, July 12, 2019 3:09:54 PM
To: Wang, Kevin(Yang); amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth
Subject: RE: [PATCH 3/3] drm/amd/powerplay: avoid double check
Code in the amdgpu driver triggers a bug when using clang to build
an arm64 kernel:
/tmp/sdma_v4_0-f95fd3.s: Assembler messages:
/tmp/sdma_v4_0-f95fd3.s:44: Error: selected processor does not support `bfc
w0,#1,#5'
I expect this to be fixed in llvm soon, but we can also work around
it by
clang complains that 'false' is a not a pointer:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:2428:10: error:
expression which evaluates to zero treated as a null pointer constant of type
'struct pipe_ctx *' [-Werror,-Wnon-literal-null-conversion]
return
1.miss socclk profile support when bringup.
2.add feature check for socclk.
Change-Id: I8f5b92dc8384fd03b540a2f654bd40f1ebf56c85
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
1. the standard dpm is not support before.
2. use auto profile to adapt standard profile.
Change-Id: Ib4bfbfe2e5e73c55c9cd2bbd968e102136cc6852
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Patch1 & 2 are reviewed-by: Evan Quan
For patch3, for dpm disabled case, "smu_get_dpm_freq_range(smu, clk_type,
_freq,_freq)" will not se the min_freq and max_freq.
That will cause some troubles for the succeeding smu_set_soft_freq_range.
Please get that handled properly.
Regards,
Evan
>
Current implementation is not actually able to detect
invalid message/table/workload mapping.
Change-Id: I66588f20dc2c39dfeb8aefb66757812589eab812
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 1 +
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 15 ++--
This can avoid them to be handled in a wrong way without notice.
Since not all SMU messages/clocks are supported on every SMU11 ASIC.
Change-Id: I440b80833c81066cd36613beae555f2fa068199f
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 18
The interface was used in a confusing way. In profile mode scenario,
the 2nd parameter of the interface was used in a different way from
other scenarios.
Change-Id: Iabcebb47db8fdf242580c1059393132ee10b93e4
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 4 ++--
the unforce_dpm_levels doesn't need to check feature enable,
because the smu_get_dpm_freq_range function has check feature logic.
Change-Id: I6ae62b355aa76a00f0f6e164cd9848fb32fc7c12
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 23 --
1 file
> the unforce_dpm_levels doesn't need to check feature enable, because the
> smu_get_dpm_freq_range function has check feature logic.
enable -> enablement
With that fixed, reviewed-by: Evan Quan
> -Original Message-
> From: Wang, Kevin(Yang)
> Sent: Friday, July 12, 2019 5:15 PM
> To:
Le jeu. 11 juil. 2019 à 13:30, Andrzej Pietrasiewicz
a écrit :
>
> Use the ddc pointer provided by the generic connector.
>
> Signed-off-by: Andrzej Pietrasiewicz
Reviewed-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/sti/sti_hdmi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
> the save dpm level should be save previous dpm profile level, should not
> modified by get dpm level function.
Please give a better description to explain why this change is needed.
enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu)
{
struct smu_dpm_context
As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml:
Support clang option for stack alignment") and calcs in commit
cc32ad8f559c ("amdgpu/dc/calcs: Support clang option for stack
alignment"), dcn20 uses an option that is not available with clang:
clang: error: unknown argument:
add this helper function to check dpm clk feature is enabled.
Change-Id: I51a4e9246d83d74a8e687fbc45983848adc960ca
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 71 +--
.../gpu/drm/amd/powerplay/inc/amdgpu_smu.h| 1 +
2 files changed, 49
the save dpm level should be save previous dpm profile level,
should not modified by get dpm level function.
eg: default auto
1. auto -> standard ==> dpm_level = standard, save_dpm = auto.
2. standard -> auto ==> dpm_level = auto, save_dpm = standard.
Change-Id:
the unforce_dpm_levels doesn't need to check feature enable,
because the smu_get_dpm_freq_range function has check feature logic.
Change-Id: I6ae62b355aa76a00f0f6e164cd9848fb32fc7c12
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 23 --
1 file
v2: change function name to smu_clk_dpm_is_enabled.
add this helper function to check dpm clk feature is enabled.
Change-Id: I7f9949033c318fec618a9701df4a082d54a626c8
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 69 ---
Please rename smu_feature_dpmclk_check as smu_is_clk_dpm_enabled or other more
meaningful.
> + switch (clk_type) {
> + case SMU_MCLK:
> + case SMU_UCLK:
> + if (!smu_feature_is_enabled(smu,
> SMU_FEATURE_DPM_UCLK_BIT)) {
> + pr_warn("uclk dpm is not
It is annoying to have #warnings that trigger in randconfig
builds like
drivers/gpu/drm/amd/amdgpu/soc15.c:653:3: error: "Enable CONFIG_DRM_AMD_DC for
display support on SOC15."
drivers/gpu/drm/amd/amdgpu/nv.c:400:3: error: "Enable CONFIG_DRM_AMD_DC for
display support on navi."
Remove these
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 0d94c812df1b..7d5207bbe382 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
Add 5 bits to the offset for SRBM selection to handle VMIDs. Also
update the select_me_pipe_q() callback to also select VMID.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 4 ++--
Prefetch mode 0 is not supported and can lead to hangs with certain very
specific code patterns. Set a sound prefetch mode for all VMIDs rather
than forcing all shaders to set the prefetch mode at the beginning.
Reduce code duplication a bit while we're at it. Note that the 64-bit
address mode
On Fri, Jul 12, 2019 at 5:37 AM Arnd Bergmann wrote:
>
> As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml:
> Support clang option for stack alignment") and calcs in commit
> cc32ad8f559c ("amdgpu/dc/calcs: Support clang option for stack
> alignment"), dcn20 uses an option that
On Fri, Jul 12, 2019 at 8:02 PM Alex Deucher wrote:
>
> On Fri, Jul 12, 2019 at 5:41 AM Arnd Bergmann wrote:
> >
> > It is annoying to have #warnings that trigger in randconfig
> > builds like
> >
> > drivers/gpu/drm/amd/amdgpu/soc15.c:653:3: error: "Enable CONFIG_DRM_AMD_DC
> > for display
On 2019-07-12 9:46 a.m., Haehnle, Nicolai wrote:
> Prefetch mode 0 is not supported and can lead to hangs with certain very
> specific code patterns. Set a sound prefetch mode for all VMIDs rather
> than forcing all shaders to set the prefetch mode at the beginning.
>
> Reduce code duplication a
Patch looks fine to me, but I'm seeing the same warnings that I mentioned on
patch 7 with this as well
On Thu, 2019-07-04 at 15:05 -0400, sunpeng...@amd.com wrote:
> From: Leo Li
>
> Implement late_register and early_unregister hooks for MST connectors.
> Call drm helpers for MST connector
Reviewed-by: Marek Olšák
Marek
On Fri, Jul 12, 2019 at 9:47 AM Haehnle, Nicolai
wrote:
> Prefetch mode 0 is not supported and can lead to hangs with certain very
> specific code patterns. Set a sound prefetch mode for all VMIDs rather
> than forcing all shaders to set the prefetch mode at the
adding perfmon and fica atomic operations to adhere to data fabrics finite
state machine requirements for indirect register access.
Change-Id: I2ab17fd59d566b4251c9a9d0e67b897b8c221249
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +
monitor xgmi errors via mc pie status through fica registers.
Change-Id: Id80b6c2f635a294afe343cf55a03902e9a1787a5
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git
On Fri, Jul 12, 2019 at 2:39 PM Kim, Jonathan wrote:
>
> adding perfmon and fica atomic operations to adhere to data fabrics finite
> state machine requirements for indirect register access.
>
> Change-Id: I2ab17fd59d566b4251c9a9d0e67b897b8c221249
> Signed-off-by: Jonathan Kim
> ---
>
On Fri, Jul 12, 2019 at 9:44 AM StDenis, Tom wrote:
>
> Signed-off-by: Tom St Denis
Please add a patch description. With that fixed, the series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git
PCIE macros breaks data fabric state machine.
Subsequent reads after write calls to address/data offsets in macros causes
unexpected behavior.
Thanks,
Jon
-Original Message-
From: Alex Deucher
Sent: Friday, July 12, 2019 2:45 PM
To: Kim, Jonathan
Cc: amd-gfx@lists.freedesktop.org
BTW, I just tried these patches on my T450s (using i915) and I'm seeing some
kernel warnings with them when adding DP aux devices after connecting a new
MST topology to the system:
[ 296.511130] kauditd_printk_skb: 2 callbacks suppressed
[ 296.511135] audit: type=1305
On Fri, Jul 12, 2019 at 5:40 AM Arnd Bergmann wrote:
>
> clang complains that 'false' is a not a pointer:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:2428:10:
> error: expression which evaluates to zero treated as a null pointer constant
> of type 'struct pipe_ctx *'
On Fri, Jul 12, 2019 at 2:37 AM Arnd Bergmann wrote:
>
> As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml:
> Support clang option for stack alignment") and calcs in commit
> cc32ad8f559c ("amdgpu/dc/calcs: Support clang option for stack
> alignment"), dcn20 uses an option that
Reviewed-by: Lyude Paul
On Thu, 2019-07-04 at 15:05 -0400, sunpeng...@amd.com wrote:
> From: Leo Li
>
> Set the connector's kernel device as the parent for the aux kernel
> device. This allows udev rules to access connector attributes when
> creating symlinks to aux devices.
>
> Cc: Ben
On Fri, Jul 12, 2019 at 11:05:59PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 12, 2019 at 03:48:53PM -0400, Lyude Paul wrote:
> > BTW, I just tried these patches on my T450s (using i915) and I'm seeing some
> > kernel warnings with them when adding DP aux devices after connecting a new
> > MST
On Fri, Jul 12, 2019 at 5:41 AM Arnd Bergmann wrote:
>
> It is annoying to have #warnings that trigger in randconfig
> builds like
>
> drivers/gpu/drm/amd/amdgpu/soc15.c:653:3: error: "Enable CONFIG_DRM_AMD_DC
> for display support on SOC15."
> drivers/gpu/drm/amd/amdgpu/nv.c:400:3: error:
Reviewed-by : Shaoyun.liu < shaoyun@amd.com>
I manually applied the change and verified on vega10 on visualization
which we do have retry vm fault issue . With this patch , the no-retry
interrupt delivered as expected and I don't see the interrupt storm.
Regards
shaoyun.liu
On
On Fri, Jul 12, 2019 at 03:48:53PM -0400, Lyude Paul wrote:
> BTW, I just tried these patches on my T450s (using i915) and I'm seeing some
> kernel warnings with them when adding DP aux devices after connecting a new
> MST topology to the system:
>
> [ 367.742571] WARNING: CPU: 2 PID: 442 at
>
On Fri, Jul 12, 2019 at 11:39:52AM +0200, Arnd Bergmann wrote:
> clang complains that 'false' is a not a pointer:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:2428:10:
> error: expression which evaluates to zero treated as a null pointer constant
> of type 'struct
On Fri, Jul 12, 2019 at 8:49 PM 'Nick Desaulniers' via Clang Built
Linux wrote:
>
> On Fri, Jul 12, 2019 at 2:37 AM Arnd Bergmann wrote:
> >
> > As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml:
> > Support clang option for stack alignment") and calcs in commit
> > cc32ad8f559c
Walk page table for the faulting address and dump PDEs and PTEs at
all levels. Also flag discrepancies where a PDE points to a different
address than the next level PDB or PTB BO.
v2:
* Fix address shift for GFXv8
* Redo PDB/PTB address checking to work on all generations
Signed-off-by: Felix
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