Re: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Guchun, in this case this is a bit awkward implemented. See the files in the data directory are for installation together with the libdrm library and NOT for the unit tests. Please move the file to tests/amdgpu instead. I would also re-consider this approach since we intentionally use the

答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Hi Christian, Thanks for your review. For SRIOV, amdgpu_gmc_agp_location() would not be called, since it do not use AGP. Also there is no need to use the min and max to judge which range is correct for using. Best Regards, Frank -邮件原件- 发件人: Christian König 发送时间: 2019年8月19日 15:07 收件人:

Re: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Yeah, I thought so. In this case we don't need this patch or is there anything I'm still missing? The use of min/max here is exactly to avoid having a SRIOV dependency here. Regards, Christian. Am 19.08.19 um 09:17 schrieb Min, Frank: > Hi Christian, > Thanks for your review. > For SRIOV,

[PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

From: "Tianci.Yin" so that more visible vram can be available for ocl applications. Signed-off-by: Tianci.Yin --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h| 1 - 3 files changed, 5

Re: [PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

Am 19.08.19 um 09:34 schrieb Tianci Yin: From: "Tianci.Yin" so that more visible vram can be available for ocl applications. Signed-off-by: Tianci.Yin --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 4 ++--

Re: [PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

Thanks Christian, I'll improve the coding style. From: Christian K?nig Sent: Monday, August 19, 2019 15:39 To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org Cc: Xiao, Jack ; Yuan, Xiaojie ; Zhang, Hawking Subject: Re: [PATCH] drm/amdgpu/psp: move TMR to

RE: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Christian, Thanks for your suggestion. Regarding the configuration file moving to test/amdgpu, I am fine with this. But reg putting all the tests in C code, though it looks like the unit test can stay self containing, but without one independent configuration file, user will find it's

Re: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Guchun, > Put all tests in c code, and extend the args when running amdgpu_test, which > will allow user can run special RAS test. Ah! Sounds like we have just a misunderstanding here. As far as I know we already have the functionality to select only specific tests to run from the command

[PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

From: "Tianci.Yin" so that more visible vram can be available for umd. Signed-off-by: Tianci.Yin --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h| 1 - 3 files changed, 5 insertions(+), 5

Re: [PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

Am 19.08.19 um 10:05 schrieb Tianci Yin: From: "Tianci.Yin" so that more visible vram can be available for umd. Signed-off-by: Tianci.Yin Assuming that you checked that we don't have other users who are using amdgpu_bo_create_kernel() without a CPU pointer this patch is Reviewed-by:

RE: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Christian, Yes, we already have functionality to select one specific test from the command line, but that command line is limited. It only allows user to select one general test, like ras test, but inside ras test, it has the enable/disable/error inject test respectively. Now what we are

Re: [PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

Thanks very much Christian! I scanned the whole code, only two functions pass in NULL cpu_addr, amdgpu_ttm_init() and gfx_v9_0_ngg_create_buf(), but the related BOs are not further mapped for cpu access. so I think this change is safe. From: Christian König

Re: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Am 16.08.19 um 10:59 schrieb Frank.Min: sriov would not use agp, so seperate the fb aperture setting. That won't work correctly. This way we don't program the AGP space into the hardware any more, but would still try to use it. We rather need to adjust the amdgpu_gmc_agp_location() function

Re: [PATCH ARM] selftests, arm64: fix uninitialized symbol in tags_test.c

On Mon, Aug 19, 2019 at 5:03 PM Will Deacon wrote: > > On Mon, Aug 19, 2019 at 03:14:42PM +0200, Andrey Konovalov wrote: > > Fix tagged_ptr not being initialized when TBI is not enabled. > > > > Dan Carpenter > > Guessing this was Reported-by, or has Dan introduced his own tag now? ;) Oops,

Re: [PATCH 06/14] drm/amd/display: Use dc helpers to compute timeslot distribution

On 8/19/19 11:50 AM, David Francis wrote: >> We were using drm helpers to convert a timing into its >> bandwidth, its bandwidth into pbn, and its pbn into timeslots >> >> These helpers >> -Did not take DSC timings into account >> -Used the link rate and lane count of the link's aux device, >>

Re: [PATCH 06/14] drm/amd/display: Use dc helpers to compute timeslot distribution

On 8/19/19 11:50 AM, David Francis wrote: > We were using drm helpers to convert a timing into its > bandwidth, its bandwidth into pbn, and its pbn into timeslots > > These helpers > -Did not take DSC timings into account > -Used the link rate and lane count of the link's aux device, > which

Re: [PATCH 14/14] drm/amd/display: Trigger modesets on MST DSC connectors

On 8/19/19 11:50 AM, David Francis wrote: > Whenever a connector on an MST network is attached, detached, or > undergoes a modeset, the DSC configs for each stream on that > topology will be recalculated. This can change their required > bandwidth, requiring a full reprogramming, as though a

Re: [PATCH 14/14] drm/amd/display: Trigger modesets on MST DSC connectors

>> Whenever a connector on an MST network is attached, detached, or >> undergoes a modeset, the DSC configs for each stream on that >> topology will be recalculated. This can change their required >> bandwidth, requiring a full reprogramming, as though a modeset >> was performed, even if that

Re: [PATCH 05/14] drm/amd/display: Enable SST DSC in DM

Tested-by: Mikita Lipski Mikita Lipski On 2019-08-19 11:50 a.m., David Francis wrote: > In create_stream_for_sink, check for SST DP connectors > > Parse DSC caps to DC format, then, if DSC is supported, > compute the config > > DSC hardware will be programmed by dc_commit_state > > Cc:

Re: [PATCH 07/14] drm/amd/display: Initialize DSC PPS variables to 0

On 8/19/19 11:50 AM, David Francis wrote: > For DSC MST, sometimes monitors would break out > in full-screen static. The issue traced back to the > PPS generation code, where these variables were being used > uninitialized and were picking up garbage. > > memset to 0 to avoid this > >

Re: [PATCH v7 0/9] drm: cec: convert DRM drivers to the new notifier API

Hi Dariusz, Hans, I can apply the dw-hdmi patches if necessary. Neil On 19/08/2019 11:38, Hans Verkuil wrote: > Hi all, > > The patches in this series can be applied independently from each other. > > If you maintain one of these drivers and you want to merge it for v5.4 > yourself, then

Re: [PATCH ARM] selftests, arm64: fix uninitialized symbol in tags_test.c

On Mon, Aug 19, 2019 at 03:14:42PM +0200, Andrey Konovalov wrote: > Fix tagged_ptr not being initialized when TBI is not enabled. > > Dan Carpenter Guessing this was Reported-by, or has Dan introduced his own tag now? ;) Got a link to the report? Will

Re: [bug report] drm/amd/powerplay: implement smc firmware v2.1 for smu11

Hi Dan, Thank you for reporting this bug to me, I will make a fix patch as soon as possible, when patch ready after I send copies to you review, thank you. Best Regards, Kevin From: Dan Carpenter Sent: Monday, August 19, 2019 9:03 PM To: Wang, Kevin(Yang) Cc:

[PATCH] drm/amd/powerplay: fix variable type errors in smu_v11_0_setup_pptable

fix size type errors, from uint32_t to uint16_t. it will cause only initializes the highest 16 bits in smu_get_atom_data_table function. Signed-off-by: Kevin Wang Reported-by: Dan Carpenter --- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

[PATCH 03/36] drm/amd/display: fix audio endpoint not getting disabled issue

From: Su Sung Chung [Why] Disable_audio_stream gets enum option as a paramenter which will decide if we free acquired resources or not. However checks for the option is guarded by the other condition which check if audio stream is getting diabled more than once. With both conditions combined, if

[PATCH 01/36] drm/amd/display: re structure odm to allow 4 to 1 support

From: Dmytro Laktyushkin Currently odm is handled using top_bottom pipe by special casing the differing opps to differentiate from mpc combine. Since top/bottom pipe list was made to track mpc muxing this creates difficulties in adding a 4 pipe odm case support. Rather than continue using mpc

[PATCH 02/36] drm/amd/display: Delete dead code in command_table_helper

From: Julian Parkin [Why] dig_encoder_sel_to_atom will always return zero on any ASIC version past DCE80 since programming of the FE selection is handled by driver, but the translation code was left in the function, making it look like a coding error. [How] Remove code that has no effect, and

[PATCH 05/36] drm/amd/display: load iram for abm 2.3

From: Josip Pavic [Why] ABM 2.3 firmware expects information in iRAM that differs from previous versions of ABM, so a mechanism is required to provide it with that information. [How] Extend the existing iRAM definition to include parameters added by ABM 2.3, and load it if DMCU is running ABM

[PATCH 06/36] drm/amd/display: fix dp stream enable

From: Dmytro Laktyushkin A previous odm change broke stream enable by always setting n_multiply as if odm was on. This fixes the check for odm by making sure opp count is >1 rather than not 0. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha ---

[PATCH 08/36] drm/amd/display: add null checks before logging

From: Wyatt Wood Adding NULL checks to various parameters in log_tf, to avoid nullptr errors Signed-off-by: Wyatt Wood Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha Acked-by: Nikola Cornij --- .../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c| 9 ++--- 1 file changed, 6

[PATCH 07/36] drm/amd/display: set Hratio and VRatio in dml

From: Ilya Bakoulin Set the writeback Hratio and Vratio in dml. Signed-off-by: Ilya Bakoulin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 4 1 file changed, 4 insertions(+) diff --git

Re: [PATCH v7 0/9] drm: cec: convert DRM drivers to the new notifier API

On 8/19/19 4:48 PM, Neil Armstrong wrote: > Hi Dariusz, Hans, > > I can apply the dw-hdmi patches if necessary. I'd appreciate it if you can do that. Thanks, Hans > > Neil > > On 19/08/2019 11:38, Hans Verkuil wrote: >> Hi all, >> >> The patches in this series can be applied

Re: [PATCH] drm/amd/powerplay: add smu_smc_read_sensor support for arcturus

On Fri, Aug 16, 2019 at 3:22 AM Wang, Kevin(Yang) wrote: > > the bellow patch refine the sensor read sequence, > but missed to add arcuturs support. (arcuturs_ppt.c) > > drm/amd/powerplay: change smu_read_sensor sequence in smu > > Signed-off-by: Kevin Wang > --- >

[PATCH 14/14] drm/amd/display: Trigger modesets on MST DSC connectors

Whenever a connector on an MST network is attached, detached, or undergoes a modeset, the DSC configs for each stream on that topology will be recalculated. This can change their required bandwidth, requiring a full reprogramming, as though a modeset was performed, even if that stream did not

[PATCH 12/14] drm/amd/display: Write DSC enable to MST DPCD

Rework the dm_helpers_write_dsc_enable callback to handle the MST case Depending on how DSC is done, the DP_DSC_ENABLE bit needs to be set on a different point For SST, use the link aux For endpoint DSC over DP-to-DP peer devices, use the output port For peer device DSC over DP-to-DP peer

[PATCH 08/14] drm/dp-mst: Parse FEC capability on MST ports

As of DP1.4, ENUM_PATH_RESOURCES returns a bit indicating if FEC can be supported up to that point in the MST network. The bit is the first byte of the ENUM_PATH_RESOURCES ack reply, bottom-most bit (refer to section 2.11.9.4 of DP standard, v1.4) That value is needed for FEC and DSC support

[PATCH 10/14] drm/dp-mst: Fill branch->num_ports

This field on drm_dp_mst_branch was never filled Initialize it to zero when the list of ports is created. When a port is added to the list, increment num_ports Signed-off-by: David Francis --- drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH 11/14] drm/amd/display: Validate DSC caps on MST endpoints

The first step in MST DSC is checking MST endpoints to see how DSC can be enabled Case 1: DP-to-DP peer device if the branch immediately upstream has - PDT = DP_PEER_DEVICE_DP_MST_BRANCHING (2) - DPCD rev. >= DP 1.4 - Exactly one input and one output - The output has PDT =

[PATCH 02/14] Revert "drm/amd/display: navi10 bring up skip dsc encoder config"

This reverts commit 5f2fd347eeff7d4ce271920efd47baaa18fe968c. Re-enable enc2_dp_set_dsc_config. This function caused warnings due to missing register definitions. With the registers added, this now works Signed-off-by: David Francis Reviewed-by: Roman Li Reviewed-by: Harry Wentland ---

[PATCH 06/14] drm/amd/display: Use dc helpers to compute timeslot distribution

We were using drm helpers to convert a timing into its bandwidth, its bandwidth into pbn, and its pbn into timeslots These helpers -Did not take DSC timings into account -Used the link rate and lane count of the link's aux device, which are not the same as the link's current cap -Did not take

[PATCH 09/14] drm/dp-mst: Export symbols for dpcd read/write

To use these functions in drm driver directories, they must be exported Signed-off-by: David Francis --- drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index

[PATCH 00/14] Display Stream Compression (DSC) for AMD Navi

This patchset enables Display Stream Compression (DSC) on DP connectors on Navi ASICs, both SST and DSC. 8k60 and 4k144 support requires ODM combine, an AMD internal feature that may be a bit buggy right now. Patches 1 through 5 enable DSC for SST. Most of the work was already done in the Navi

[PATCH 13/14] drm/amd/display: MST DSC compute fair share

If there is limited link bandwidth on a MST network, it must be divided fairly between the streams on that network Implement an algorithm to determine the correct DSC config for each stream The algorithm: This [ ] ( ) represents the range of bandwidths possible

Re: [PATCH ARM] selftests, arm64: fix uninitialized symbol in tags_test.c

On Mon, Aug 19, 2019 at 5:39 PM Will Deacon wrote: > > On Mon, Aug 19, 2019 at 05:16:37PM +0200, Andrey Konovalov wrote: > > On Mon, Aug 19, 2019 at 5:03 PM Will Deacon wrote: > > > > > > On Mon, Aug 19, 2019 at 03:14:42PM +0200, Andrey Konovalov wrote: > > > > Fix tagged_ptr not being

[PATCH 16/36] drm/amd/display: Refactoring VTEM

From: Ahmad Othman [Why] Video Timing Extended Metadata packet (VTEM) is not specific to freesync. So move it out of freesync module [How] - Moved VTEM from freesync module to info_packet module - Created new structure for VTEM parameters that can be used for VRR and FVA Signed-off-by: Ahmad

[PATCH 17/36] drm/amd/display: support spdif

From: Charlene Liu [Description] port spdif fix to staging: spdif hardwired to afmt inst 1. spdif func pointer spdif resource allocation (reserve last audio endpoint for spdif only) Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Bhawanpreet Lakha ---

[PATCH 13/36] drm/amd/display: cleaned up coding error in init_hw

From: Martin Leung [why] during a refactor a redundant code that has unknown behaviour was added. [how] removed old bad code Fixes: 7b0b6ee982ab018ecce70f661e676d059bfe8270 drm/amd/display: Make init_hw and init_pipes generic for seamless boot Signed-off-by: Martin Leung

[PATCH 15/36] drm/amd/display: 3.2.47

From: Anthony Koo Signed-off-by: Anthony Koo Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index

[PATCH 31/36] drm/amd/display: Expose OTG_V_TOTAL_MID for HW Diags

From: Bayan Zabihiyan [Why] Existing HW Features, HW Diags test requested that the registers be exposed. [How] Add V_TOTAL_MID to existing DC structures. Make sure values are passed down throughout DC Add Register definition. Program the additional registers Add additional Logic for

[PATCH 21/36] drm/amd/display: Fix number of slices not being checked for dsc

From: Nikola Cornij [why] num_slices_h was not being checked [How] Fix the typo and check num_slices_h Signed-off-by: Nikola Cornij Reviewed-by: Harry Wentland Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 26/36] drm/amd/display: Enable HW rotation

From: Jaehyun Chung [Why] HW rotation is not enabled. Calculations for cursor rotation are wrong for the values passed to set_cursor_position. [How] Swap Src rect and height and vertically mirror surface for the correct surface rotation direction. Cursor position is rotated according to angle.

[PATCH 34/36] drm/amd/display: Properly read LVTMA_PWRSEQ_CNTL

From: Joshua Aberback [Why] The register LVTMA_PWRSEQ_CNTL is used to determine the power state of the embedded display. Currently we do not actually read this register's values, so during power down we think that this display is already off, so we skip calling into VBIOS to actually turn it

[PATCH 32/36] drm/amd/display: Use res_cap to acquire i2c instead of pipe count

From: Derek Lai [Why] We should be using the ddc_num from res_caps. As the pipe count != number of i2c resources. [How] Use ddc_num from res_cap instead of pipe count. Signed-off-by: Derek Lai Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha ---

[PATCH 30/36] drm/amd/display: fix DML not calculating delivery time

From: Jun Lei [why] Calculating DCFCLK DS time requires calculating delivery time for luma/chroma, but this value is not calculated in DMLv2, it was inadvertently removed when porting DMLv2 [how] Add the calculation back Signed-off-by: Jun Lei Reviewed-by: Dmytro Laktyushkin Acked-by:

[PATCH 28/36] drm/amd/display: set av_mute in hw_init for HDMI

From: Charlene Liu [Description] OS will reserve HW state in UEFI mode. Driver init_hw reset to RGB which caused HDMI green in YCbCr mode. read HW blank_color based on acc_mode. Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Bhawanpreet Lakha ---

[PATCH 12/36] drm/amd/display: Add VM page fault handle implementation

From: Jaehyun Chung [How] Allocate memory for default page and program memory block addr into default page addr register. Signed-off-by: Jaehyun Chung Reviewed-by: Jun Lei Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dc.h | 1 +

[PATCH 25/36] drm/amd/display: add Cursor Degamma logic for DCN2

From: Bayan Zabihiyan [Why] We need to have the ability to to tell us set degamma on the cursor. [How] Pass a flag down to register programming that tells us if the current surface format needs cursor degamma. Signed-off-by: Bayan Zabihiyan Reviewed-by: Krunoslav Kovac Acked-by: Bhawanpreet

[PATCH 27/36] drm/amd/display: Add Logging for Gamma Related information

From: Wyatt Wood [Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Fix formatting for easier graphing. Signed-off-by: Wyatt Wood Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha ---

[PATCH 22/36] drm/amd/display: fix dcn20 odm dpp programming

From: Dmytro Laktyushkin dcn20 requires special casing for odm. This change treats odm as alternative to mpc tree on dcn20. This is planned to be fixed in a future refactor Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha ---

[PATCH 33/36] drm/amd/display: revert wait in pipelock

From: Jun Lei [why] Previous workaround to prevent a vsync flip to be converted to immediate flip is no longer needed, and is risky because there are cases where it can result in infinite loop. [how] Remove wait loop (which is potentially infinite) before locking pipe Signed-off-by: Jun Lei

[PATCH 35/36] drm/amd/display: flicking observed while installing driver on Navi10 CF

From: hersen wu [WHY] value of dchub_ref_clock is decided by dchubbub global timer settings which is programmed by vbios command table disp_init. for multi-GPU case, vbios is posted only for primary GPU. without vbios posted for the secondary GPU, value of dchub_ref_clock is not set properly.

[PATCH 29/36] drm/amd/display: MST topology debugfs

From: David Francis DRM provides drm_dp_mst_dump_topology, which prints useful information about MST devices Hook this up to a debugfs file named amdgpu_mst_topology Signed-off-by: David Francis Acked-by: Bhawanpreet Lakha --- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 24

[PATCH 14/36] drm/amd/display: remove unused function

From: Qingqing Zhuo [Why] This function is not being used, it was left in when introducing DCN2 [How] Remove the function Signed-off-by: Qingqing Zhuo Reviewed-by: Eric Bernstein Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c | 1 -

[PATCH 18/36] drm/amd/display: fix stuck test pattern on right half of display

From: Zi Yu Liao [why] With visual confirm enabled, displays where ODM combine is enabled has a test pattern stuck on the right half of the display even though the display is unblanked. [how] Add a condition to not show the colour ramp test pattern when the display is unblanked. Signed-off-by:

[PATCH 20/36] drm/amd/display: fix odm pipe copy

From: Dmytro Laktyushkin ODM next and prev pipe were missing from dc_copy_state Signed-off-by: Dmytro Laktyushkin Reviewed-by: Nikola Cornij Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++ drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-

[PATCH 10/36] drm/amd/display: Zero-out dsc init regs

From: Nikola Cornij [why] Before a statically allocated PPS data structure, that did get zeroed-out at startup, had been re-used for making packed PPS SDP. With S3 fix, using a non-initialized PPS data structure was introduced, while wrongly assuming it'd get initialized before it's populated.

[PATCH 11/36] drm/amd/display: refactor Device ID for external chips

From: Qingqing Zhuo IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha --- .../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 2 +-

[PATCH 19/36] drm/amd/display: fix trigger not generated for freesync

From: Yogesh Mohan Marimuthu [Why] In newer hardware MANUAL_FLOW_CONTROL is not a trigger bit. Due to this front porch is fixed and in these hardware freesync does not work. [How] Change the programming to generate a pulse so that the event will be triggered, front porch will be cut short and

[PATCH 24/36] drm/amd/display: fix odm validation

From: Dmytro Laktyushkin Update bw validation to use prev and next odm pipe pointers for populating dml inputs. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha --- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 40 +-- 1 file changed,

[PATCH 36/36] drm/amd/display: 3.2.48

From: Anthony Koo Signed-off-by: Anthony Koo Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index

[PATCH 23/36] drm/amd/display: fix odm stream release

From: Dmytro Laktyushkin Need to memset all odm pipes when calling dc_remove_stream_from_ctx Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 65 +-- 1 file changed, 32 insertions(+),

[PATCH 03/14] Revert "drm/amd/display: add global master update lock for DCN2"

This reverts commit 55a6f5bbcf00a49565946c0a9b8c716313dc6c05. This commit was accidentally promoted twice Signed-off-by: David Francis Reviewed-by: Roman Li Reviewed-by: Harry Wentland --- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 4 -- .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c |

[PATCH 01/14] Revert "drm/amd/display: skip dsc config for navi10 bring up"

This reverts commit 55ad81f3510ec1a1c19e6a4d8a6319812d07d256. optc dsc config was causing warnings due to missing register definitions. With the registers restored, the function can be re-enabled The reverted commit also disabled sanity checks and dsc power gating. The sanity check warnings are

[PATCH 05/14] drm/amd/display: Enable SST DSC in DM

In create_stream_for_sink, check for SST DP connectors Parse DSC caps to DC format, then, if DSC is supported, compute the config DSC hardware will be programmed by dc_commit_state Cc: Mikita Lipski Signed-off-by: David Francis --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32

[PATCH 04/14] Revert "drm/amd/display: Fix underscan not using proper scaling"

This reverts commit 80e80ec817f161560b4159608fb41bd289abede3. This commit fixed an issue with underscan commits not updating all needed timing values, but through various refactors it is no longer necessary. It causes corruption on odm combine by overwriting the halved h_active in the stream

[PATCH 07/14] drm/amd/display: Initialize DSC PPS variables to 0

For DSC MST, sometimes monitors would break out in full-screen static. The issue traced back to the PPS generation code, where these variables were being used uninitialized and were picking up garbage. memset to 0 to avoid this Signed-off-by: David Francis ---

[PATCH 09/36] drm/amd/display: Implement voltage limitation stub

From: Joseph Gravenor add new function to get the voltage at the end of dcn_validate_bandwidth, to check against the highest voltage we allow. Created a stub to allow for optimizations Signed-off-by: Joseph Gravenor Reviewed-by: Eric Yang Acked-by: Bhawanpreet Lakha Acked-by: Sun peng Li

[PATCH 04/36] drm/amd/display: fix MPO HUBP underflow with Scatter Gather

From: Zi Yu Liao [why] With Scatter Gather enabled, HUBP underflows during MPO enabled video playback. hubp_init has a register write that fixes this problem, but the register is cleared when HUBP gets power gated. [how] Make a call to hubp_init during enable_plane, so that the fix can be

[PATCH 00/36] DC Patches 19 Aug 2019

Summary Of Changes *ODM fixes *Gamma logging *DSC fixes Ahmad Othman (1): drm/amd/display: Refactoring VTEM Anthony Koo (2): drm/amd/display: 3.2.47 drm/amd/display: 3.2.48 Bayan Zabihiyan (2): drm/amd/display: add Cursor Degamma logic for DCN2 drm/amd/display: Expose OTG_V_TOTAL_MID

Re: [PATCH ARM] selftests, arm64: fix uninitialized symbol in tags_test.c

On Mon, Aug 19, 2019 at 05:16:37PM +0200, Andrey Konovalov wrote: > On Mon, Aug 19, 2019 at 5:03 PM Will Deacon wrote: > > > > On Mon, Aug 19, 2019 at 03:14:42PM +0200, Andrey Konovalov wrote: > > > Fix tagged_ptr not being initialized when TBI is not enabled. > > > > > > Dan Carpenter > > > >

Re: linux-next: Tree for Aug 19 (amdgpu)

Hi all, On Mon, 19 Aug 2019 18:34:41 -0700 Randy Dunlap wrote: > > On 8/19/19 2:18 AM, Stephen Rothwell wrote: > > Hi all, > > > > Changes since 20190816: > > > > on x86_64: > > ../drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c: In function ‘amdgpu_exit’: >

RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings

Ping.. From: Quan, Evan Sent: Monday, August 19, 2019 1:27 PM To: Feng, Kenneth ; Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings Yes, the lowest settings for thermal controller is 0. Regards Evan From: Feng,

RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

Ping.. From: Quan, Evan Sent: Friday, August 16, 2019 4:00 PM To: Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value Since smu_get_atom_data_table() was already used in smu_v11_0_get_vbios_bootup_values(). We should get all our

Re: [PATCH] drm/amd/powerplay: correct typo

Reviewed-by: Kevin Wang Best Regards, Kevin From: amd-gfx on behalf of Evan Quan Sent: Tuesday, August 20, 2019 12:23 PM To: amd-gfx@lists.freedesktop.org Cc: Quan, Evan Subject: [PATCH] drm/amd/powerplay: correct typo "COMPUTE" was wrongly spelled as

RE: [PATCH] drm/amd/powerplay: fix variable type errors in smu_v11_0_setup_pptable

Please add the followings to the description part. With that added, the patch is Reviewed-by: Evan Quan " This fixes the following static checker warning. drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:390 smu_v11_0_setup_pptable() warn: passing casted pointer '' to

[PATCH] drm/amdgpu: correct ras error count type

Use unsigned long type for the same ras count variable. This will avoid overflow on 64 bit system. Change-Id: I011406d81bad69a65433b63960e1691c4959bbc5 Signed-off-by: Guchun Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 4 ++--

Re: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value

Reviewed-by: Kevin Wang Best Regards, Kevin From: Quan, Evan Sent: Tuesday, August 20, 2019 10:09 AM To: amd-gfx@lists.freedesktop.org Cc: Wang, Kevin(Yang) Subject: RE: [PATCH 3/4] drm/amd/powerplay: get bootup fclk value Ping.. From: Quan, Evan Sent:

RE: [PATCH] drm/amdgpu: correct ras error count type

Consider amdgpu_ras_error_query < 0 and !con are almost impossible, the patch is: Reviewed-by: Tao Zhou > -Original Message- > From: amd-gfx On Behalf Of > Guchun Chen > Sent: 2019年8月20日 10:25 > To: amd-gfx@lists.freedesktop.org; Zhang, Hawking > ; Li, Dennis ; Pan, Xinhui > ; Zhou1,

RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings

Reviewed-by: Kenneth Feng mailto:kenneth.f...@amd.com>> From: Quan, Evan Sent: Tuesday, August 20, 2019 10:10 AM To: amd-gfx@lists.freedesktop.org Cc: Feng, Kenneth ; Wang, Kevin(Yang) Subject: RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings Ping.. From: Quan, Evan

Re: [PATCH] drm/amd/powerplay: add smu_smc_read_sensor support for arcturus

From: Alex Deucher Sent: Monday, August 19, 2019 11:33 PM To: Wang, Kevin(Yang) Cc: amd-gfx@lists.freedesktop.org ; Feng, Kenneth ; Quan, Evan ; Huang, Ray Subject: Re: [PATCH] drm/amd/powerplay: add smu_smc_read_sensor support for arcturus On Fri, Aug 16,

[PATCH] drm/amd/powerplay: correct typo

"COMPUTE" was wrongly spelled as "CUSTOM". Change-Id: I11693c0e55c2ce5c889d57bb7411fdf9795a8739 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

RE: [PATCH] drm/amd/powerplay: remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h

> -Original Message- > From: Wang, Kevin(Yang) > Sent: Tuesday, August 20, 2019 1:36 PM > To: amd-gfx@lists.freedesktop.org > Cc: Huang, Ray ; Wang, Kevin(Yang) > > Subject: [PATCH] drm/amd/powerplay: remove duplicate macro > smu_get_uclk_dpm_states in amdgpu_smu.h > > remove duplicate

Re: [PATCH v7 0/9] drm: cec: convert DRM drivers to the new notifier API

Hi all, The patches in this series can be applied independently from each other. If you maintain one of these drivers and you want to merge it for v5.4 yourself, then please do so and let me know. If you prefer I commit it to drm-misc, then please review and (hopefully) Ack the patch. I would

Re: 答复: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

> As I point out. For SRIOV, amdgpu_gmc_agp_location() would not be called, so > the value calculation would not be valid. Yeah, that is a good point. The values are zero initialized, but that is probably not correct in this moment. agp_start should be set to 0x and agp_end to 0x0, that

Re: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Guchun, yeah, I mean the requirement is perfectly valid and yes I agree that we should probably extend the command line parameters in this case. The main problem is not the additional external library requirement, but rather that we need an external file additional to amdgpu_test. See the

Re: [PATCH] drm/amdgpu/psp: move TMR to cpu invisible vram region

OH, STOP! Good that we talked about that because that would have caused quite a bunch of trouble. The case in amdgpu_ttm_init() would break, we intentionally reserve memory at the beginning of the visible space here to avoid problem switching between VBIOS and KMS. I suggest to first add a

RE: [PATCH libdrm] amdgpu: add mmhub ras inject unit test

Hi Christian, Appreciate your concern and suggestion! I am fine to remove the external file and move all test configurations into C code. I will prepare patches to address this later. Regards, Guchun -Original Message- From: Koenig, Christian Sent: Monday, August 19, 2019 4:42 PM To:

[PATCH] drm/amd/powerplay: remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h

remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h " #define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \ ((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0) #define

Re: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings

I don't recommend it. each asic maybe has different thermal policy, you can custom this value in asic file . and your patch define a new array in smu_v11_0.h header file. it's never done that before, and the code looks is not clearly. Best Regards, Kevin From:

答复: 答复: [PATCH 3/3] amd/amdgpu: seperate sriov fb aperture setting

Hi Christian, As I point out. For SRIOV, amdgpu_gmc_agp_location() would not be called, so the value calculation would not be valid. Would you please give more info why we need the AGP except for the zfb? For another, whether you review the other patches? Best Regards, Frank -邮件原件-

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