And BTW amdgpu_ctx_fence_time() should probably be static.
Christian.
Am 12.05.21 um 08:55 schrieb Christian König:
In this case amdgpu_ctx_fence_time should probably be changed to
initialize the variable itself.
That is really bad coding style otherwise.
Christian.
Am 11.05.21 um 20:14
In this case amdgpu_ctx_fence_time should probably be changed to
initialize the variable itself.
That is really bad coding style otherwise.
Christian.
Am 11.05.21 um 20:14 schrieb Nieto, David M:
[AMD Official Use Only - Internal Distribution Only]
The local variables need to be
Am 12.05.21 um 14:34 schrieb Philip Yang:
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
requires TLB flush, otherwise page table walker will not read updated
PDE0.
Change page table update mapping
On Wednesday, May 12th, 2021 at 3:04 PM, Ville Syrjälä
wrote:
> > Adoption:
> >
> > A KDE dev wants to implement the settings in the KDE settings GUI:
> >
> > https://gitlab.freedesktop.org/drm/amd/-/issues/476#note_912370
> >
> > Tuxedo Computers (my employer) wants to implement the settings
Hello,
In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
properties I propose 4 new properties:
"preferred pixel encoding", "active color depth", "active color range", and
"active pixel encoding"
Motivation:
Current monitors have a variety pixel encodings available:
This is a note to let you know that I've just added the patch titled
drm/amd/display: Reject non-zero src_y and src_x for video planes
to the 5.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the
Hi Christian,
I can confirm that the patch provided fixes the issue in kernel version 5.12.2
Thank you.
On Wed, May 12, 2021 at 6:21 AM Christian König
wrote:
>
> Hi guys,
>
> adding a few people who ran into the problem as well and opened a kernel
> bug.
>
> Am 07.05.21 um 17:11 schrieb
Clean up the following includecheck warning:
./drivers/gpu/drm/amd/display/dc/core/dc.c: hubp.h is included more than
once.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 -
1 file changed, 1 deletion(-)
diff --git
This is a note to let you know that I've just added the patch titled
drm/amd/display: Reject non-zero src_y and src_x for video planes
to the 5.11-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the
Hi,
so this is a drive-by review using the lore.kernel.org mail because I
wasn't CCed on this.
On Tue, May 11, 2021 at 09:30:58PM -0400, Mukul Joshi wrote:
> +static int amdgpu_bad_page_notifier(struct notifier_block *nb,
> + unsigned long val, void *data)
> +{
>
This is a note to let you know that I've just added the patch titled
drm/amd/display: Reject non-zero src_y and src_x for video planes
to the 5.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the
This is a note to let you know that I've just added the patch titled
drm/amd/display: Reject non-zero src_y and src_x for video planes
to the 5.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
requires TLB flush, otherwise page table walker will not read updated
PDE0.
Change page table update mapping to return free_table flag to indicate
the
Hi guys,
adding a few people who ran into the problem as well and opened a kernel
bug.
Am 07.05.21 um 17:11 schrieb Christian König:
Hi Takashi,
Am 07.05.21 um 17:08 schrieb Takashi Iwai:
Hi,
we've received a regression report showing NULL dereference Oops with
radeon driver on 5.12
On Wed, May 12, 2021 at 02:06:56PM +0200, Werner Sembach wrote:
> Hello,
>
> In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
> properties I propose 4 new properties:
> "preferred pixel encoding", "active color depth", "active color range", and
> "active pixel encoding"
When using Vega 20 with RAS support and RAS is
enabled, the system interactivity is extremely
slow, to the point of being unusable. After
debugging, it was determined that this is due to
the polling loop performed for
AMDGPU_CTX_OP_QUERY_STATE2 under
amdgpu_ctx_ioctl(), which seems to be executed
On QUERY2 IOCTL don't query counts of correctable
and uncorrectable errors, since when RAS is
enabled and supported on Vega20 server boards,
this takes insurmountably long time, in O(n^3),
which slows the system down to the point of it
being unusable when we have GUI up.
Fixes: ae363a212b14
Invalid pages can be the result of pages that have been migrated
already due to copy-on-write procedure or pages that were never
migrated to VRAM in first place. This is not an issue anymore,
as pranges now support mixed memory domains (CPU/GPU).
Signed-off-by: Alex Sierra
---
This is for debug purposes only.
It conditionally generates partial migrations to test mixed
CPU/GPU memory domain pages in a prange easily.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 14 ++
1 file changed, 14 insertions(+)
diff --git
[Why]
svm ranges can have mixed pages from device or system memory.
A good example is, after a prange has been allocated in VRAM and a
copy-on-write is triggered by a fork. This invalidates some pages
inside the prange. Endding up in mixed pages.
[How]
By classifying each page inside a prange,
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
requires TLB flush, otherwise page table walker will not read updated
PDE0.
Change page table update mapping to return free_table flag to indicate
the
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
On 2021-05-12 11:54 a.m., Felix
Kuehling wrote:
Am 2021-05-12 um 8:38 a.m. schrieb Christian König:
Am 12.05.21 um 14:34 schrieb Philip Yang:
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
From: Aurabindo Pillai
[Why]
Add Beige Goby (DCN303) resource, irq service, & dmub loader.
v2: fix nbio include (Alex)
Signed-off-by: Chris Park
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/Makefile |1 +
From: Chengming Gui
Same as dimgrey_cavefish
v2: fix comments typo
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Chengming Gui
The gfx version of beige_goby is 10.3,
identical to sienna_cichlid,
follow the way of sienna_cichlid
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 +
1
From: Joshua Aberback
[Why]
This update was made for DCN30, but it is needed for DCN303 as well
Signed-off-by: Joshua Aberback
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Chengming Gui
Enable memory training on newer hw revisions.
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Tao Zhou
Enable athub/mmhub power gating for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Aurabindo Pillai
[Why]
Add beige_goby_ta.bin to module firmware table and call psp init for TA
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Aurabindo Pillai
[Why]
Absense of this callback causes null pointer dereference.
Add the corresponding callback in dcn303 resources.
Fixes: 8ea9608379 ("drm/amd/display: fix dcn3+ bw validation soc param update
sequence")
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Deucher
---
From: Aurabindo Pillai
[Why]
Adds DCN IP block initialization for Beige Goby
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 4
2 files changed, 5
From: Aurabindo Pillai
[Why]
MALL requires idle optimizations to be enabled. This enables MALL
feature on dcn303
Signed-off-by: Aurabindo Pillai
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 1 +
1 file changed, 1
From: Chengming Gui
Add ip offset definition for beige_goby and initialize it
v2: squash in fixes (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile |3 +-
From: Aurabindo Pillai
[How]
* Add MIT license to all new files as SPDX tag.
* Fix copyright year
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn303/Makefile| 8 ++-
.../drm/amd/display/dc/dcn303/dcn303_dccg.h | 22 ++-
From: Aurabindo Pillai
[Why]
Adds the firmware definition and missing cases statement
hooks for Beige Goby support in AMDGPU DM.
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++
1
From: Chengming Gui
Same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
From: Chengming Gui
Same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Tao Zhou
Enable cgls to improve the runtime power efficiency.
Signed-off-by: Tao Zhou
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
Enable gfxoff in driver side based on SMC#73.3
v2: fix typo 'Eanble' --> 'Enable'
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 1
From: Chengming Gui
Enable sdma block for beige_goby, same as sienna_cichlid
v2: share the same setting of sdma instance num with vangogh
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Suggested-by: Alexander Deucher
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
From: Tao Zhou
Enable ih clock gating for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
Add external id and set clock gating for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Tao Zhou
Enable hdp MGCG and LS for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Tao Zhou
Enable athub cg for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
From: Veerabadhran Gopalakrishnan
Enable VCN CG for BEIGE GOBY
Signed-off-by: Veerabadhran Gopalakrishnan
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Jiansong Chen
beige_goby has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.
Signed-off-by: Jiansong Chen
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Chengming Gui
Switch from softPPTable to VBIOS PPTable.
v2: drop extra parens (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
From: Chengming Gui
Enable ih block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files
On Wed, May 12, 2021 at 9:04 AM Ville Syrjälä
wrote:
>
> On Wed, May 12, 2021 at 02:06:56PM +0200, Werner Sembach wrote:
> > Hello,
> >
> > In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
> > properties I propose 4 new properties:
> > "preferred pixel encoding", "active
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
These patches enable initial support for Beige Goby, a new GPU from
AMD. This includes support for GFX, compute, multimedia, display,
and power management.
Due to the size of the new register headers (patch 41), I didn't send them out,
but you can view the entire patch set in my git tree here:
From: Chengming Gui
Same as navi series
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: Chengming Gui
Enable gmc block for beige_goby, same as sienna_cichlid
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files
From: Tao Zhou
Enable GFX MGCG, CGCG and 3DCG for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
Use direct load for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Chengming Gui
Enable gfx block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2
From: Chengming Gui
Rather than gpu info firmware.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Chengming Gui
Add the function pointer.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
From: Chengming Gui
Use soft-pptable for beige_goby
v2: fix format
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c| 3 +++
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 1 +
From: Chengming Gui
add general PSP support for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 +--
From: Chengming Gui
Use new struct name to identify beige_goby pptable
due to extra added fields.
v2: squash in updates (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Jiansong Chen
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
.../pm/inc/smu11_driver_if_sienna_cichlid.h | 366
From: Veerabadhran Gopalakrishnan
Enabled VCN support for Beige Goby chip
Signed-off-by: Veerabadhran Gopalakrishnan
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 ++
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +-
From: Chengming Gui
Add mode1 reset as the default reset method for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
Same as dimgrey_cavefish to support WAIT_REG_MEM packet.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Chengming Gui
Add support for beige_goby cp/rlc firmware
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Chengming Gui
Use macro to get the pptable members for different pptable structures.
v2: abstract the table operations especially get the table members
to simplify cover the two different pptable structures.
v3: move pptable operations related structures and functions into ppt.c
From: Tao Zhou
Enable mc CG and LS for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
add mmCGTT_SPI_{RA0/RA1}_CLK_CTRL setting
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Chengming Gui
Add chip type for beige_goby
v2: fix enum count (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
include/drm/amd_asic_type.h| 1 +
2
From: Hawking Zhang
execute gc_10_3_5 golden registers one-time initialization
Signed-off-by: Hawking Zhang
Reviewed-by: Jiansong Chen
Reviewed-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 38 ++
1 file changed, 38 insertions(+)
diff --git
For decoding GPUVM page faults.
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 27 +
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
From: Chengming Gui
Add KFD support for beige_goby
v2: fix asic name typo
v3: squash in updates (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 61 +++
From: Chengming Gui
Add virtual ip block for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth
On Wed, May 12, 2021 at 6:18 AM Christian König
wrote:
>
> Imported BOs don't have a pagelist any more.
>
> Signed-off-by: Christian König
> Fixes: 0575ff3d33cd ("drm/radeon: stop using pages with
> drm_prime_sg_to_page_addr_arrays v2")
> CC: sta...@vger.kernel.org # 5.12
Reviewed-by: Alex
Am 12.05.21 um 16:01 schrieb Andrey Grodzovsky:
Ping - need a confirmation it's ok to keep this as a single patch given
my explanation bellow.
It was just an suggestion. Key point is the approach sounds sane to me,
but I can't say much about the psp code for example.
So maximum I can give
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
Ping - need a confirmation it's ok to keep this as a single patch given
my explanation bellow.
Andrey
On 2021-05-11 1:52 p.m., Andrey Grodzovsky wrote:
On 2021-05-11 2:50 a.m., Christian König wrote:
Am 10.05.21 um 18:36 schrieb Andrey Grodzovsky:
This should prevent writing to memory or
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
Am 2021-05-12 um 8:38 a.m. schrieb Christian König:
>
>
> Am 12.05.21 um 14:34 schrieb Philip Yang:
>> Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
>> If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
>> requires TLB flush, otherwise page table walker
Hopefyllu Alex can chime in on this.
I will respin V7 soon.
Andrey
On 2021-05-12 10:06 a.m., Christian König wrote:
Am 12.05.21 um 16:01 schrieb Andrey Grodzovsky:
Ping - need a confirmation it's ok to keep this as a single patch given
my explanation bellow.
It was just an suggestion. Key
Some of the stuff in amdgpu_device_fini such as HW interrupts
disable and pending fences finilization must be done right away on
pci_remove while most of the stuff which relates to finilizing and
releasing driver data structures can be kept until
drm_driver.release hook is called, i.e. when the
Use it to call disply code dependent on device->drv_data
before it's set to NULL on device unplug
v5: Move HW finilization into this callback to prevent MMIO accesses
post cpi remove.
Signed-off-by: Andrey Grodzovsky
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Handle all DMA IOMMU gropup related dependencies before the
group is removed.
v5: Drop IOMMU notifier and switch to lockless call to ttm_tt_unpopulate
v6: Drop the BO unamp list
v7:
Drop amdgpu_gart_fini
In amdgpu_ih_ring_fini do uncinditional check (!ih->ring)
to avoid freeing uniniitalized
This should prevent writing to memory or IO ranges possibly
already allocated for other uses after our device is removed.
v5:
Protect more places wher memcopy_to/form_io takes place
Protect IB submissions
v6: Switch to !drm_dev_enter instead of scoping entire code
with brackets.
v7:
Drop guard
We don't want to rearm the timer if driver hook reports
that the device is gone.
v5: Update drm_gpu_sched_stat values in code.
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +++
1 file changed, 7 insertions(+), 4
On device removal reroute all CPU mappings to dummy page.
v3:
Remove loop to find DRM file and instead access it
by vma->vm_file->private_data. Move dummy page installation
into a separate function.
v4:
Map the entire BOs VA space into on demand allocated dummy page
on the first fault for that
Helps to expdite HW related stuff to amdgpu_pci_remove
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_device.c| 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
On device removal reroute all CPU mappings to dummy page
per drm_file instance or imported GEM object.
v4:
Update for modified ttm_bo_vm_dummy_page
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 21 -
1 file
This helps converting PCI drivers sysfs attributes to static.
Analogous to' commit b71b283e3d6d ("USB: add support for dev_groups to
struct usb_driver")'
Signed-off-by: Andrey Grodzovsky
Suggested-by: Greg Kroah-Hartman
Acked-by: Bjorn Helgaas
---
drivers/pci/pci-driver.c | 1 +
This allows to remove explicit creation and destruction
of those attrs and by this avoids warnings on device
finalizing post physical device extraction.
v5: Use newly added pci_driver.dev_groups directly
Signed-off-by: Andrey Grodzovsky
Acked-by: Christian König
---
If removing while commands in flight you cannot wait to flush the
HW fences on a ring since the device is gone.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git
Return DRM_TASK_STATUS_ENODEV back to the scheduler when device
is not present so they timeout timer will not be rearmed.
v5: Update to match updated return values in enum drm_gpu_sched_stat
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Christian König
---
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