[PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in jpeg_v4_0_hw_fini
During the suspend, the jpeg_v4_0_hw_init function will
use the amdgpu_irq_put to disable the irq of jpeg.inst, but it
was not enabled during the resume process, which resulted in a
call trace during the GPU reset process.
[ 50.497562] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
[ 50.497619] RSP: 0018:aa2400fcfcb0 EFLAGS: 00010246
[ 50.497620] RAX: RBX: 0001 RCX:
[ 50.497621] RDX: RSI: RDI:
[ 50.497621] RBP: aa2400fcfcd0 R08: R09:
[ 50.497622] R10: R11: R12: 99b2105242d8
[ 50.497622] R13: R14: 99b21050 R15: 99b21050
[ 50.497623] FS: () GS:99b51848()
knlGS:
[ 50.497623] CS: 0010 DS: ES: CR0: 80050033
[ 50.497624] CR2: 7f9d32aa91e8 CR3: 0001ba21 CR4: 00750ee0
[ 50.497624] PKRU: 5554
[ 50.497625] Call Trace:
[ 50.497625]
[ 50.497627] jpeg_v4_0_hw_fini+0x43/0xc0 [amdgpu]
[ 50.497693] jpeg_v4_0_suspend+0x13/0x30 [amdgpu]
[ 50.497751] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
[ 50.497802] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
[ 50.497854] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
[ 50.497905] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
[ 50.498005] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
[ 50.498060] process_one_work+0x21f/0x400
[ 50.498063] worker_thread+0x200/0x3f0
[ 50.498064] ? process_one_work+0x400/0x400
[ 50.498065] kthread+0xee/0x120
[ 50.498067] ? kthread_complete_and_exit+0x20/0x20
[ 50.498068] ret_from_fork+0x22/0x30
Fixes: 86e8255f941e ("drm/amdgpu: add JPEG 4.0 RAS poison consumption handling")
Signed-off-by: Horatio Zhang
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
index 77e1e64aa1d1..b5c14a166063 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
@@ -66,6 +66,13 @@ static int jpeg_v4_0_early_init(void *handle)
return 0;
}
+static int jpeg_v4_0_late_init(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ return amdgpu_irq_get(adev, >jpeg.inst->irq, 0);
+}
+
/**
* jpeg_v4_0_sw_init - sw init for JPEG block
*
@@ -696,7 +703,7 @@ static int jpeg_v4_0_process_interrupt(struct amdgpu_device
*adev,
static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {
.name = "jpeg_v4_0",
.early_init = jpeg_v4_0_early_init,
- .late_init = NULL,
+ .late_init = jpeg_v4_0_late_init,
.sw_init = jpeg_v4_0_sw_init,
.sw_fini = jpeg_v4_0_sw_fini,
.hw_init = jpeg_v4_0_hw_init,
--
2.34.1
RE: [PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in vcn_v4_0_hw_fini
[AMD Official Use Only - General]
> -Original Message-
> From: amd-gfx On Behalf Of Horatio
> Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, HaoPing (Alan) ; Zhang, Horatio
> ; Xu, Feifei ; Zhou1, Tao
> ; Jiang, Sonny ; Limonciello,
> Mario ; Liu, Leo ; Zhang,
> Hawking
> Subject: [PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in
> vcn_v4_0_hw_fini
>
> During the suspend, the vcn_v4_0_hw_init function will use the amdgpu_irq_put
> to disable the irq of vcn.inst, but it was not enabled during the resume
> process,
> which resulted in a call trace during the GPU reset process.
>
> [ 44.563572] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
> [ 44.563629] RSP: 0018:b36740edfc90 EFLAGS: 00010246
> [ 44.563630] RAX: RBX: 0001 RCX:
>
> [ 44.563630] RDX: RSI: RDI:
>
> [ 44.563631] RBP: b36740edfcb0 R08: R09:
>
> [ 44.563631] R10: R11: R12:
> 954c568e2ea8
> [ 44.563631] R13: R14: 954c568c R15:
> 954c568e2ea8
> [ 44.563632] FS: () GS:954f584c()
> knlGS:
> [ 44.563632] CS: 0010 DS: ES: CR0: 80050033
> [ 44.563633] CR2: 7f028741ba70 CR3: 00026ca1 CR4:
> 00750ee0
> [ 44.563633] PKRU: 5554
> [ 44.563633] Call Trace:
> [ 44.563634]
> [ 44.563634] vcn_v4_0_hw_fini+0x62/0x160 [amdgpu]
> [ 44.563700] vcn_v4_0_suspend+0x13/0x30 [amdgpu]
> [ 44.563755] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
> [ 44.563806] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
> [ 44.563858] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
> [ 44.563909] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
> [ 44.564006] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
> [ 44.564061] process_one_work+0x21f/0x400
> [ 44.564062] worker_thread+0x200/0x3f0
> [ 44.564063] ? process_one_work+0x400/0x400
> [ 44.564064] kthread+0xee/0x120
> [ 44.564065] ? kthread_complete_and_exit+0x20/0x20
> [ 44.564066] ret_from_fork+0x22/0x30
>
> Fixes: ea5309de7388 ("drm/amdgpu: add VCN 4.0 RAS poison consumption
> handling")
> Signed-off-by: Horatio Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 17 -
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index bf0674039598..b55eb1bf3e30 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -281,6 +281,21 @@ static int vcn_v4_0_hw_init(void *handle)
> return r;
> }
>
> +static int vcn_v4_0_late_init(void *handle) {
> + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> + int i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> + if (adev->vcn.harvest_config & (1 << i))
> + continue;
> +
> + amdgpu_irq_get(adev, >vcn.inst[i].irq, 0);
[Tao] we can also check its return value and exit if the r is none-zero. But
either way is fine with me.
> + }
> +
> + return 0;
> +}
> +
> /**
> * vcn_v4_0_hw_fini - stop the hardware block
> *
> @@ -2047,7 +2062,7 @@ static void vcn_v4_0_set_irq_funcs(struct
> amdgpu_device *adev) static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {
> .name = "vcn_v4_0",
> .early_init = vcn_v4_0_early_init,
> - .late_init = NULL,
> + .late_init = vcn_v4_0_late_init,
> .sw_init = vcn_v4_0_sw_init,
> .sw_fini = vcn_v4_0_sw_fini,
> .hw_init = vcn_v4_0_hw_init,
> --
> 2.34.1
RE: [PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in jpeg_v4_0_hw_fini
[AMD Official Use Only - General]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Horatio Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Xu, Feifei ; Liu, Leo
> ; Jiang, Sonny ; Limonciello,
> Mario ; Liu, HaoPing (Alan)
> ; Zhang, Horatio
> Subject: [PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in
> jpeg_v4_0_hw_fini
>
> During the suspend, the jpeg_v4_0_hw_init function will use the
> amdgpu_irq_put to disable the irq of jpeg.inst, but it was not enabled during
> the
> resume process, which resulted in a call trace during the GPU reset process.
>
> [ 50.497562] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
> [ 50.497619] RSP: 0018:aa2400fcfcb0 EFLAGS: 00010246
> [ 50.497620] RAX: RBX: 0001 RCX:
>
> [ 50.497621] RDX: RSI: RDI:
>
> [ 50.497621] RBP: aa2400fcfcd0 R08: R09:
>
> [ 50.497622] R10: R11: R12:
> 99b2105242d8
> [ 50.497622] R13: R14: 99b21050 R15:
> 99b21050
> [ 50.497623] FS: () GS:99b51848()
> knlGS:
> [ 50.497623] CS: 0010 DS: ES: CR0: 80050033
> [ 50.497624] CR2: 7f9d32aa91e8 CR3: 0001ba21 CR4:
> 00750ee0
> [ 50.497624] PKRU: 5554
> [ 50.497625] Call Trace:
> [ 50.497625]
> [ 50.497627] jpeg_v4_0_hw_fini+0x43/0xc0 [amdgpu]
> [ 50.497693] jpeg_v4_0_suspend+0x13/0x30 [amdgpu]
> [ 50.497751] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
> [ 50.497802] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
> [ 50.497854] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
> [ 50.497905] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
> [ 50.498005] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
> [ 50.498060] process_one_work+0x21f/0x400
> [ 50.498063] worker_thread+0x200/0x3f0
> [ 50.498064] ? process_one_work+0x400/0x400
> [ 50.498065] kthread+0xee/0x120
> [ 50.498067] ? kthread_complete_and_exit+0x20/0x20
> [ 50.498068] ret_from_fork+0x22/0x30
>
> Fixes: 86e8255f941e ("drm/amdgpu: add JPEG 4.0 RAS poison consumption
> handling")
> Signed-off-by: Horatio Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index 77e1e64aa1d1..b5c14a166063 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -66,6 +66,13 @@ static int jpeg_v4_0_early_init(void *handle)
> return 0;
> }
>
> +static int jpeg_v4_0_late_init(void *handle) {
> + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> +
> + return amdgpu_irq_get(adev, >jpeg.inst->irq, 0); }
> +
> /**
> * jpeg_v4_0_sw_init - sw init for JPEG block
> *
> @@ -696,7 +703,7 @@ static int jpeg_v4_0_process_interrupt(struct
> amdgpu_device *adev, static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {
> .name = "jpeg_v4_0",
> .early_init = jpeg_v4_0_early_init,
> - .late_init = NULL,
> + .late_init = jpeg_v4_0_late_init,
> .sw_init = jpeg_v4_0_sw_init,
> .sw_fini = jpeg_v4_0_sw_fini,
> .hw_init = jpeg_v4_0_hw_init,
> --
> 2.34.1
RE: [PATCH 0/8] DC Patches May 02, 2023
[Public] Hi all, This week this patchset was tested on the following systems: Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U Lenovo Thinkpad T13s Gen4 with AMD Ryzen 5 6600U Reference AMD RX6800 These systems were tested on the following display types: eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U]) VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA]) DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters]) MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays HP Hook G2 with 1 and 2 4k60 Displays The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to): Changing display configurations and settings Benchmark testing Feature testing (Freesync, etc.) Automated testing includes (but is not limited to): Script testing (scripts to automate some of the manual checks) IGT testing The patchset consists of the amd-staging-drm-next branch (Head commit - 6bbcaa25b0c180dfb9c1a90155fc1cfe964f3e36 drm/amd/display: 3.2.234) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis). Tested on Ubuntu 22.04.1 and Chrome OS Tested-by: Daniel Wheeler Thank you, Dan Wheeler Sr. Technologist | AMD SW Display -- 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com -Original Message- From: Hung, Alex Sent: May 2, 2023 9:39 PM To: amd-gfx@lists.freedesktop.org Cc: Wentland, Harry ; Li, Sun peng (Leo) ; Lakha, Bhawanpreet ; Siqueira, Rodrigo ; Pillai, Aurabindo ; Zhuo, Qingqing (Lillian) ; Li, Roman ; Lin, Wayne ; Wang, Chao-kai (Stylon) ; Chiu, Solomon ; Kotarac, Pavle ; Gutierrez, Agustin ; Hung, Alex ; Wheeler, Daniel Subject: [PATCH 0/8] DC Patches May 02, 2023 This DC patchset brings improvements in multiple areas. In summary, we highlight: * Block SubVP on displays that have pixclk > 1800Mhz * Block SubVP high refresh when VRR active fixed * Enforce 60us prefetch for 200Mhz DCFCLK modes * Check Vactive for VRR active for FPO + Vactive * Add symclk workaround during disable link output * Show the DCN/DCE version in the log * Add additional pstate registers to HW state query Cc: Daniel Wheeler Alvin Lee (4): drm/amd/display: Check Vactive for VRR active for FPO + Vactive drm/amd/display: Enforce 60us prefetch for 200Mhz DCFCLK modes drm/amd/display: Block SubVP high refresh when VRR active fixed drm/amd/display: Block SubVP on displays that have pixclk > 1800Mhz Aric Cyr (1): drm/amd/display: Promote DAL to 3.2.235 Leo Chen (1): drm/amd/display: Add symclk workaround during disable link output Rodrigo Siqueira (1): drm/amd/display: Show the DCN/DCE version in the log Sung Lee (1): drm/amd/display: Add additional pstate registers to HW state query .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_helper.c| 56 drivers/gpu/drm/amd/display/dc/dc_stream.h| 2 + .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 2 + .../drm/amd/display/dc/dcn20/dcn20_hubbub.c | 6 ++ .../gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c | 6 ++ .../drm/amd/display/dc/dcn314/dcn314_hwseq.c | 65 +++ .../drm/amd/display/dc/dcn314/dcn314_hwseq.h | 2 + .../drm/amd/display/dc/dcn314/dcn314_init.c | 2 +- .../drm/amd/display/dc/dcn32/dcn32_resource.h | 1 + drivers/gpu/drm/amd/display/dc/dm_services.h | 2 + .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 10 ++- .../dc/dml/dcn32/display_mode_vba_32.c| 5 +- .../dc/dml/dcn32/display_mode_vba_32.h| 1 + .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 2 + 17 files changed, 164 insertions(+), 8 deletions(-) -- 2.40.0
[PATCH V3] drm/amdgpu/display: Enable DC_FP for LoongArch
LoongArch now provides kernel_fpu_begin() and kernel_fpu_end() that are
used like the x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch:
Provide kernel fpu functions"), so we can enable DC_FP on LoongArch for
supporting more DCN devices.
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai Chen
---
V2: Update commit message to add the commit which provides kernel fpu
functions.
V3: Update commit message again and rebase on the latest code.
drivers/gpu/drm/amd/display/Kconfig| 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 6 --
drivers/gpu/drm/amd/display/dc/dml/Makefile| 5 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 2d8e55e29637..49df073962d5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -8,7 +8,7 @@ config DRM_AMD_DC
depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
select SND_HDA_COMPONENT if SND_HDA_CORE
# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
- select DRM_AMD_DC_FP if (X86 || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
+ select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) ||
(ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
help
Choose this option if you want to use the new display engine
support for AMDGPU. This adds required support for Vega and
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
index c42aa947c969..172aa10a8800 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
@@ -33,6 +33,8 @@
#include
#elif defined(CONFIG_ARM64)
#include
+#elif defined(CONFIG_LOONGARCH)
+#include
#endif
/**
@@ -88,7 +90,7 @@ void dc_fpu_begin(const char *function_name, const int line)
*pcpu += 1;
if (*pcpu == 1) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
migrate_disable();
kernel_fpu_begin();
#elif defined(CONFIG_PPC64)
@@ -128,7 +130,7 @@ void dc_fpu_end(const char *function_name, const int line)
pcpu = get_cpu_ptr(_recursion_depth);
*pcpu -= 1;
if (*pcpu <= 0) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
kernel_fpu_end();
migrate_enable();
#elif defined(CONFIG_PPC64)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile
b/drivers/gpu/drm/amd/display/dc/dml/Makefile
index 01db035589c5..77cf5545c94c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile
@@ -38,6 +38,11 @@ ifdef CONFIG_ARM64
dml_rcflags := -mgeneral-regs-only
endif
+ifdef CONFIG_LOONGARCH
+dml_ccflags := -mfpu=64
+dml_rcflags := -msoft-float
+endif
+
ifdef CONFIG_CC_IS_GCC
ifneq ($(call gcc-min-version, 70100),y)
IS_OLD_GCC = 1
--
2.39.1
[PATCH 6.1 184/611] drm/amd/display/dc/dce60/Makefile: Fix previous attempt to silence known override-init warnings
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:188:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43:
warning: initialized field overwritten [-Woverride-init]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:189:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43: note:
(near initialization for ‘xfm_regs[2].DCFE_MEM_LIGHT_SLEEP_CN
[100 lines snipped for brevity]
Fixes: ceb3cf476a441 ("drm/amd/display/dc/dce60/Makefile: Ignore
-Woverride-init warning")
Cc: Harry Wentland
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Mauro Rossi
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dce60/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
index dda596fa1cd76..fee331accc0e7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
@@ -23,7 +23,7 @@
# Makefile for the 'controller' sub-component of DAL.
# It provides the control and status of HW CRTC block.
-CFLAGS_AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
+CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \
dce60_resource.o
--
2.39.2
[PATCH 6.3 222/694] drm/amd/display/dc/dce60/Makefile: Fix previous attempt to silence known override-init warnings
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:188:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43:
warning: initialized field overwritten [-Woverride-init]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:189:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43: note:
(near initialization for ‘xfm_regs[2].DCFE_MEM_LIGHT_SLEEP_CN
[100 lines snipped for brevity]
Fixes: ceb3cf476a441 ("drm/amd/display/dc/dce60/Makefile: Ignore
-Woverride-init warning")
Cc: Harry Wentland
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Mauro Rossi
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dce60/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
index dda596fa1cd76..fee331accc0e7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
@@ -23,7 +23,7 @@
# Makefile for the 'controller' sub-component of DAL.
# It provides the control and status of HW CRTC block.
-CFLAGS_AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
+CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \
dce60_resource.o
--
2.39.2
[PATCH 5.15 114/371] drm/amd/display/dc/dce60/Makefile: Fix previous attempt to silence known override-init warnings
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:188:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43:
warning: initialized field overwritten [-Woverride-init]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:189:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43: note:
(near initialization for ‘xfm_regs[2].DCFE_MEM_LIGHT_SLEEP_CN
[100 lines snipped for brevity]
Fixes: ceb3cf476a441 ("drm/amd/display/dc/dce60/Makefile: Ignore
-Woverride-init warning")
Cc: Harry Wentland
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Mauro Rossi
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dce60/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
index dda596fa1cd76..fee331accc0e7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
@@ -23,7 +23,7 @@
# Makefile for the 'controller' sub-component of DAL.
# It provides the control and status of HW CRTC block.
-CFLAGS_AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
+CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \
dce60_resource.o
--
2.39.2
Patch "drm/amd/display (gcc13): fix enum mismatch" has been added to the 6.1-stable tree
This is a note to let you know that I've just added the patch titled drm/amd/display (gcc13): fix enum mismatch to the 6.1-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: drm-amd-display-gcc13-fix-enum-mismatch.patch and it can be found in the queue-6.1 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From 545094d993f4639482018becda5f2a47d126f0ab Mon Sep 17 00:00:00 2001 From: "Jiri Slaby (SUSE)" Date: Mon, 31 Oct 2022 12:42:47 +0100 Subject: drm/amd/display (gcc13): fix enum mismatch MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Jiri Slaby (SUSE) commit 545094d993f4639482018becda5f2a47d126f0ab upstream. rn_vbios_smu_set_dcn_low_power_state() produces a valid warning with gcc-13: drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c:237:6: error: conflicting types for 'rn_vbios_smu_set_dcn_low_power_state' due to enum/integer mismatch; have 'void(struct clk_mgr_internal *, enum dcn_pwr_state)' drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h:36:6: note: previous declaration of 'rn_vbios_smu_set_dcn_low_power_state' with type 'void(struct clk_mgr_internal *, int)' I.e. the type of the 2nd parameter of rn_vbios_smu_set_dcn_low_power_state() in the declaration is int, while the definition spells enum dcn_pwr_state. Synchronize them to the latter (and add a forward enum declaration). Cc: Martin Liska Cc: Harry Wentland Cc: Leo Li Cc: Rodrigo Siqueira Cc: Alex Deucher Cc: "Christian König" Cc: "Pan, Xinhui" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Reviewed-by: Harry Wentland Signed-off-by: Jiri Slaby (SUSE) Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h @@ -26,6 +26,8 @@ #ifndef DAL_DC_RN_CLK_MGR_VBIOS_SMU_H_ #define DAL_DC_RN_CLK_MGR_VBIOS_SMU_H_ +enum dcn_pwr_state; + int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr); int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz); int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr); @@ -33,7 +35,7 @@ int rn_vbios_smu_set_hard_min_dcfclk(str int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz); void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz); int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz); -void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, int display_count); +void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state); void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable); void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr); int rn_vbios_smu_is_periodic_retraining_disabled(struct clk_mgr_internal *clk_mgr); Patches currently in stable-queue which might be from jirisl...@kernel.org are queue-6.1/linux-vt_buffer.h-allow-either-builtin-or-modular-fo.patch queue-6.1/net-wwan-t7xx-do-not-compile-with-werror.patch queue-6.1/bonding-gcc13-synchronize-bond_-a-t-lb_xmit-types.patch queue-6.1/drm-amd-display-gcc13-fix-enum-mismatch.patch queue-6.1/wifi-ath11k-synchronize-ath11k_mac_he_gi_to_nl80211_he_gi-s-return-type.patch queue-6.1/thunderbolt-use-correct-type-in-tb_port_is_clx_enabled-prototype.patch queue-6.1/sfc-gcc13-synchronize-ef100_enqueue_skb-s-return-type.patch queue-6.1/block-blk-iocost-gcc13-keep-large-values-in-a-new-enum.patch queue-6.1/wireguard-timers-cast-enum-limits-members-to-int-in-prints.patch
[PATCH 6.2 190/663] drm/amd/display/dc/dce60/Makefile: Fix previous attempt to silence known override-init warnings
From: Lee Jones
[ Upstream commit 4082b9f5ead4966797dddcfef0905d59e5a83873 ]
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:188:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43:
warning: initialized field overwritten [-Woverride-init]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:157:21: note:
in expansion of macro ‘mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.h:170:9: note: in
expansion of macro ‘SRI’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:183:17: note:
in expansion of macro ‘XFM_COMMON_REG_LIST_DCE60’
drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.c:189:17: note:
in expansion of macro ‘transform_regs’
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_6_0_d.h:722:43: note:
(near initialization for ‘xfm_regs[2].DCFE_MEM_LIGHT_SLEEP_CN
[100 lines snipped for brevity]
Fixes: ceb3cf476a441 ("drm/amd/display/dc/dce60/Makefile: Ignore
-Woverride-init warning")
Cc: Harry Wentland
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Mauro Rossi
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/dc/dce60/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
index dda596fa1cd76..fee331accc0e7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce60/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dce60/Makefile
@@ -23,7 +23,7 @@
# Makefile for the 'controller' sub-component of DAL.
# It provides the control and status of HW CRTC block.
-CFLAGS_AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
+CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning,
override-init)
DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \
dce60_resource.o
--
2.39.2
Re: [PATCH V2] drm/amdgpu/display: Enable DC_FP for LoongArch
On 2023/5/5 19:32, Huacai Chen wrote:
Now LoongArch provides kernel_fpu_begin() and kernel_fpu_end() in commit
2b3bd32ea3a22ea2d ("LoongArch: Provide kernel fpu functions"), so we can
enable DC_FP for DCN devices.
Some grammatical fixes and paraphrasing:
"LoongArch now provides kernel_fpu_{begin,end} that are used like the
x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch: Provide kernel
fpu functions"), so we can now implement DRM_AMD_DC_FP on LoongArch for
supporting more DCN devices."
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai Chen
I just finished my tests according to the link above and all seems fine.
* Board: A2101 (Loongson 3A5000 with LS7A1000 bridge)
- with the firmware provided at [1]
* GPU: RX 6400 (PowerColor ITX RX6400 4GB GDDR6)
* Display: Dell P2317H (connected via DisplayPort)
* Kernel: next-20230505 with this patch (with the conflict resolved)
* Sysroot: up-to-date Gentoo/LoongArch
I've tested:
* Desktop sessions: Xfce4, Plasma Wayland
* Hot-plugging
- at tty, at sddm, inside Plasma Wayland session, multiple times each
* Changing resolutions
* kms_flip tests: every non-skipped case passed (I can't test
dual-monitor right now)
[1]: https://github.com/loongson/Firmware/tree/main/5000Series/PC/A2101
Hence it's:
Tested-by: WANG Xuerui
---
V2: Update commit message to add the commit which provides kernel fpu
functions.
drivers/gpu/drm/amd/display/Kconfig| 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 6 --
drivers/gpu/drm/amd/display/dc/dml/Makefile| 5 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 2d8e55e29637..49df073962d5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -8,7 +8,7 @@ config DRM_AMD_DC
depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
select SND_HDA_COMPONENT if SND_HDA_CORE
# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
- select DRM_AMD_DC_FP if (X86 || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
+ select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
help
Choose this option if you want to use the new display engine
support for AMDGPU. This adds required support for Vega and
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
index 1743ca0a3641..86f4c0e04654 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
@@ -33,6 +33,8 @@
#include
#elif defined(CONFIG_ARM64)
#include
+#elif defined(CONFIG_LOONGARCH)
+#include
#endif
/**
@@ -88,7 +90,7 @@ void dc_fpu_begin(const char *function_name, const int line)
*pcpu += 1;
if (*pcpu == 1) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
kernel_fpu_begin();
And with the conflict here with linux-next resolved then we may be good
to go.
#elif defined(CONFIG_PPC64)
if (cpu_has_feature(CPU_FTR_VSX_COMP)) {
@@ -127,7 +129,7 @@ void dc_fpu_end(const char *function_name, const int line)
pcpu = get_cpu_ptr(_recursion_depth);
*pcpu -= 1;
if (*pcpu <= 0) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
kernel_fpu_end();
#elif defined(CONFIG_PPC64)
if (cpu_has_feature(CPU_FTR_VSX_COMP)) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile
b/drivers/gpu/drm/amd/display/dc/dml/Makefile
index 01db035589c5..542962a93e8f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile
@@ -38,6 +38,11 @@ ifdef CONFIG_ARM64
dml_rcflags := -mgeneral-regs-only
endif
+ifdef CONFIG_LOONGARCH
+dml_ccflags := -mfpu=64
+dml_rcflags := -msoft-float
+endif
+
ifdef CONFIG_CC_IS_GCC
ifneq ($(call gcc-min-version, 70100),y)
IS_OLD_GCC = 1
--
WANG "xen0n" Xuerui
Linux/LoongArch mailing list: https://lore.kernel.org/loongarch/
[PATCH 6.1 609/611] drm/amd/display (gcc13): fix enum mismatch
From: Jiri Slaby (SUSE) commit 545094d993f4639482018becda5f2a47d126f0ab upstream. rn_vbios_smu_set_dcn_low_power_state() produces a valid warning with gcc-13: drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c:237:6: error: conflicting types for 'rn_vbios_smu_set_dcn_low_power_state' due to enum/integer mismatch; have 'void(struct clk_mgr_internal *, enum dcn_pwr_state)' drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h:36:6: note: previous declaration of 'rn_vbios_smu_set_dcn_low_power_state' with type 'void(struct clk_mgr_internal *, int)' I.e. the type of the 2nd parameter of rn_vbios_smu_set_dcn_low_power_state() in the declaration is int, while the definition spells enum dcn_pwr_state. Synchronize them to the latter (and add a forward enum declaration). Cc: Martin Liska Cc: Harry Wentland Cc: Leo Li Cc: Rodrigo Siqueira Cc: Alex Deucher Cc: "Christian König" Cc: "Pan, Xinhui" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Reviewed-by: Harry Wentland Signed-off-by: Jiri Slaby (SUSE) Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h @@ -26,6 +26,8 @@ #ifndef DAL_DC_RN_CLK_MGR_VBIOS_SMU_H_ #define DAL_DC_RN_CLK_MGR_VBIOS_SMU_H_ +enum dcn_pwr_state; + int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr); int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz); int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr); @@ -33,7 +35,7 @@ int rn_vbios_smu_set_hard_min_dcfclk(str int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz); void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz); int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz); -void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, int display_count); +void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state); void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable); void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr); int rn_vbios_smu_is_periodic_retraining_disabled(struct clk_mgr_internal *clk_mgr);
Problem: Lenovo T14 Gen2 with external monitor - no luks prompt
Hello, I hope this is the right place to get help. I using Debian Bookworm/12 and with Kernel 6.1 I'd some issues with external displays: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1033637 With Kernel 6.3 it's much better and it works, more or less. But when I boot and I need to type my password to encrypt my disk the external displays are in sleep mode, I can type it blind and after 'ENTER' I got my KDE-login screen, since it is in a very early boot-state I don't know how to get useful logs or something like that. How can I help you to help me to fix this (bug)? Most information you can get from the Debian-Bug above. Thanks in advanced! best regards Stefan
[PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in vcn_v4_0_hw_fini
During the suspend, the vcn_v4_0_hw_init function will
use the amdgpu_irq_put to disable the irq of vcn.inst, but it
was not enabled during the resume process, which resulted in a
call trace during the GPU reset process.
[ 44.563572] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
[ 44.563629] RSP: 0018:b36740edfc90 EFLAGS: 00010246
[ 44.563630] RAX: RBX: 0001 RCX:
[ 44.563630] RDX: RSI: RDI:
[ 44.563631] RBP: b36740edfcb0 R08: R09:
[ 44.563631] R10: R11: R12: 954c568e2ea8
[ 44.563631] R13: R14: 954c568c R15: 954c568e2ea8
[ 44.563632] FS: () GS:954f584c()
knlGS:
[ 44.563632] CS: 0010 DS: ES: CR0: 80050033
[ 44.563633] CR2: 7f028741ba70 CR3: 00026ca1 CR4: 00750ee0
[ 44.563633] PKRU: 5554
[ 44.563633] Call Trace:
[ 44.563634]
[ 44.563634] vcn_v4_0_hw_fini+0x62/0x160 [amdgpu]
[ 44.563700] vcn_v4_0_suspend+0x13/0x30 [amdgpu]
[ 44.563755] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
[ 44.563806] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
[ 44.563858] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
[ 44.563909] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
[ 44.564006] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
[ 44.564061] process_one_work+0x21f/0x400
[ 44.564062] worker_thread+0x200/0x3f0
[ 44.564063] ? process_one_work+0x400/0x400
[ 44.564064] kthread+0xee/0x120
[ 44.564065] ? kthread_complete_and_exit+0x20/0x20
[ 44.564066] ret_from_fork+0x22/0x30
Fixes: ea5309de7388 ("drm/amdgpu: add VCN 4.0 RAS poison consumption handling")
Signed-off-by: Horatio Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index bf0674039598..b55eb1bf3e30 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -281,6 +281,21 @@ static int vcn_v4_0_hw_init(void *handle)
return r;
}
+static int vcn_v4_0_late_init(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ int i;
+
+ for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+ if (adev->vcn.harvest_config & (1 << i))
+ continue;
+
+ amdgpu_irq_get(adev, >vcn.inst[i].irq, 0);
+ }
+
+ return 0;
+}
+
/**
* vcn_v4_0_hw_fini - stop the hardware block
*
@@ -2047,7 +2062,7 @@ static void vcn_v4_0_set_irq_funcs(struct amdgpu_device
*adev)
static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {
.name = "vcn_v4_0",
.early_init = vcn_v4_0_early_init,
- .late_init = NULL,
+ .late_init = vcn_v4_0_late_init,
.sw_init = vcn_v4_0_sw_init,
.sw_fini = vcn_v4_0_sw_fini,
.hw_init = vcn_v4_0_hw_init,
--
2.34.1
[PATCH v2] drm/amd/amdgpu: Fix assingment in if condition in amdgpu_irq.c
Assignments in if condition are less readable and error-prone.
Fixes below error & warnings reported by checkpatch"
ERROR: do not use assignment in if condition
+ } else if ((src = adev->irq.client[client_id].sources[src_id])) {
WARNING: braces {} are not necessary for any arm of this statement
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
v2:
- Validate the client_id and src_id values or otherwise
this can crash (Christian)
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 29 +
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index c8413470e057..dfaedb0243ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -110,7 +110,7 @@ const char *soc15_ih_clientid_name[] = {
void amdgpu_irq_disable_all(struct amdgpu_device *adev)
{
unsigned long irqflags;
- unsigned i, j, k;
+ unsigned int i, j, k;
int r;
spin_lock_irqsave(>irq.lock, irqflags);
@@ -269,11 +269,11 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
int nvec = pci_msix_vec_count(adev->pdev);
unsigned int flags;
- if (nvec <= 0) {
+ if (nvec <= 0)
flags = PCI_IRQ_MSI;
- } else {
+ else
flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
- }
+
/* we only need one vector */
nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags);
if (nvec > 0) {
@@ -332,7 +332,7 @@ void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
*/
void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
{
- unsigned i, j;
+ unsigned int i, j;
for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
if (!adev->irq.client[i].sources)
@@ -366,7 +366,7 @@ void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
* 0 on success or error code otherwise
*/
int amdgpu_irq_add_id(struct amdgpu_device *adev,
- unsigned client_id, unsigned src_id,
+ unsigned int client_id, unsigned int src_id,
struct amdgpu_irq_src *source)
{
if (client_id >= AMDGPU_IRQ_CLIENTID_MAX)
@@ -418,8 +418,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
{
u32 ring_index = ih->rptr >> 2;
struct amdgpu_iv_entry entry;
- unsigned client_id, src_id;
- struct amdgpu_irq_src *src;
+ unsigned int client_id, src_id;
+ struct amdgpu_irq_src *src = NULL;
bool handled = false;
int r;
@@ -446,7 +446,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
client_id, src_id);
- } else if ((src = adev->irq.client[client_id].sources[src_id])) {
+ } else if (client_id < AMDGPU_IRQ_CLIENTID_MAX && src_id <
AMDGPU_MAX_IRQ_SRC_ID) {
+ src = adev->irq.client[client_id].sources[src_id];
r = src->funcs->process(adev, src, );
if (r < 0)
DRM_ERROR("error processing interrupt (%d)\n", r);
@@ -493,7 +494,7 @@ void amdgpu_irq_delegate(struct amdgpu_device *adev,
* Updates interrupt state for the specific source (all ASICs).
*/
int amdgpu_irq_update(struct amdgpu_device *adev,
-struct amdgpu_irq_src *src, unsigned type)
+struct amdgpu_irq_src *src, unsigned int type)
{
unsigned long irqflags;
enum amdgpu_interrupt_state state;
@@ -556,7 +557,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct
amdgpu_device *adev)
* 0 on success or error code otherwise
*/
int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
- unsigned type)
+ unsigned int type)
{
if (!adev->irq.installed)
return -ENOENT;
@@ -586,7 +587,7 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct
amdgpu_irq_src *src,
* 0 on success or error code otherwise
*/
int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
- unsigned type)
+ unsigned int type)
{
if (!adev->irq.installed)
return -ENOENT;
@@ -620,7 +621,7 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct
amdgpu_irq_src *src,
* invalid parameters
*/
bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
- unsigned type)
+ unsigned int type)
{
if (!adev->irq.installed)
return false;
@@ -733,7 +734,7 @@ void amdgpu_irq_remove_domain(struct amdgpu_device *adev)
* Returns:
* Linux IRQ
*/
-unsigned amdgpu_irq_create_mapping(struct
Re: KASAN: null-ptr-deref in range [0x0000000000000010-0x0000000000000017] - RIP: 0010:amdgpu_bo_get_memory+0x80/0x360 [amdgpu]
On Fri, May 5, 2023 at 6:44 PM Mikhail Gavrilov
wrote:
> I need to say that it may not be easy to reproduce this bug.
> For helping reproduce:
> 1. I looped script above:
> $ for i in {1..9}; do sudo curl -s
> https://raw.githubusercontent.com/fatso83/dotfiles/master/utils/scripts/inotify-consumers
> | bash; done
> 2. Launched google chrome with 26 opened windows
> 3. And played in the game Division 2.
> A little time and luck and I get the desired backtrace again and again.
>
> I am ready to answer any question and open for testing any patches.
> Thanks.
No one can reproduce this?
I prepared a video instruction which can helps:
https://youtu.be/0ipQnMpZG1Y
1. Run script which would calculate watchers:
$ for i in {1..9}; do sudo curl -s
https://raw.githubusercontent.com/fatso83/dotfiles/master/utils/scripts/inotify-consumers
| bash; done
2. Run the game "Devision 2"
3. Run 20 windows of Google Chrome with such script
$ for i in {1..20}; do google-chrome-unstable
--profile-directory="Test-2" --new-window --start-maximized
"youtube.com" &; done
I hope after it you see the desired backtrace.
--
Best Regards,
Mike Gavrilov.
RE: [PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in jpeg_v4_0_hw_fini
[AMD Official Use Only - General]
Shall we consider creating amdgpu_vcn_ras_late_init as a common helper for
interrupt enablement, like other IP blocks. This also reduces further effort
when RAS feature is introduced in new version of vcn/jpeg
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Monday, May 8, 2023 19:06
To: Zhang, Horatio ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Xu, Feifei ;
Liu, Leo ; Jiang, Sonny ; Limonciello,
Mario ; Liu, HaoPing (Alan) ;
Zhang, Horatio
Subject: RE: [PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in
jpeg_v4_0_hw_fini
[AMD Official Use Only - General]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Horatio Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Xu, Feifei ; Liu, Leo
> ; Jiang, Sonny ; Limonciello,
> Mario ; Liu, HaoPing (Alan)
> ; Zhang, Horatio
> Subject: [PATCH 1/2] drm/amdgpu: fix amdgpu_irq_put call trace in
> jpeg_v4_0_hw_fini
>
> During the suspend, the jpeg_v4_0_hw_init function will use the
> amdgpu_irq_put to disable the irq of jpeg.inst, but it was not enabled
> during the resume process, which resulted in a call trace during the GPU
> reset process.
>
> [ 50.497562] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
> [ 50.497619] RSP: 0018:aa2400fcfcb0 EFLAGS: 00010246
> [ 50.497620] RAX: RBX: 0001 RCX:
>
> [ 50.497621] RDX: RSI: RDI:
>
> [ 50.497621] RBP: aa2400fcfcd0 R08: R09:
>
> [ 50.497622] R10: R11: R12:
> 99b2105242d8
> [ 50.497622] R13: R14: 99b21050 R15:
> 99b21050
> [ 50.497623] FS: () GS:99b51848()
> knlGS:
> [ 50.497623] CS: 0010 DS: ES: CR0: 80050033
> [ 50.497624] CR2: 7f9d32aa91e8 CR3: 0001ba21 CR4:
> 00750ee0
> [ 50.497624] PKRU: 5554
> [ 50.497625] Call Trace:
> [ 50.497625]
> [ 50.497627] jpeg_v4_0_hw_fini+0x43/0xc0 [amdgpu]
> [ 50.497693] jpeg_v4_0_suspend+0x13/0x30 [amdgpu]
> [ 50.497751] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
> [ 50.497802] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
> [ 50.497854] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
> [ 50.497905] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
> [ 50.498005] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
> [ 50.498060] process_one_work+0x21f/0x400
> [ 50.498063] worker_thread+0x200/0x3f0
> [ 50.498064] ? process_one_work+0x400/0x400
> [ 50.498065] kthread+0xee/0x120
> [ 50.498067] ? kthread_complete_and_exit+0x20/0x20
> [ 50.498068] ret_from_fork+0x22/0x30
>
> Fixes: 86e8255f941e ("drm/amdgpu: add JPEG 4.0 RAS poison consumption
> handling")
> Signed-off-by: Horatio Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index 77e1e64aa1d1..b5c14a166063 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -66,6 +66,13 @@ static int jpeg_v4_0_early_init(void *handle)
> return 0;
> }
>
> +static int jpeg_v4_0_late_init(void *handle) {
> + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> +
> + return amdgpu_irq_get(adev, >jpeg.inst->irq, 0); }
> +
> /**
> * jpeg_v4_0_sw_init - sw init for JPEG block
> *
> @@ -696,7 +703,7 @@ static int jpeg_v4_0_process_interrupt(struct
> amdgpu_device *adev, static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = {
> .name = "jpeg_v4_0",
> .early_init = jpeg_v4_0_early_init,
> - .late_init = NULL,
> + .late_init = jpeg_v4_0_late_init,
> .sw_init = jpeg_v4_0_sw_init,
> .sw_fini = jpeg_v4_0_sw_fini,
> .hw_init = jpeg_v4_0_hw_init,
> --
> 2.34.1
RE: [PATCH v2] drm/dp_mst: Clear MSG_RDY flag before sending new message
[Public]
Hi Lyude and Jani,
Could you help to review please? Thanks for your time!
Regards,
Wayne Lin
> -Original Message-
> From: Wayne Lin
> Sent: Thursday, April 27, 2023 3:29 PM
> To: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
> Cc: ly...@redhat.com; ville.syrj...@linux.intel.com; jani.nik...@intel.com;
> imre.d...@intel.com; Wentland, Harry ; Zuo,
> Jerry ; Lin, Wayne ;
> sta...@vger.kernel.org
> Subject: [PATCH v2] drm/dp_mst: Clear MSG_RDY flag before sending new
> message
>
> [Why]
> The sequence for collecting down_reply from source perspective should
> be:
>
> Request_n->repeat (get partial reply of Request_n->clear message ready
> flag to ack DPRX that the message is received) till all partial replies for
> Request_n are received->new Request_n+1.
>
> Now there is chance that drm_dp_mst_hpd_irq() will fire new down request
> in the tx queue when the down reply is incomplete. Source is restricted to
> generate interveleaved message transactions so we should avoid it.
>
> Also, while assembling partial reply packets, reading out DPCD DOWN_REP
> Sideband MSG buffer + clearing DOWN_REP_MSG_RDY flag should be
> wrapped up as a complete operation for reading out a reply packet.
> Kicking off a new request before clearing DOWN_REP_MSG_RDY flag might
> be risky. e.g. If the reply of the new request has overwritten the DPRX
> DOWN_REP Sideband MSG buffer before source writing one to clear
> DOWN_REP_MSG_RDY flag, source then unintentionally flushes the reply for
> the new request. Should handle the up request in the same way.
>
> [How]
> Separete drm_dp_mst_hpd_irq() into 2 steps. After acking the MST IRQ
> event, driver calls drm_dp_mst_hpd_irq_step2() and might trigger
> drm_dp_mst_kick_tx() only when there is no on going message transaction.
>
> Changes since v1:
> * Reworked on review comments received
> -> Adjust the fix to let driver explicitly kick off new down request
> when mst irq event is handled and acked
> -> Adjust the commit message
>
> Signed-off-by: Wayne Lin
> Cc: sta...@vger.kernel.org
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 ++---
> drivers/gpu/drm/display/drm_dp_mst_topology.c | 35
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 5 ++-
> drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 ++-
> include/drm/display/drm_dp_mst_helper.h | 4 +--
> 5 files changed, 45 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1ad67c2a697e..48bdcb2ee9b1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -3259,10 +3259,9 @@ static void dm_handle_mst_sideband_msg(struct
> amdgpu_dm_connector *aconnector)
> DRM_DEBUG_DRIVER("ESI %02x %02x %02x\n", esi[0], esi[1],
> esi[2]);
> /* handle HPD short pulse irq */
> if (aconnector->mst_mgr.mst_state)
> - drm_dp_mst_hpd_irq(
> - >mst_mgr,
> - esi,
> - _irq_handled);
> + drm_dp_mst_hpd_irq_step1(
> >mst_mgr,
> + esi,
> + _irq_handled);
>
> if (new_irq_handled) {
> /* ACK at DPCD to notify down stream */ @@ -3281,6
> +3280,7 @@ static void dm_handle_mst_sideband_msg(struct
> amdgpu_dm_connector *aconnector)
> break;
> }
>
> + drm_dp_mst_hpd_irq_step2(
> >mst_mgr);
> /* check if there is new irq to be handled */
> dret = drm_dp_dpcd_read(
> >dm_dp_aux.aux,
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 70df29fe92db..2e0a38a6509c 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -4045,7 +4045,7 @@ static int drm_dp_mst_handle_up_req(struct
> drm_dp_mst_topology_mgr *mgr) }
>
> /**
> - * drm_dp_mst_hpd_irq() - MST hotplug IRQ notify
> + * drm_dp_mst_hpd_irq_step1() - MST hotplug IRQ notify
> * @mgr: manager to notify irq for.
> * @esi: 4 bytes from SINK_COUNT_ESI
> * @handled: whether the hpd interrupt was consumed or not @@ -4055,7
> +4055,7 @@ static int drm_dp_mst_handle_up_req(struct
> drm_dp_mst_topology_mgr *mgr)
> * topology manager will process the sideband messages received as a result
> * of this.
> */
> -int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi,
> bool *handled)
> +int drm_dp_mst_hpd_irq_step1(struct drm_dp_mst_topology_mgr *mgr,
> u8
> +*esi, bool *handled)
> {
> int ret = 0;
> int sc;
> @@ -4077,11 +4077,38 @@ int drm_dp_mst_hpd_irq(struct
>
Re: [PATCH] drm/amdgpu: Remove the unused variable golden_settings_gc_9_4_3
Applied. Thanks!
On Sat, May 6, 2023 at 4:11 AM Jiapeng Chong
wrote:
>
> Variable golden_settings_gc_9_4_3 is not effectively used, so delete it.
>
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:48:38: warning:
> ‘golden_settings_gc_9_4_3’ defined but not used.
>
> Reported-by: Abaci Robot
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4877
> Signed-off-by: Jiapeng Chong
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 4
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index 312491455382..74be46d382f4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -45,10 +45,6 @@ MODULE_FIRMWARE("amdgpu/gc_9_4_3_rlc.bin");
> #define GFX9_MEC_HPD_SIZE 4096
> #define RLCG_UCODE_LOADING_START_ADDRESS 0x2000L
>
> -static const struct soc15_reg_golden golden_settings_gc_9_4_3[] = {
> -
> -};
> -
> static void gfx_v9_4_3_set_ring_funcs(struct amdgpu_device *adev);
> static void gfx_v9_4_3_set_irq_funcs(struct amdgpu_device *adev);
> static void gfx_v9_4_3_set_gds_init(struct amdgpu_device *adev);
> --
> 2.20.1.7.g153144c
>
[linux-next:master] BUILD SUCCESS WITH WARNING 52025ebbb518a2d876b8aba191b348ffb1cf368b
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 52025ebbb518a2d876b8aba191b348ffb1cf368b Add linux-next specific files for 20230508 Warning reports: https://lore.kernel.org/oe-kbuild-all/202304230014.ybscpx20-...@intel.com Warning: (recently discovered and may have been fixed) drivers/accel/habanalabs/gaudi/gaudi.c:117:19: warning: unused variable 'gaudi_irq_name' [-Wunused-const-variable] drivers/base/regmap/regcache-maple.c:113:23: warning: 'lower_index' is used uninitialized [-Wuninitialized] drivers/base/regmap/regcache-maple.c:113:36: warning: 'lower_last' is used uninitialized [-Wuninitialized] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6395:21: warning: variable 'count' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:499:13: warning: variable 'j' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:48:38: warning: unused variable 'golden_settings_gc_9_4_3' [-Wunused-const-variable] Unverified Warning (likely false positive, please contact us if interested): drivers/cpufreq/pcc-cpufreq.c: linux/platform_device.h is included more than once. drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:495:2-8: preceding lock on line 491 fs/xfs/scrub/fscounters.c:459 xchk_fscounters() warn: ignoring unreachable code. Warning ids grouped by kconfigs: gcc_recent_errors |-- alpha-allyesconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- alpha-randconfig-c042-20230507 | |-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:preceding-lock-on-line | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- alpha-randconfig-c043-20230507 | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arc-allyesconfig | |-- drivers-base-regmap-regcache-maple.c:warning:lower_index-is-used-uninitialized | |-- drivers-base-regmap-regcache-maple.c:warning:lower_last-is-used-uninitialized | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-allmodconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-allyesconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-randconfig-c033-20230507 | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-randconfig-c041-20230507 | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-randconfig-r024-20230507 | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm-randconfig-r025-20230507 | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm64-allyesconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- arm64-randconfig-m041-20230507 | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- csky-buildonly-randconfig-r001-20230508 | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- i386-allyesconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- ia64-allmodconfig | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- ia64-randconfig-m031-20230507 | `-- fs-xfs-scrub-fscounters.c-xchk_fscounters()-warn:ignoring-unreachable-code. |-- ia64-randconfig-r003-20230508 | |-- drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- ia64-randconfig-r012-20230507 | `-- drivers-gpu-drm-amd-amdgpu-amdgpu_gfx.c:warning:variable-j-set-but-not-used |-- loongarch-allmodconfig | |-- drivers-gpu-drm-amd
[PATCH] drm/amd/amdgpu: Remove redundant else branch in amdgpu_encoders.c
Adhere to Linux kernel coding style.
Reported by checkpatch:
WARNING: else is not generally useful after a break or return
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c | 26 ++--
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
index c96e458ed088..049e9976ff34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
@@ -242,19 +242,18 @@ bool amdgpu_dig_monitor_is_duallink(struct drm_encoder
*encoder,
if ((dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
(dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
return false;
- else {
- /* HDMI 1.3 supports up to 340 Mhz over single link */
- if (connector->display_info.is_hdmi) {
- if (pixel_clock > 34)
- return true;
- else
- return false;
- } else {
- if (pixel_clock > 165000)
- return true;
- else
- return false;
- }
+
+ /* HDMI 1.3 supports up to 340 Mhz over single link */
+ if (connector->display_info.is_hdmi) {
+ if (pixel_clock > 34)
+ return true;
+ else
+ return false;
+ } else {
+ if (pixel_clock > 165000)
+ return true;
+ else
+ return false;
}
default:
return false;
--
2.25.1
Re: [V3] drm/amdgpu/display: Enable DC_FP for LoongArch
Nice patch!
I have tested this patch on ls3a5000+ls7a2000+AMDGPU RX550, but it seems
that dc_fpu_begin() and
dc_fpu_end() will not be called on AMDGPU RX550. But it at least proved that
this patch does not introduce bugs to what already works.
I can proved that after apply this patch, glmark2 still works like a
charm.
fbtest and kms_flip test also run very well.
On 2023/5/8 11:09, Huacai Chen wrote:
LoongArch now provides kernel_fpu_begin() and kernel_fpu_end() that are
used like the x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch:
Provide kernel fpu functions"), so we can enable DC_FP on LoongArch for
supporting more DCN devices.
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai Chen
---
V2: Update commit message to add the commit which provides kernel fpu
functions.
V3: Update commit message again and rebase on the latest code.
drivers/gpu/drm/amd/display/Kconfig| 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 6 --
drivers/gpu/drm/amd/display/dc/dml/Makefile| 5 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 2d8e55e29637..49df073962d5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -8,7 +8,7 @@ config DRM_AMD_DC
depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
select SND_HDA_COMPONENT if SND_HDA_CORE
# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
- select DRM_AMD_DC_FP if (X86 || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
+ select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
help
Choose this option if you want to use the new display engine
support for AMDGPU. This adds required support for Vega and
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
index c42aa947c969..172aa10a8800 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
@@ -33,6 +33,8 @@
#include
#elif defined(CONFIG_ARM64)
#include
+#elif defined(CONFIG_LOONGARCH)
+#include
#endif
/**
@@ -88,7 +90,7 @@ void dc_fpu_begin(const char *function_name, const int line)
*pcpu += 1;
if (*pcpu == 1) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
migrate_disable();
kernel_fpu_begin();
#elif defined(CONFIG_PPC64)
@@ -128,7 +130,7 @@ void dc_fpu_end(const char *function_name, const int line)
pcpu = get_cpu_ptr(_recursion_depth);
*pcpu -= 1;
if (*pcpu <= 0) {
-#if defined(CONFIG_X86)
+#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
kernel_fpu_end();
migrate_enable();
#elif defined(CONFIG_PPC64)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile
b/drivers/gpu/drm/amd/display/dc/dml/Makefile
index 01db035589c5..77cf5545c94c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile
@@ -38,6 +38,11 @@ ifdef CONFIG_ARM64
dml_rcflags := -mgeneral-regs-only
endif
+ifdef CONFIG_LOONGARCH
+dml_ccflags := -mfpu=64
+dml_rcflags := -msoft-float
+endif
+
ifdef CONFIG_CC_IS_GCC
ifneq ($(call gcc-min-version, 70100),y)
IS_OLD_GCC = 1
Re: [PATCH] drm/amd/amdgpu: Remove redundant else branch in amdgpu_encoders.c
On Mon, May 8, 2023 at 11:29 AM Srinivasan Shanmugam
wrote:
>
> Adhere to Linux kernel coding style.
>
> Reported by checkpatch:
>
> WARNING: else is not generally useful after a break or return
>
What about the else in the previous case statement?
Alex
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c | 26 ++--
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> index c96e458ed088..049e9976ff34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> @@ -242,19 +242,18 @@ bool amdgpu_dig_monitor_is_duallink(struct drm_encoder
> *encoder,
> if ((dig_connector->dp_sink_type ==
> CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
> (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
> return false;
> - else {
> - /* HDMI 1.3 supports up to 340 Mhz over single link */
> - if (connector->display_info.is_hdmi) {
> - if (pixel_clock > 34)
> - return true;
> - else
> - return false;
> - } else {
> - if (pixel_clock > 165000)
> - return true;
> - else
> - return false;
> - }
> +
> + /* HDMI 1.3 supports up to 340 Mhz over single link */
> + if (connector->display_info.is_hdmi) {
> + if (pixel_clock > 34)
> + return true;
> + else
> + return false;
> + } else {
> + if (pixel_clock > 165000)
> + return true;
> + else
> + return false;
> }
> default:
> return false;
> --
> 2.25.1
>
Re: [V3] drm/amdgpu/display: Enable DC_FP for LoongArch
I have tested glmark2 on ls3a5000 with this patch applied,
I have also bought a better gpu (vega 56), which is on the way.
currently only have a rx550 at hand.
I pasted the performance score here, how about this score?
Does this looks normal?
glmark2
===
glmark2 2021.12
===
OpenGL Information
GL_VENDOR: AMD
GL_RENDERER: AMD Radeon RX 550 / 550 Series (polaris12, LLVM
14.0.6, DRM 3.52, 6.4.0-rc1+)
GL_VERSION: 4.6 (Compatibility Profile) Mesa 23.0.0
===
[build] use-vbo=false: FPS: 4408 FrameTime: 0.227 ms
[build] use-vbo=true: FPS: 7474 FrameTime: 0.134 ms
[texture] texture-filter=nearest: FPS: 7096 FrameTime: 0.141 ms
[texture] texture-filter=linear: FPS: 7400 FrameTime: 0.135 ms
[texture] texture-filter=mipmap: FPS: 7392 FrameTime: 0.135 ms
[shading] shading=gouraud: FPS: 7442 FrameTime: 0.134 ms
[shading] shading=blinn-phong-inf: FPS: 7417 FrameTime: 0.135 ms
[shading] shading=phong: FPS: 7396 FrameTime: 0.135 ms
[shading] shading=cel: FPS: 6804 FrameTime: 0.147 ms
[bump] bump-render=high-poly: FPS: 6789 FrameTime: 0.147 ms
[bump] bump-render=normals: FPS: 7159 FrameTime: 0.140 ms
[bump] bump-render=height: FPS: 7177 FrameTime: 0.139 ms
[effect2d] kernel=0,1,0;1,-4,1;0,1,0;: FPS: 7674 FrameTime: 0.130 ms
[effect2d] kernel=1,1,1,1,1;1,1,1,1,1;1,1,1,1,1;: FPS: 3783 FrameTime:
0.264 ms
[pulsar] light=false:quads=5:texture=false: FPS: 5684 FrameTime: 0.176 ms
[desktop] blur-radius=5:effect=blur:passes=1:separable=true:windows=4:
FPS: 3631 FrameTime: 0.275 ms
[desktop] effect=shadow:windows=4: FPS: 3730 FrameTime: 0.268 ms
[buffer]
columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=map:
FPS: 492 FrameTime: 2.033 ms
[buffer]
columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=subdata:
FPS: 551 FrameTime: 1.815 ms
[buffer]
columns=200:interleave=true:update-dispersion=0.9:update-fraction=0.5:update-method=map:
FPS: 1103 FrameTime: 0.907 ms
[ideas] speed=duration: FPS: 3298 FrameTime: 0.303 ms
[jellyfish] : FPS: 5440 FrameTime: 0.184 ms
[terrain] : FPS: 731 FrameTime: 1.368 ms
[shadow] : FPS: 5963 FrameTime: 0.168 ms
[refract] : FPS: 1384 FrameTime: 0.723 ms
[conditionals] fragment-steps=0:vertex-steps=0: FPS: 7454 FrameTime:
0.134 ms
[conditionals] fragment-steps=5:vertex-steps=0: FPS: 7460 FrameTime:
0.134 ms
[conditionals] fragment-steps=0:vertex-steps=5: FPS: 7469 FrameTime:
0.134 ms
[function] fragment-complexity=low:fragment-steps=5: FPS: 7401
FrameTime: 0.135 ms
[function] fragment-complexity=medium:fragment-steps=5: FPS: 7302
FrameTime: 0.137 ms
[loop] fragment-loop=false:fragment-steps=5:vertex-steps=5: FPS: 6979
FrameTime: 0.143 ms
[loop] fragment-steps=5:fragment-uniform=false:vertex-steps=5: FPS: 6416
FrameTime: 0.156 ms
[loop] fragment-steps=5:fragment-uniform=true:vertex-steps=5: FPS: 7423
FrameTime: 0.135 ms
===
glmark2 Score: 5615
===
On 2023/5/8 23:46, Sui Jingfeng wrote:
Nice patch!
I have tested this patch on ls3a5000+ls7a2000+AMDGPU RX550, but it
seems that dc_fpu_begin() and
dc_fpu_end() will not be called on AMDGPU RX550. But it at least
proved that
this patch does not introduce bugs to what already works.
I can proved that after apply this patch, glmark2 still works like a
charm.
fbtest and kms_flip test also run very well.
On 2023/5/8 11:09, Huacai Chen wrote:
LoongArch now provides kernel_fpu_begin() and kernel_fpu_end() that are
used like the x86 counterparts in commit 2b3bd32ea3a22ea2d ("LoongArch:
Provide kernel fpu functions"), so we can enable DC_FP on LoongArch for
supporting more DCN devices.
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai Chen
---
V2: Update commit message to add the commit which provides kernel fpu
functions.
V3: Update commit message again and rebase on the latest code.
drivers/gpu/drm/amd/display/Kconfig | 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 6 --
drivers/gpu/drm/amd/display/dc/dml/Makefile | 5 +
3 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/drivers/gpu/drm/amd/display/Kconfig
index 2d8e55e29637..49df073962d5 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -8,7 +8,7 @@ config DRM_AMD_DC
depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
select SND_HDA_COMPONENT if SND_HDA_CORE
# !CC_IS_CLANG:
https://github.com/ClangBuiltLinux/linux/issues/1752
- select DRM_AMD_DC_FP if (X86 || (PPC64 && ALTIVEC) || (ARM64 &&
KERNEL_MODE_NEON && !CC_IS_CLANG))
+ select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC)
|| (ARM64 &&
[PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain
in init sequence.
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 86246f69dbe1..ccd3ea89eacf 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1467,8 +1467,14 @@ int amdgpu_dpm_is_overdrive_supported(struct
amdgpu_device *adev)
} else {
struct pp_hwmgr *hwmgr;
- /* SI asic does not carry od_enabled */
- if (adev->family == AMDGPU_FAMILY_SI)
+ /*
+* SI asic and chip MULLINS/KABINI/KAVERI do not carry
+* od_enabled, as its pp_handle is casted from adev.
+*/
+ if ((adev->family == AMDGPU_FAMILY_SI) ||
+ (adev->asic_type == CHIP_MULLINS) ||
+ (adev->asic_type == CHIP_KABINI) ||
+ (adev->asic_type == CHIP_KAVERI))
return false;
hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
--
2.25.1
Re: [RFC PATCH 09/40] drm/amd/display: move replace blob func to dm plane
On 4/23/23 10:10, Melissa Wen wrote:
> From amdgpu_dm_plane we can get it for both CRTC and plane color
> properties. We are adding new plane properties for AMD driver-private
> color mgmt.
>
> Signed-off-by: Melissa Wen
> ---
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 37 +--
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 35 ++
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 7
> 3 files changed, 44 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> index 79324fbab1f1..27d7a8b18013 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> @@ -344,39 +344,6 @@ dm_crtc_additional_color_mgmt(struct drm_crtc *crtc)
> DRM_TRANSFER_FUNCTION_DEFAULT);
> }
>
> -static int
> -atomic_replace_property_blob_from_id(struct drm_device *dev,
> - struct drm_property_blob **blob,
> - uint64_t blob_id,
> - ssize_t expected_size,
> - ssize_t expected_elem_size,
> - bool *replaced)
> -{
> - struct drm_property_blob *new_blob = NULL;
> -
> - if (blob_id != 0) {
> - new_blob = drm_property_lookup_blob(dev, blob_id);
> - if (new_blob == NULL)
> - return -EINVAL;
> -
> - if (expected_size > 0 &&
> - new_blob->length != expected_size) {
> - drm_property_blob_put(new_blob);
> - return -EINVAL;
> - }
> - if (expected_elem_size > 0 &&
> - new_blob->length % expected_elem_size != 0) {
> - drm_property_blob_put(new_blob);
> - return -EINVAL;
> - }
> - }
> -
> - *replaced |= drm_property_replace_blob(blob, new_blob);
> - drm_property_blob_put(new_blob);
> -
> - return 0;
> -}
> -
> static int
> amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,
> struct drm_crtc_state *state,
> @@ -389,7 +356,7 @@ amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,
> int ret;
>
> if (property == adev->mode_info.shaper_lut_property) {
> - ret = atomic_replace_property_blob_from_id(crtc->dev,
> + ret = amdgpu_dm_replace_property_blob_from_id(crtc->dev,
> _state->shaper_lut,
> val,
> -1, sizeof(struct drm_color_lut),
> @@ -397,7 +364,7 @@ amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,
> acrtc_state->base.color_mgmt_changed |= replaced;
> return ret;
> } else if (property == adev->mode_info.lut3d_property) {
> - ret = atomic_replace_property_blob_from_id(crtc->dev,
> + ret = amdgpu_dm_replace_property_blob_from_id(crtc->dev,
> _state->lut3d,
> val,
> -1, sizeof(struct drm_color_lut),
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 322668973747..4e5498153be2 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -1411,6 +1411,41 @@ static void dm_drm_plane_destroy_state(struct
> drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> +#ifdef CONFIG_STEAM_DECK
> +int
> +amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev,
> +struct drm_property_blob **blob,
> +uint64_t blob_id,
> +ssize_t expected_size,
> +ssize_t expected_elem_size,
> +bool *replaced)
> +{
> + struct drm_property_blob *new_blob = NULL;
> +
> + if (blob_id != 0) {
> + new_blob = drm_property_lookup_blob(dev, blob_id);
> + if (new_blob == NULL)
> + return -EINVAL;
> +
> + if (expected_size > 0 &&
> + new_blob->length != expected_size) {
> + drm_property_blob_put(new_blob);
> + return -EINVAL;
> + }
> + if (expected_elem_size > 0 &&
> + new_blob->length % expected_elem_size != 0) {
> + drm_property_blob_put(new_blob);
> + return -EINVAL;
> + }
> + }
> +
> + *replaced |=
Re: [RFC PATCH 03/40] drm/amd/display: introduce Steam Deck color features to AMD display driver
On 4/23/23 10:10, Melissa Wen wrote: > We are enabling a large set of color calibration features to enhance KMS > color mgmt but these properties are specific of AMD display HW, and > cannot be provided by other vendors. Therefore, set a config option to > enable AMD driver-private properties used on Steam Deck color mgmt > pipeline. > > Co-developed-by: Joshua Ashton > Signed-off-by: Joshua Ashton > Signed-off-by: Melissa Wen > --- > drivers/gpu/drm/amd/display/Kconfig | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/Kconfig > b/drivers/gpu/drm/amd/display/Kconfig > index 06b438217c61..c45a8deb1098 100644 > --- a/drivers/gpu/drm/amd/display/Kconfig > +++ b/drivers/gpu/drm/amd/display/Kconfig > @@ -53,5 +53,11 @@ config DRM_AMD_SECURE_DISPLAY > of crc of specific region via debugfs. > Cooperate with specific DMCU FW. > > +config STEAM_DECK > + bool "Enable color calibration features for Steam Deck" > + depends on DRM_AMD_DC > + help > + Choose this option if you want to use AMDGPU features for broader > + color management support on Steam Deck. > If we can drop this (i.e. don't offer a CONFIG_ option to allow enablement of the uAPI, but build with -DCONFIG_STEAM_DECK) it would go a long way to keep us from requiring to support this forever. Harry > endmenu
Re: [RFC PATCH 00/40] drm/amd/display: add AMD driver-specific properties for color mgmt
On 4/23/23 10:10, Melissa Wen wrote: > Hi all, > > Joshua Ashton and I (with the great collaboration of Harry Wentland - > thanks) have been working on KMS color pipeline enhancement for Steam > Deck/SteamOS by exposing the large set of color caps available in AMD > display HW. > Thank you for your work on this. > This patchset results from this full-stack work, including pre-blending > and post-blending new color properties. The first two patches fix > quantization issues on shaper LUT programming. Just after, we have one > patch that adds a config option to restrict AMD colo feature usage. The > following 13 patches implement AMD driver-private color properties > (pending detachment of property counter and plane color_mgmt_changed > from DRM). Finally, the last 24 patches rework the AMD display manager > and color management to support the properties exposed. > > In short, for pre-blending, we added the following: > - plane degamma LUT and predefined transfer function; > - plane HDR multiplier > - plane shaper LUT/transfer function; > - plane 3D LUT; and finally, > - plane blend LUT/transfer function, just before blending. > > After blending, we already have DRM CRTC degamma/gamma LUTs and CTM, > therefore, we extend CRTC color pipeline with the following: > - CRTC shaper LUT/transfer function; > - CRTC 3D LUT; and > - CRTC gamma transfer function. > > You can already find the AMD color capabilities and color management > pipeline documented here: > https://dri.freedesktop.org/docs/drm/gpu/amdgpu/display/display-manager.html#color-management-properties > > In previous iterations, we tried to provide a generic solution for > post-blending shaper and 3D LUT [1][2][3], and also Alex Hung worked on > a pre-blending 3D LUT solution[4] extending plane color mgmt proposal > from Uma Shankar [5]. However, we identified during our work [6] that > AMD provides many other valuable capabilities that we don't find in > other vendors, so we started to work on AMD driver-private color > properties that better describe its color pipeline, enabling us to > expose full AMD color capabilities on Deck HW. > > Our primary purpose is to avoid usage limitations of color calibration > features provided by HW just because we don't have an interface for > that. At the same time, a generic solution doesn't fit well since some > of these capabilities seem AMD HW specific, such as hardcoded > curve/predefined transfer function and shaper 1D LUTs sandwiching 3D > LUT. > > So far, we keep these properties' usage under an AMD display config > option (STEAM_DECK). However, we are fine with having them fully > available to other DCN HW generations. In the current proposal, we are > already checking ASICs before exposing a color feature. We can work on > 3D LUT resource acquisition details to fit them to DCN 3+ families that > support them. Indeed, before moving to these config boundaries, we > started working on an open solution for any AMD HW [7]. > The problem with a CONFIG_XYZ option is that it becomes uAPI and can't be removed. I feel we have a good proposal going for the generic solution. Would it work for you if we don't make this a CONFIG_ option? What I mean is using #define AMD_PRIVATE_COLOR around the interface bits, which are only compiled when building with -DAMD_PRIVATE_COLOR That way we have the option to rip the driver-private stuff out later while still allowing for experimentation now. Or, alternatively, we can merge everything but the stuff currently guarded by CONFIG_STEAM_DECK, so that custom kernels can enable this functionality by simply merging one patch that includes all the CONFIG_STEAM_DECK stuff. This will allow us to merge the vast majority of the code without having to maintain it in downstream repo. > The userspace case here is Gamescope which is the compositor for > SteamOS. It's already using all of this functionality (although with a > VALVE1_ prefix instead of AMD) to implement its color management > pipeline right now: > https://github.com/ValveSoftware/gamescope > > We are planning on shipping our color management support with gamut > mapping, HDR, SDR on HDR, HDR on SDR, and much more in Steam OS 3.5. A > brief overview of our color pipeline can be found here: > https://github.com/ValveSoftware/gamescope/blob/master/src/docs/Steam%20Deck%20Display%20Pipeline.png > > We have also had some other userspace interests from Xaver Hugl (KDE) in > experimenting with these properties for their HDR/color bring-up before > a generic interface is settled on also. > > It still needs AMD-specific IGT tests; we are working on documentation > and adding plane CTM support too. > > We decided first to share our work to collect thoughts and open for > discussion, even with missing refinements, since driver-private > properties are not the usual DMR/KMS color management approach. > > Please, let us know your thoughts. > As discussed at the hackfest I think it's a good idea to have something
Re: [RFC PATCH 05/40] drm/amd/display: add shaper LUT driver-private props
On 4/23/23 10:10, Melissa Wen wrote:
> CRTC shaper LUT shapes the content after blending, i.e., de-linearizes
> or normalizes space before applying a 3D LUT color correction. In the
> next patch, we add CRTC 3D LUT property to DRM color management after
> this shaper LUT and before the current CRTC gamma LUT.
>
It might be good to describe the motivation behind the "de-linearization"
of pixels. Since a 3DLUT has a limited number of entries in each dimension
we want to use them in an optimal fashion. This means using the 3DLUT in
a colorspace that is optimized for human vision, such as sRGB, PQ, or
another non-linear space.
> Signed-off-by: Melissa Wen
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 28
> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 14 ++
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 17 +++
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 122 +-
> 4 files changed, 179 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 8632ab695a6c..44c22cb87dde 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -1247,6 +1247,30 @@ amdgpu_display_user_framebuffer_create(struct
> drm_device *dev,
> return _fb->base;
> }
>
> +#ifdef CONFIG_STEAM_DECK
Something like AMD_PRIVATE_COLOR would be better.
It might also be enough to guard only the bits that make the uAPI
appear, such as drm_property_create, etc.
Harry
> +static int
> +amdgpu_display_create_color_properties(struct amdgpu_device *adev)
> +{
> + struct drm_property *prop;
> +
> + prop = drm_property_create(adev_to_drm(adev),
> +DRM_MODE_PROP_BLOB,
> +"AMD_SHAPER_LUT", 0);
> + if (!prop)
> + return -ENOMEM;
> + adev->mode_info.shaper_lut_property = prop;
> +
> + prop = drm_property_create_range(adev_to_drm(adev),
> + DRM_MODE_PROP_IMMUTABLE,
> + "AMD_SHAPER_LUT_SIZE", 0, UINT_MAX);
> + if (!prop)
> + return -ENOMEM;
> + adev->mode_info.shaper_lut_size_property = prop;
> +
> + return 0;
> +}
> +#endif
> +
> const struct drm_mode_config_funcs amdgpu_mode_funcs = {
> .fb_create = amdgpu_display_user_framebuffer_create,
> };
> @@ -1323,6 +1347,10 @@ int amdgpu_display_modeset_create_props(struct
> amdgpu_device *adev)
> return -ENOMEM;
> }
>
> +#ifdef CONFIG_STEAM_DECK
> + if (amdgpu_display_create_color_properties(adev))
> + return -ENOMEM;
> +#endif
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index b8633df418d4..1fd3497af3b5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -344,6 +344,20 @@ struct amdgpu_mode_info {
> int disp_priority;
> const struct amdgpu_display_funcs *funcs;
> const enum drm_plane_type *plane_type;
> +
> + /* Driver-private color mgmt props */
> +#ifdef CONFIG_STEAM_DECK
> + /**
> + * @shaper_lut_property: CRTC property to set post-blending shaper LUT
> + * that converts content before 3D LUT gamma correction.
> + */
> + struct drm_property *shaper_lut_property;
> + /**
> + * @shaper_lut_size_property: CRTC property for the size of
> + * post-blending shaper LUT as supported by the driver (read-only).
> + */
> + struct drm_property *shaper_lut_size_property;
> +#endif
> };
>
> #define AMDGPU_MAX_BL_LEVEL 0xFF
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index 2e2413fd73a4..de63455896cc 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -726,6 +726,23 @@ struct dm_crtc_state {
> struct dc_info_packet vrr_infopacket;
>
> int abm_level;
> +
> +#ifdef CONFIG_STEAM_DECK
> + /* AMD driver-private color mgmt pipeline
> + *
> + * DRM provides CRTC degamma/ctm/gamma color mgmt features, but AMD HW
> + * has a larger set of post-blending color calibration features, as
> + * below:
> + */
> + /**
> + * @shaper_lut:
> + *
> + * Lookup table used to de-linearize pixel data for gamma correction.
> + * See drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array
> + * of drm_color_lut.
> + */
> + struct drm_property_blob *shaper_lut;
> +#endif
> };
>
> #define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> index e3762e806617..503433e5cb38 100644
> ---
Re: [RFC PATCH 07/40] drm/amd/display: add CRTC gamma TF to driver-private props
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Add predefined transfer function property to DRM CRTC gamma to convert
> to wire encoding with or without gamma LUT.
>
Are all these new CRTC properties used by gamescope? I would be reluctant
to merge them if they're currently not needed.
> Co-developed-by: Melissa Wen
> Signed-off-by: Melissa Wen
> Signed-off-by: Joshua Ashton
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 22 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 23 +++
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 13 +++
> 4 files changed, 62 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 2abe5fe87c10..1913903cab88 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -1248,6 +1248,19 @@ amdgpu_display_user_framebuffer_create(struct
> drm_device *dev,
> }
>
> #ifdef CONFIG_STEAM_DECK
> +static const struct drm_prop_enum_list drm_transfer_function_enum_list[] = {
> + { DRM_TRANSFER_FUNCTION_DEFAULT, "Default" },
> + { DRM_TRANSFER_FUNCTION_SRGB, "sRGB" },
> + { DRM_TRANSFER_FUNCTION_BT709, "BT.709" },
> + { DRM_TRANSFER_FUNCTION_PQ, "PQ (Perceptual Quantizer)" },
> + { DRM_TRANSFER_FUNCTION_LINEAR, "Linear" },
> + { DRM_TRANSFER_FUNCTION_UNITY, "Unity" },
> + { DRM_TRANSFER_FUNCTION_HLG, "HLG (Hybrid Log Gamma)" },
> + { DRM_TRANSFER_FUNCTION_GAMMA22, "Gamma 2.2" },
> + { DRM_TRANSFER_FUNCTION_GAMMA24, "Gamma 2.4" },
> + { DRM_TRANSFER_FUNCTION_GAMMA26, "Gamma 2.6" },
> +};
> +
Would it be better to prefix things with AMD_/amd_ to avoid confusion? On the
other
hand, these will likely just move into DRM core once we get the generic color
uAPI.
Harry
> static int
> amdgpu_display_create_color_properties(struct amdgpu_device *adev)
> {
> @@ -1281,6 +1294,15 @@ amdgpu_display_create_color_properties(struct
> amdgpu_device *adev)
> return -ENOMEM;
> adev->mode_info.lut3d_size_property = prop;
>
> + prop = drm_property_create_enum(adev_to_drm(adev),
> + DRM_MODE_PROP_ENUM,
> + "GAMMA_TF",
> + drm_transfer_function_enum_list,
> +
> ARRAY_SIZE(drm_transfer_function_enum_list));
> + if (!prop)
> + return -ENOMEM;
> + adev->mode_info.gamma_tf_property = prop;
> +
> return 0;
> }
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index 205fa4f5bea7..76337e18c728 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -368,6 +368,10 @@ struct amdgpu_mode_info {
>* LUT as supported by the driver (read-only).
>*/
> struct drm_property *lut3d_size_property;
> + /**
> + * @gamma_tf_property: Transfer function for CRTC regamma.
> + */
> + struct drm_property *gamma_tf_property;
> #endif
> };
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index 09c3e1858b56..1e90a2dd445e 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -699,6 +699,23 @@ static inline void amdgpu_dm_set_mst_status(uint8_t
> *status,
>
> extern const struct amdgpu_ip_block_version dm_ip_block;
>
> +#ifdef CONFIG_STEAM_DECK
> +enum drm_transfer_function {
> + DRM_TRANSFER_FUNCTION_DEFAULT,
> +
> + DRM_TRANSFER_FUNCTION_SRGB,
> + DRM_TRANSFER_FUNCTION_BT709,
> + DRM_TRANSFER_FUNCTION_PQ,
> + DRM_TRANSFER_FUNCTION_LINEAR,
> + DRM_TRANSFER_FUNCTION_UNITY,
> + DRM_TRANSFER_FUNCTION_HLG,
> + DRM_TRANSFER_FUNCTION_GAMMA22,
> + DRM_TRANSFER_FUNCTION_GAMMA24,
> + DRM_TRANSFER_FUNCTION_GAMMA26,
> + DRM_TRANSFER_FUNCTION_MAX,
> +};
> +#endif
> +
> struct dm_plane_state {
> struct drm_plane_state base;
> struct dc_plane_state *dc_state;
> @@ -751,6 +768,12 @@ struct dm_crtc_state {
>* drm_color_lut.
>*/
> struct drm_property_blob *lut3d;
> +/**
> + * @gamma_tf:
> + *
> + * Pre-defined transfer function for converting internal FB -> wire
> encoding.
> + */
> + enum drm_transfer_function gamma_tf;
> #endif
> };
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> index 0e1280228e6e..79324fbab1f1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> @@ -272,6 +272,7 @@ static struct drm_crtc_state
> *dm_crtc_duplicate_state(struct
RE: [PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in vcn_v4_0_hw_fini
[AMD Official Use Only - General]
Hi Tao,
Sorry, I forgot to check, thank you for your suggestion. I will update this
modification in the next version.
Thanks,
Horatio
-Original Message-
From: Zhou1, Tao
Sent: Monday, May 8, 2023 7:05 PM
To: Zhang, Horatio ; amd-gfx@lists.freedesktop.org
Cc: Liu, HaoPing (Alan) ; Zhang, Horatio
; Xu, Feifei ; Jiang, Sonny
; Limonciello, Mario ; Liu, Leo
; Zhang, Hawking
Subject: RE: [PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in
vcn_v4_0_hw_fini
[AMD Official Use Only - General]
> -Original Message-
> From: amd-gfx On Behalf Of
> Horatio Zhang
> Sent: Monday, May 8, 2023 6:20 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, HaoPing (Alan) ; Zhang, Horatio
> ; Xu, Feifei ; Zhou1, Tao
> ; Jiang, Sonny ; Limonciello,
> Mario ; Liu, Leo ; Zhang,
> Hawking
> Subject: [PATCH 2/2] drm/amdgpu: fix amdgpu_irq_put call trace in
> vcn_v4_0_hw_fini
>
> During the suspend, the vcn_v4_0_hw_init function will use the
> amdgpu_irq_put to disable the irq of vcn.inst, but it was not enabled
> during the resume process, which resulted in a call trace during the GPU
> reset process.
>
> [ 44.563572] RIP: 0010:amdgpu_irq_put+0xa4/0xc0 [amdgpu]
> [ 44.563629] RSP: 0018:b36740edfc90 EFLAGS: 00010246
> [ 44.563630] RAX: RBX: 0001 RCX:
>
> [ 44.563630] RDX: RSI: RDI:
>
> [ 44.563631] RBP: b36740edfcb0 R08: R09:
>
> [ 44.563631] R10: R11: R12:
> 954c568e2ea8
> [ 44.563631] R13: R14: 954c568c R15:
> 954c568e2ea8
> [ 44.563632] FS: () GS:954f584c()
> knlGS:
> [ 44.563632] CS: 0010 DS: ES: CR0: 80050033
> [ 44.563633] CR2: 7f028741ba70 CR3: 00026ca1 CR4:
> 00750ee0
> [ 44.563633] PKRU: 5554
> [ 44.563633] Call Trace:
> [ 44.563634]
> [ 44.563634] vcn_v4_0_hw_fini+0x62/0x160 [amdgpu]
> [ 44.563700] vcn_v4_0_suspend+0x13/0x30 [amdgpu]
> [ 44.563755] amdgpu_device_ip_suspend_phase2+0x240/0x470 [amdgpu]
> [ 44.563806] amdgpu_device_ip_suspend+0x41/0x80 [amdgpu]
> [ 44.563858] amdgpu_device_pre_asic_reset+0xd9/0x4a0 [amdgpu]
> [ 44.563909] amdgpu_device_gpu_recover.cold+0x548/0xcf1 [amdgpu]
> [ 44.564006] amdgpu_debugfs_reset_work+0x4c/0x80 [amdgpu]
> [ 44.564061] process_one_work+0x21f/0x400
> [ 44.564062] worker_thread+0x200/0x3f0
> [ 44.564063] ? process_one_work+0x400/0x400
> [ 44.564064] kthread+0xee/0x120
> [ 44.564065] ? kthread_complete_and_exit+0x20/0x20
> [ 44.564066] ret_from_fork+0x22/0x30
>
> Fixes: ea5309de7388 ("drm/amdgpu: add VCN 4.0 RAS poison consumption
> handling")
> Signed-off-by: Horatio Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 17 -
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index bf0674039598..b55eb1bf3e30 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -281,6 +281,21 @@ static int vcn_v4_0_hw_init(void *handle)
> return r;
> }
>
> +static int vcn_v4_0_late_init(void *handle) {
> + struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> + int i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> + if (adev->vcn.harvest_config & (1 << i))
> + continue;
> +
> + amdgpu_irq_get(adev, >vcn.inst[i].irq, 0);
[Tao] we can also check its return value and exit if the r is none-zero. But
either way is fine with me.
> + }
> +
> + return 0;
> +}
> +
> /**
> * vcn_v4_0_hw_fini - stop the hardware block
> *
> @@ -2047,7 +2062,7 @@ static void vcn_v4_0_set_irq_funcs(struct
> amdgpu_device *adev) static const struct amd_ip_funcs vcn_v4_0_ip_funcs = {
> .name = "vcn_v4_0",
> .early_init = vcn_v4_0_early_init,
> - .late_init = NULL,
> + .late_init = vcn_v4_0_late_init,
> .sw_init = vcn_v4_0_sw_init,
> .sw_fini = vcn_v4_0_sw_fini,
> .hw_init = vcn_v4_0_hw_init,
> --
> 2.34.1
RE: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
> -Original Message-
> From: Lazar, Lijo
> Sent: Tuesday, May 9, 2023 11:47 AM
> To: Chen, Guchun ; amd-
> g...@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Quan, Evan
> Subject: Re: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy
> asics
>
>
>
> On 5/9/2023 7:12 AM, Guchun Chen wrote:
> > Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
> > amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain in
> > init sequence.
> >
> > Suggested-by: Evan Quan
> > Signed-off-by: Guchun Chen
> > ---
> > drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 --
> > 1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> > b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> > index 86246f69dbe1..ccd3ea89eacf 100644
> > --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> > +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> > @@ -1467,8 +1467,14 @@ int
> amdgpu_dpm_is_overdrive_supported(struct amdgpu_device *adev)
> > } else {
> > struct pp_hwmgr *hwmgr;
> >
>
> Instead of family check, what if you wrap it like -
>
> is_legacy_dpm(adev)
> return (adev->powerplay.pp_handle == adev)
>
> Could be useful for legacy dpm checks.
Sounds good. Will address it in v2.
Regards,
Guchun
> Thanks,
> Lijo
>
> > - /* SI asic does not carry od_enabled */
> > - if (adev->family == AMDGPU_FAMILY_SI)
> > + /*
> > +* SI asic and chip MULLINS/KABINI/KAVERI do not carry
> > +* od_enabled, as its pp_handle is casted from adev.
> > +*/
> > + if ((adev->family == AMDGPU_FAMILY_SI) ||
> > + (adev->asic_type == CHIP_MULLINS) ||
> > + (adev->asic_type == CHIP_KABINI) ||
> > + (adev->asic_type == CHIP_KAVERI))
> > return false;
> >
> > hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
RE: [PATCH] drm/amd/amdgpu: Remove redundant else branch in amdgpu_encoders.c
[AMD Official Use Only - General]
-Original Message-
From: Alex Deucher
Sent: Monday, May 8, 2023 9:27 PM
To: SHANMUGAM, SRINIVASAN
Cc: Koenig, Christian ; Deucher, Alexander
; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: Remove redundant else branch in
amdgpu_encoders.c
On Mon, May 8, 2023 at 11:29 AM Srinivasan Shanmugam
wrote:
>
> Adhere to Linux kernel coding style.
>
> Reported by checkpatch:
>
> WARNING: else is not generally useful after a break or return
>
What about the else in the previous case statement?
Alex
Hi Alex,
Thanks a lot for your feedbacks,
the else in the previous case ie., is binded to if statement ie., "if
(amdgpu_connector->use_digital) {", am I correct please?, please correct me, if
my understanding is wrong? & the best solution with your tips pls, so that I
can edit & resend the patch please?
Much appreciate for your help in advance,
> Cc: Christian König
> Cc: Alex Deucher
> Signed-off-by: Srinivasan Shanmugam
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c | 26
> ++--
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> index c96e458ed088..049e9976ff34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c
> @@ -242,19 +242,18 @@ bool amdgpu_dig_monitor_is_duallink(struct drm_encoder
> *encoder,
> if ((dig_connector->dp_sink_type ==
> CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
> (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
> return false;
> - else {
> - /* HDMI 1.3 supports up to 340 Mhz over single link */
> - if (connector->display_info.is_hdmi) {
> - if (pixel_clock > 34)
> - return true;
> - else
> - return false;
> - } else {
> - if (pixel_clock > 165000)
> - return true;
> - else
> - return false;
> - }
> +
> + /* HDMI 1.3 supports up to 340 Mhz over single link */
> + if (connector->display_info.is_hdmi) {
> + if (pixel_clock > 34)
> + return true;
> + else
> + return false;
> + } else {
> + if (pixel_clock > 165000)
> + return true;
> + else
> + return false;
> }
> default:
> return false;
> --
> 2.25.1
>
[PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
Prevent further dpm casting on legacy asics without od_enabled in
amdgpu_dpm_is_overdrive_supported. This can avoid UBSAN complain
in init sequence.
v2: add a macro to check legacy dpm instead of checking asic family/type
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 86246f69dbe1..4b28fd62ed7a 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -36,6 +36,8 @@
#define amdgpu_dpm_enable_bapm(adev, e) \
((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
+#define is_legacy_dpm(adev) ((adev)->powerplay.pp_handle == (adev))
+
int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low)
{
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
@@ -1467,8 +1469,11 @@ int amdgpu_dpm_is_overdrive_supported(struct
amdgpu_device *adev)
} else {
struct pp_hwmgr *hwmgr;
- /* SI asic does not carry od_enabled */
- if (adev->family == AMDGPU_FAMILY_SI)
+ /*
+* dpm on some legacy asics don't carry od_enabled member
+* as its pp_handle is casted directly from adev.
+*/
+ if (is_legacy_dpm(adev))
return false;
hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
--
2.25.1
RE: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
[AMD Official Use Only - General]
Acked-by: Evan Quan
> -Original Message-
> From: Chen, Guchun
> Sent: Tuesday, May 9, 2023 9:43 AM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Lazar, Lijo ; Quan, Evan
>
> Cc: Chen, Guchun
> Subject: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
>
> Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
> amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain
> in init sequence.
>
> Suggested-by: Evan Quan
> Signed-off-by: Guchun Chen
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> index 86246f69dbe1..ccd3ea89eacf 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> @@ -1467,8 +1467,14 @@ int amdgpu_dpm_is_overdrive_supported(struct
> amdgpu_device *adev)
> } else {
> struct pp_hwmgr *hwmgr;
>
> - /* SI asic does not carry od_enabled */
> - if (adev->family == AMDGPU_FAMILY_SI)
> + /*
> + * SI asic and chip MULLINS/KABINI/KAVERI do not carry
> + * od_enabled, as its pp_handle is casted from adev.
> + */
> + if ((adev->family == AMDGPU_FAMILY_SI) ||
> + (adev->asic_type == CHIP_MULLINS) ||
> + (adev->asic_type == CHIP_KABINI) ||
> + (adev->asic_type == CHIP_KAVERI))
> return false;
>
> hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
> --
> 2.25.1
Re: [PATCH] drm/amd/pm: avoid potential UBSAN issue on legacy asics
On 5/9/2023 7:12 AM, Guchun Chen wrote:
Prevent further casting on chip MULLINS/KABINI/KAVERI when calling
amdgpu_dpm_is_overdrive_supported, this can avoid UBSAN complain
in init sequence.
Suggested-by: Evan Quan
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 86246f69dbe1..ccd3ea89eacf 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1467,8 +1467,14 @@ int amdgpu_dpm_is_overdrive_supported(struct
amdgpu_device *adev)
} else {
struct pp_hwmgr *hwmgr;
Instead of family check, what if you wrap it like -
is_legacy_dpm(adev)
return (adev->powerplay.pp_handle == adev)
Could be useful for legacy dpm checks.
Thanks,
Lijo
- /* SI asic does not carry od_enabled */
- if (adev->family == AMDGPU_FAMILY_SI)
+ /*
+* SI asic and chip MULLINS/KABINI/KAVERI do not carry
+* od_enabled, as its pp_handle is casted from adev.
+*/
+ if ((adev->family == AMDGPU_FAMILY_SI) ||
+ (adev->asic_type == CHIP_MULLINS) ||
+ (adev->asic_type == CHIP_KABINI) ||
+ (adev->asic_type == CHIP_KAVERI))
return false;
hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
Re: [RFC PATCH 12/40] drm/amd/display: add plane HDR multiplier driver-private property
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
> nits for SDR content. So if you want, 203 nits for SDR content, pass in
> (203.0 / 80.0).
>
Is gamescope intending to use this?
Harry
> Co-developed-by: Melissa Wen
> Signed-off-by: Melissa Wen
> Signed-off-by: Joshua Ashton
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++-
> 4 files changed, 41 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 24595906dab1..dd658f162f6f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct
> amdgpu_device *adev)
> return -ENOMEM;
> adev->mode_info.plane_degamma_tf_property = prop;
>
> + prop = drm_property_create_range(adev_to_drm(adev),
> + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX);
> + if (!prop)
> + return -ENOMEM;
> + adev->mode_info.plane_hdr_mult_property = prop;
> +
> return 0;
> }
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index ab9ce6f26c90..65a9d62ffbe4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -387,6 +387,10 @@ struct amdgpu_mode_info {
>* linearize content with or without LUT.
>*/
> struct drm_property *plane_degamma_tf_property;
> + /**
> + * @plane_hdr_mult_property:
> + */
> + struct drm_property *plane_hdr_mult_property;
> #endif
> };
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index 005632c1c9ec..bb7307b9cfd5 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -51,6 +51,7 @@
>
> #define AMDGPU_DMUB_NOTIFICATION_MAX 5
>
> +#define AMDGPU_HDR_MULT_DEFAULT (0x1LL)
> /*
> #include "include/amdgpu_dal_power_if.h"
> #include "amdgpu_dm_irq.h"
> @@ -736,6 +737,17 @@ struct dm_plane_state {
>* linearize.
>*/
> enum drm_transfer_function degamma_tf;
> + /**
> + * @hdr_mult:
> + *
> + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed
> + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on
> + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously.
> + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you
> + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is
> + * S31.32 sign-magnitude.
> + */
> + __u64 hdr_mult;
> #endif
> };
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 5b458cc0781c..57169dae8b3d 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane)
> __drm_atomic_helper_plane_reset(plane, _state->base);
>
> #ifdef CONFIG_STEAM_DECK
> - if (amdgpu_state)
> + if (amdgpu_state) {
> amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT;
> + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT;
> + }
> #endif
> }
>
> @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct
> drm_plane *plane,
> #ifdef CONFIG_STEAM_DECK
> int
> amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev,
> -struct drm_property_blob **blob,
> -uint64_t blob_id,
> -ssize_t expected_size,
> -ssize_t expected_elem_size,
> -bool *replaced)
> + struct drm_property_blob **blob,
> + uint64_t blob_id,
> + ssize_t expected_size,
> + ssize_t expected_elem_size,
> + bool *replaced)
> {
> struct drm_property_blob *new_blob = NULL;
>
> @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct
> amdgpu_display_manager *dm,
>
[PATCH] drm/amdgpu/gfx: disable gfx9 cp_ecc_error_irq only when enabling legacy gfx ras
gfx9 cp_ecc_error_irq is only enabled when legacy gfx ras is assert.
So in gfx_v9_0_hw_fini, interrupt disablement for cp_ecc_error_irq
should be executed under such condition, otherwise, an amdgpu_irq_put
calltrace will occur.
[ 7283.170322] RIP: 0010:amdgpu_irq_put+0x45/0x70 [amdgpu]
[ 7283.170964] RSP: 0018:9a5fc3967d00 EFLAGS: 00010246
[ 7283.170967] RAX: 98d88afd3040 RBX: 98d89da2 RCX:
[ 7283.170969] RDX: RSI: 98d89da2bef8 RDI: 98d89da2
[ 7283.170971] RBP: 98d89da2 R08: 98d89da2ca18 R09: 0006
[ 7283.170973] R10: d5764243c008 R11: R12: 1050
[ 7283.170975] R13: 98d89da38978 R14: 999ae15a R15: 98d880130105
[ 7283.170978] FS: () GS:98d996f0()
knlGS:
[ 7283.170981] CS: 0010 DS: ES: CR0: 80050033
[ 7283.170983] CR2: f7a9d178 CR3: 0001c42ea000 CR4: 003506e0
[ 7283.170986] Call Trace:
[ 7283.170988]
[ 7283.170989] gfx_v9_0_hw_fini+0x1c/0x6d0 [amdgpu]
[ 7283.171655] amdgpu_device_ip_suspend_phase2+0x101/0x1a0 [amdgpu]
[ 7283.172245] amdgpu_device_suspend+0x103/0x180 [amdgpu]
[ 7283.172823] amdgpu_pmops_freeze+0x21/0x60 [amdgpu]
[ 7283.173412] pci_pm_freeze+0x54/0xc0
[ 7283.173419] ? __pfx_pci_pm_freeze+0x10/0x10
[ 7283.173425] dpm_run_callback+0x98/0x200
[ 7283.173430] __device_suspend+0x164/0x5f0
v2: drop gfx11 as it's fixed in a different solution by retiring cp_ecc_irq
funcs(Hawking)
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2522
Signed-off-by: Guchun Chen
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index ae09fc1cfe6b..c54d05bdc2d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3751,7 +3751,8 @@ static int gfx_v9_0_hw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- amdgpu_irq_put(adev, >gfx.cp_ecc_error_irq, 0);
+ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX))
+ amdgpu_irq_put(adev, >gfx.cp_ecc_error_irq, 0);
amdgpu_irq_put(adev, >gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, >gfx.priv_inst_irq, 0);
--
2.25.1
[PATCH] drm/amdgpu: disable sdma ecc irq only when sdma RAS is enabled in suspend
sdma_v4_0_ip is shared on a few asics, but in sdma_v4_0_hw_fini,
driver unconditionally disables ecc_irq which is only enabled on
those asics enabling sdma ecc. This will introduce a warning in
suspend cycle on those chips with sdma ip v4.0, while without
sdma ecc. So this patch correct this.
[ 7283.166354] RIP: 0010:amdgpu_irq_put+0x45/0x70 [amdgpu]
[ 7283.167001] RSP: 0018:9a5fc3967d08 EFLAGS: 00010246
[ 7283.167019] RAX: 98d88afd3770 RBX: 0001 RCX:
[ 7283.167023] RDX: RSI: 98d89da30390 RDI: 98d89da2
[ 7283.167025] RBP: 98d89da2 R08: 00036838 R09: 0006
[ 7283.167028] R10: d5764243c008 R11: R12: 98d89da30390
[ 7283.167030] R13: 98d89da38978 R14: 999ae15a R15: 98d880130105
[ 7283.167032] FS: () GS:98d996f0()
knlGS:
[ 7283.167036] CS: 0010 DS: ES: CR0: 80050033
[ 7283.167039] CR2: f7a9d178 CR3: 0001c42ea000 CR4: 003506e0
[ 7283.167041] Call Trace:
[ 7283.167046]
[ 7283.167048] sdma_v4_0_hw_fini+0x38/0xa0 [amdgpu]
[ 7283.167704] amdgpu_device_ip_suspend_phase2+0x101/0x1a0 [amdgpu]
[ 7283.168296] amdgpu_device_suspend+0x103/0x180 [amdgpu]
[ 7283.168875] amdgpu_pmops_freeze+0x21/0x60 [amdgpu]
[ 7283.169464] pci_pm_freeze+0x54/0xc0
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2522
Signed-off-by: Guchun Chen
Reviewed-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index b5affba22156..8b8ddf050266 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1903,9 +1903,11 @@ static int sdma_v4_0_hw_fini(void *handle)
return 0;
}
- for (i = 0; i < adev->sdma.num_instances; i++) {
- amdgpu_irq_put(adev, >sdma.ecc_irq,
- AMDGPU_SDMA_IRQ_INSTANCE0 + i);
+ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) {
+ for (i = 0; i < adev->sdma.num_instances; i++) {
+ amdgpu_irq_put(adev, >sdma.ecc_irq,
+ AMDGPU_SDMA_IRQ_INSTANCE0 + i);
+ }
}
sdma_v4_0_ctx_switch_enable(adev, false);
--
2.25.1
