On 24 January 2017 at 22:29, Alex Xie wrote:
> Tested:
> 1. As root, tests passed on primary.
> 2. As root, tests passed on render node.
>BO export/import test was skipped
> 3. As non-privileged user, tests failed on primary as expected.
> 4. As non-privileged user, tests passed on render node
Hi Alex,
Things look a lot better imho. There's some ideas below, for the
future if you/others see value in them. Please do not worry about
those now.
On 24 January 2017 at 22:29, Alex Xie wrote:
> Verify the vender ID and driver name.
> Open all AMDGPU devices.
> Provide an option to open rende
On 24 January 2017 at 22:39, Xie, AlexBin wrote:
> Hi Emil,
>
> Point 1 will be left for future patch.
>
Definitely. I did not mean to ask/push you to address that here.
> Current error message is following.
> Error: Permission denied. Hint:Try to run this test program as root.
>
> I am thinking
1. delete redundant cg pg mask check.
pg mask use to ctrl power on/down uvd.
not start/stop uvd.
cg mask will be check when enable mgcg.
2. no need to start uvd when initializ.
when ring test/ib test/encode, uvd was enabled.
when uvd idle, uvd was stopped.
3. chang cg pg sequence in
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Thursday, January 26, 2017 6:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 12/12] drm/amdgpu: refine vce3.0 code and related
> powerplay pg code.
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Thursday, January 26, 2017 6:01 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 11/12] drm/amdgpu: move subfunctions to the front of
> vce_v2_0.c.
>
>
On Thu, Jan 26, 2017 at 4:40 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> The DFS check is only relevant for EXA.
>
> The lack of tiling prevented DRI3 clients from using page flipping,
> resulting in tearing.
>
> Bugzilla: https://bugs.freedesktop.org/99491
> Signed-off-by: Michel Dänzer
Change-Id: Ia77754cacd41dd6d6d19fecd276e8afffbcccef2
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 348 +-
1 file changed, 171 insertions(+), 177 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vce
Change-Id: Idafb0fbd6bdae1d29a2bc5bb142158714406e681
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index da255e5..e8
Change-Id: Ia969546324aa9b35c99926bb88d87f29829a70b4
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index
1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.
Change-Id: I852c4cf7066153074a12c272d81bfbe964d306a1
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 17 +++
.../dr
v2: clean up vce cg function.
use sw cg when vce stoped.
1. implement vce_stop function.
2. not start vce when hw_init.
3. refine vce cg/pg code.
4. delete bypass mode.
Change-Id: I14cc46fcec17d6e65ffda27a80f7215858e3b2dc
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm
Change-Id: I68049a20a6980febe63ecc0028143564f5742892
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
b/drivers/gpu/drm/amd/amdgp
1. set uvd_status busy before uvd_start.
2. clear uvd_status to 0 after uvd stop.
smu firmware may check uvd_status.
3. wait uvd idle before stop uvd.
4. not start uvd when hw_init.
Signed-off-by: Rex Zhu
Acked-by: Alex Deucher
Change-Id: I357deac817b8cbc2e6e8d0cc771ddb0c894b468e
---
driver
1. no need to set cg as use hw dynamic cg.
2. when uvd idle, stop uvd. encode, start uvd.
3. if pg feature enabled, power on/down uvd by smu.
4. drm/amdgpu: dpm do not set uvd pg status.
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 29 --
in dpm disabled case, we need to wait for more time.
otherwise, uvd can't be initialized in bonarie/hawaii.
Signed-off-by: Rex Zhu
Acked-by: Alex Deucher
Change-Id: Ia014a1b1b0ddff48c86309477e8aaf8b8f81d881
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 +--
drivers/gpu/drm/amd/amdgpu/uvd_v4_
Change-Id: Ib726b7b896a11264018b6a1894c94fcb817a46fa
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h
b/drivers/gpu/drm/amd/inclu
Rex Zhu (12):
drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.
drm/amdgpu: add current_pg_status register define for smu7.1
drm/amdgpu: power down/up uvd4 when smu disabled.
drm/amdgpu: refine uvd pg code in kv_dpm.c
drm/amdgpu: refine uvd4.2 init/stop code.
drm/amdgpu: refine
Change-Id: I69ad5568113dbda43fcf414c4bc2e3ff3c0116fb
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index
From: Michel Dänzer
The DFS check is only relevant for EXA.
The lack of tiling prevented DRI3 clients from using page flipping,
resulting in tearing.
Bugzilla: https://bugs.freedesktop.org/99491
Signed-off-by: Michel Dänzer
---
src/radeon_kms.c | 10 ++
1 file changed, 6 insertions(+)
On Thu, Jan 26, 2017 at 05:01:01AM +, Grodzovsky, Andrey wrote:
>
>
> > -Original Message-
> > From: Cheng, Tony
> > Sent: Monday, January 23, 2017 2:49 PM
> > To: Daniel Vetter; Grodzovsky, Andrey
> > Cc: Deucher, Alexander; nouv...@lists.freedesktop.org; amd-
> > g...@lists.freedesk
On Mon, Jan 23, 2017 at 07:48:54PM +, Cheng, Tony wrote:
>
>
> > -Original Message-
> > From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf
> > Of Daniel Vetter
> > Sent: Monday, January 23, 2017 3:55 AM
> > To: Grodzovsky, Andrey
> > Cc: Deucher, Alexander ;
>
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