[PATCH 03/26] drm/amdgpu: detect timeout error when deactivating hqd

Handle HQD deactivation timeouts instead of ignoring them. Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 20 +--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/d

[PATCH 12/26] drm/amdgpu: remove duplicate magic constants from amdgpu_amdkfd_gfx*.c

This information is already available in adev. Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 12 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 12 ++-- 2 files changed

[PATCH 13/26] drm/amdgpu: allocate queues horizontally across pipes

Pipes provide better concurrency than queues, therefore we want to make sure that apps use queues from different pipes whenever possible. Optimize for the trivial case where an app will consume rings in order, therefore we don't want adjacent rings to belong to the same pipe. Reviewed-by: Edward

[PATCH 17/26] drm/amdgpu: untie user ring ids from kernel ring ids v5

Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's ring ids from the kernel's ring ids. The queue manager maintains a per-file descriptor map of user ring ids to amdgpu_ring pointers. Once a map is created it is permanent (this is required to maintain FIFO execution guarantees fo

[PATCH 07/26] drm/amdgpu: take ownership of per-pipe configuration v2

Make amdgpu the owner of all per-pipe state of the HQDs. This change will allow us to split the queues between kfd and amdgpu with a queue granularity instead of pipe granularity. This patch fixes kfd allocating an HDP_EOP region for its 3 pipes which goes unused. v2: support for gfx9 Reviewed-

[PATCH 06/26] drm/amdgpu: rename rdev to adev

Rename straggler instances of r(adeon)dev to a(mdgpu)dev Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 70 +++--- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 14 +++--- drivers

[PATCH 05/26] drm/amdgpu: unify MQD programming sequence for kfd and amdgpu

Use the same gfx_*_mqd_commit function for kfd and amdgpu codepaths. This removes the last duplicates of this programming sequence. Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 51 ++--

[PATCH 11/26] drm/amdkfd: allow split HQD on per-queue granularity v4

Update the KGD to KFD interface to allow sharing pipes with queue granularity instead of pipe granularity. This allows for more interesting pipe/queue splits. v2: fix overflow check for res.queue_mask v3: fix shift overflow when setting res.queue_mask v4: fix comment in is_pipeline_enabled() Rev

[PATCH 25/26] drm/amdgpu: guarantee bijective mapping of ring ids for LRU v3

Depending on usage patterns, the current LRU policy may create a non-injective mapping between userspace ring ids and kernel rings. This behaviour is undesired as apps that attempt to fill all HW blocks would be unable to reach some of them. This change forces the LRU policy to create bijective m

[PATCH 10/26] drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3

The current implementation is hardcoded to enable ME1/PIPE0 interrupts only. This patch allows amdgpu to enable interrupts for any pipe of ME1. v2: added gfx9 support v3: use soc15_grbm_select for gfx9 Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 48 --

[PATCH 02/26] drm/amdgpu: doorbell registers need only be set once v2

The CP_MEC_DOORBELL_RANGE_* and CP_PQ_STATUS.DOORBELL_ENABLE registers are not HQD specific. They only need to be set once if at least 1 pipe requested doorbell support. v2: move doorbell_enable to amdgpu_gfx instead of amdgpu_device Reviewed-by: Edward O'Callaghan Acked-by: Christian König Si

[PATCH 08/26] drm/radeon: take ownership of pipe initialization

Take ownership of pipe initialization away from KFD. Note that hpd_eop_gpu_addr was already large enough to accomodate all pipes. Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/radeon/cik.c| 27 ++-

[PATCH 20/26] drm/amdgpu: add framework for HW specific priority settings v6

Add an initial framework for changing the HW priorities of rings. The framework allows requesting priority changes for the lifetime of an amdgpu_job. After the job completes the priority will decay to the next lowest priority for which a request is still valid. A new ring function set_priority() c

[PATCH 18/26] drm/amdgpu: implement lru amdgpu_queue_mgr policy for compute v4

Use an LRU policy to map usermode rings to HW compute queues. Most compute clients use one queue, and usually the first queue available. This results in poor pipe/queue work distribution when multiple compute apps are running. In most cases pipe 0 queue 0 is the only queue that gets used. In orde

[PATCH 21/26] drm/amdgpu: convert srbm lock to a spinlock v2

Replace adev->srbm_mutex with a spinlock adev->srbm_lock v2: rebased on 4.12 and included gfx9 Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 4 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v

[PATCH 24/26] drm/amdgpu: workaround tonga HW bug in HQD programming sequence

Tonga based asics may experience hangs when an HQD's EOP parameters are modified. Workaround this HW issue by avoiding writes to these registers for tonga asics. Based on the following ROCm commit: 2a0fb8 - drm/amdgpu: Synchronize KFD HQD load protocol with CP scheduler From the ROCm git reposit

[PATCH 09/26] drm/amdgpu: allow split of queues with kfd at queue granularity v3

Previously the queue/pipe split with kfd operated with pipe granularity. This patch allows amdgpu to take ownership of an arbitrary set of queues. It also consolidates the last few magic numbers in the compute initialization process into mec_init. v2: support for gfx9 v3: renamed AMDGPU_MAX_QUEUE

[PATCH 14/26] drm/amdgpu: remove hardcoded queue_mask in PACKET3_SET_RESOURCES v2

The assumption that we are only using the first pipe no longer holds. Instead, calculate the queue_mask from the queue_bitmap. v2: rename AMDGPU_MAX_QUEUES to AMDGPU_MAX_COMPUTE_QUEUES Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 20 ++-- drivers/gp

[PATCH 22/26] drm/amdgpu: implement ring set_priority for gfx_v8 compute v5

Programming CP_HQD_QUEUE_PRIORITY enables a queue to take priority over other queues on the same pipe. Multiple queues on a pipe are timesliced so this gives us full precedence over other queues. Programming CP_HQD_PIPE_PRIORITY changes the SPI_ARB_PRIORITY of the wave as follows: 0x2: CS_

[PATCH 19/26] drm/amdgpu: add parameter to allocate high priority contexts v7

Add a new context creation parameter to express a global context priority. Contexts allocated with AMDGPU_CTX_PRIORITY_HIGH will receive higher priority to schedule their work than AMDGPU_CTX_PRIORITY_NORMAL (default) contexts. v2: Instead of using flags, repurpose __pad v3: Swap enum values of _

[PATCH 23/26] drm/amdgpu: condense mqd programming sequence

The MQD structure matches the reg layout. Take advantage of this to simplify HQD programming. Note that the ACTIVE field still needs to be programmed last. Suggested-by: Felix Kuehling Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 44 +- drivers/gp

[PATCH] Add support for high priority scheduling in amdgpu v8

Includes fixes for Alex's comments on v7. Also includes a new patch to deal with an issue we discussed on #radeon: [PATCH 15/26] drm/amdgpu: avoid KIQ clashing with compute or KFD Patches missing review/ack: 10 14 15 18 20 21 23 24 ___ amd-gfx mailing

[PATCH 01/26] drm/amdgpu: refactor MQD/HQD initialization v2

The MQD programming sequence currently exists in 3 different places. Refactor it to absorb all the duplicates. The success path remains mostly identical except for a slightly different order in the non-kiq case. This shouldn't matter if the HQD is disabled. The error handling paths have been upda

[PATCH 04/26] drm/amdgpu: remove duplicate definition of cik_mqd

The gfxv7 contains a slightly different version of cik_mqd called bonaire_mqd. This can introduce subtle bugs if fixes are not applied in both places. Reviewed-by: Edward O'Callaghan Acked-by: Christian König Signed-off-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 135 +

[PATCH 16/26] drm/amdgpu: new queue policy, take first 2 queues of each pipe

Instead of taking the first pipe and giving the rest to kfd, take the first 2 queues of each pipe. Effectively, amdgpu and amdkfd own the same number of queues. But because the queues are spread over multiple pipes the hardware will be able to better handle concurrent compute workloads. amdgpu go

[PATCH 15/26] drm/amdgpu: avoid KIQ clashing with compute or KFD queues

Instead of picking an arbitrary queue for KIQ, search for one according to policy. The queue must be unused. Also report the KIQ as an unavailable resource to KFD. In testing I ran into KCQ initialization issues when using pipes 2/3 of MEC2 for the KIQ. Therefore the policy disallows grabbing one

[PATCH 26/26] drm/amdgpu: use LRU mapping policy for SDMA engines

Spreading the load across multiple SDMA engines can increase memory transfer performance. Signed-off-by: Andres Rodriguez Reviewed-by: Nicolai Hähnle --- drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/

RE: [PATCH 1/6] drm/amdgpu:add PSP block only load_type=PSP

Reviewed-by: Xiangliang Yu for the series. > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Monk Liu > Sent: Wednesday, April 05, 2017 5:11 PM > To: amd-gfx@lists.freedesktop.org > Cc: Liu, Monk > Subject: [PATCH 1/6] drm/amdgpu:add PSP

Re: [PATCH 1/2] drm/amdgpu/gfx8: enable cp/rlc ints after we disable clockgating

Ping? On Tue, Mar 14, 2017 at 3:32 PM, Alex Deucher wrote: > Even if we disable clockgating, we still need to make sure the > cp/rlc interrupts are enabled for powergating which might still > be enabled. > > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 ++ > 1 f

[PATCH] drm/amdgpu: move bios scratch reg restore for soc15

It needs to happen after asic_init as asic_init expects the registers to be in the default power up state. This should fix S3 on vega10. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/d

RE: [PATCH] drm/amd/display: fix NULL pointer dereference.

The issue seems already fixed by the following commit {{{ commit 52184bbf4773512d7c83fe21a0b4b4ec4be27caf Author: Jordan Lazare Date: Wed Apr 5 15:05:51 2017 -0400 drm/amd/display: fix nullptr on vega initialization Change-Id: Ic5062d9b9e7ad3406c8ed0acfe0e2f222ce17634 Signed-off-by

RE: [PATCH] drm/amd/display: fix NULL pointer dereference.

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of > Rex Zhu > Sent: Wednesday, April 05, 2017 15:55 > To: amd-gfx@lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH] drm/amd/display: fix NULL pointer dereference. > > on vega10, driver can

[PATCH 1/2] drm/amdgpu: Avoid using signed integer to store pointer value

Change-Id: I861ba3c85c182fdb6b89533029b3272191f331f5 Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git

[PATCH 2/2] drm/amdgpu: use uintptr_t instead of unsigned long to store pointer

Change-Id: Ic1cb6252482bcf9602c7700c3db075b9edf20e2a Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 3389f1b..a91aa

RE: [PATCH] drm/amdgpu: Fix compilation warning

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Alex Xie > Sent: Wednesday, April 05, 2017 5:31 PM > To: amd-gfx@lists.freedesktop.org > Cc: Xie, AlexBin > Subject: [PATCH] drm/amdgpu: Fix compilation warning > > Change-Id: Ia251723599024f

[PATCH] drm/amdgpu: Fix compilation warning

Change-Id: Ia251723599024fe258b018a53078d340af01207e Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- 4 files changed, 4 insertions(+)

Re: [PATCH 5/5] drm/amdgpu: allow concurrent VM flushes

On Wed, Apr 5, 2017 at 12:22 PM, Christian König wrote: > From: Christian König > > Enable concurrent VM flushes for Vega10. > > Signed-off-by: Christian König Acked-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 51 > +++--- > 1 file changed,

Re: [PATCH 4/5] drm/amdgpu: assign VM invalidation engine manually

On Wed, Apr 5, 2017 at 12:21 PM, Christian König wrote: > From: Christian König > > For Vega10 we have 18 VM invalidation engines for each VMHUB. > > Start to assign them manually to the rings. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/am

Re: [PATCH 1/5] drm/amdgpu: add VMHUB to ring association

On Wed, Apr 5, 2017 at 12:21 PM, Christian König wrote: > From: Christian König > > Add the info which ring belonging to which VMHUB. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Re: [PATCH 2/5] drm/amdgpu: separate VMID flush tracking per hub

On Wed, Apr 5, 2017 at 12:21 PM, Christian König wrote: > From: Christian König > > Rather inefficient, but this way we only need to flush the current hub. > > I wonder if we shouldn't make nails with heads and separate the VMID ranges > completely. > > Signed-off-by: Christian König > --- > d

Re: [PATCH 3/5] drm/amdgpu: invalidate only the currently needed VMHUB

On Wed, Apr 5, 2017 at 12:21 PM, Christian König wrote: > From: Christian König > > Drop invalidating both hubs from each engine. > > Signed-off-by: Christian König > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 36 +-- > drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 60 +

Re: [PATCH 10/10] drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()

On Wed, Apr 5, 2017 at 9:26 AM, Tom St Denis wrote: > Use new WREG32_FIELD15 macro > > Signed-off-by: Tom St Denis Series is: Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd

Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

On 05/04/17 11:34 AM, Andres Rodriguez wrote: Hey Tom, If it's the same as your old firmware you might be missing an extra step. I usually just run the kernel 'make install' as that usually take care of the distro specific quirks. I manually load the module but for sanity I did a make install

Re: [PATCH 01/10] drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()

On 05/04/17 10:15 AM, Christian König wrote: Am 05.04.2017 um 15:26 schrieb Tom St Denis: Introduce WREG32_FIELD15 macro for SOC15 architectures. Signed-off-by: Tom St Denis Reviewed-by: Christian König For the series or just 1/10? Tom --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3

[PATCH 3/5] drm/amdgpu: invalidate only the currently needed VMHUB

From: Christian König Drop invalidating both hubs from each engine. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 36 +-- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 60 +- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 111 +++

[PATCH 5/5] drm/amdgpu: allow concurrent VM flushes

From: Christian König Enable concurrent VM flushes for Vega10. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 51 +++--- 1 file changed, 28 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gp

[PATCH 1/5] drm/amdgpu: add VMHUB to ring association

From: Christian König Add the info which ring belonging to which VMHUB. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 + drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

[PATCH 2/5] drm/amdgpu: separate VMID flush tracking per hub

From: Christian König Rather inefficient, but this way we only need to flush the current hub. I wonder if we shouldn't make nails with heads and separate the VMID ranges completely. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 36 ---

[PATCH 4/5] drm/amdgpu: assign VM invalidation engine manually

From: Christian König For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c| 2 +- drivers/gpu/drm/amd/amdgpu/gmc_

Re: [PATCH] drm/amdgpu: set vm size and block size by individual gmc by default

On 04/05/2017 01:43 AM, Junwei Zhang wrote: > By default, the value is set by individual gmc. > if a specific value is input, it overrides the global value for all > > Signed-off-by: Junwei Zhang > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ > drivers/gpu/drm/amd/amdgpu/amdgpu_d

RE: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

Hey Tom, If it's the same as your old firmware you might be missing an extra step. I usually just run the kernel 'make install' as that usually take care of the distro specific quirks. Regards, Andres On Apr 5, 2017 9:56 AM, "Deucher, Alexander" wrote: > > -Original Message- > > From:

Re: [PATCH] radeonsi: add new polaris10 pci id

On 05.04.2017 15:46, Alex Deucher wrote: Cc: 13.0 17.0 Signed-off-by: Alex Deucher Reviewed-by: Nicolai Hähnle --- include/pci_ids/radeonsi_pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index f4139ea.

RE: [PATCH] iommu/amd: flush IOTLB for specific domains only

>-Original Message- >From: Daniel Drake [mailto:dr...@endlessm.com] >Sent: Thursday, March 30, 2017 7:15 PM >To: Nath, Arindam >Cc: j...@8bytes.org; Deucher, Alexander; Bridgman, John; amd- >g...@lists.freedesktop.org; io...@lists.linux-foundation.org; Suthikulpanit, >Suravee; Linux Upstrea

Re: [PATCH 01/10] drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()

Am 05.04.2017 um 15:26 schrieb Tom St Denis: Introduce WREG32_FIELD15 macro for SOC15 architectures. Signed-off-by: Tom St Denis Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 +++ 2 files changed, 6 i

RE: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

> -Original Message- > From: StDenis, Tom > Sent: Wednesday, April 05, 2017 9:14 AM > To: Alex Deucher > Cc: Andres Rodriguez; Deucher, Alexander; Tom St Denis; amd- > g...@lists.freedesktop.org > Subject: Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet" > > On 05/04/17 09:06 A

Re: [Mesa-dev] [PATCH] radeonsi: add new polaris10 pci id

Am 05.04.2017 um 15:46 schrieb Alex Deucher: Cc: 13.0 17.0 Signed-off-by: Alex Deucher Reviewed-by: Christian König --- include/pci_ids/radeonsi_pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index f

[PATCH] radeonsi: add new polaris10 pci id

Cc: 13.0 17.0 Signed-off-by: Alex Deucher --- include/pci_ids/radeonsi_pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index f4139ea..1058682 100644 --- a/include/pci_ids/radeonsi_pci_ids.h +++ b/include/pci_i

Re: [PATCH] drm/amdgpu: set vm size and block size by individual gmc by default

Am 05.04.2017 um 15:32 schrieb Alex Deucher: On Wed, Apr 5, 2017 at 5:01 AM, Christian König wrote: Am 05.04.2017 um 08:43 schrieb Junwei Zhang: By default, the value is set by individual gmc. if a specific value is input, it overrides the global value for all Signed-off-by: Junwei Zhang ---

Re: [PATCH] drm/amdgpu: set vm size and block size by individual gmc by default

On Wed, Apr 5, 2017 at 5:01 AM, Christian König wrote: > Am 05.04.2017 um 08:43 schrieb Junwei Zhang: >> >> By default, the value is set by individual gmc. >> if a specific value is input, it overrides the global value for all >> >> Signed-off-by: Junwei Zhang >> --- >> drivers/gpu/drm/amd/amdg

Re: [PATCH] drm/amdgpu: set vm size and block size by individual gmc by default

On Wed, Apr 5, 2017 at 2:43 AM, Junwei Zhang wrote: > By default, the value is set by individual gmc. > if a specific value is input, it overrides the global value for all > > Signed-off-by: Junwei Zhang > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ > drivers/gpu/drm/amd/amdgpu/amd

[PATCH 02/10] drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()

Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 3888743bc868..714fd0f228cf

[PATCH 04/10] drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()

Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 257d0d320f54..ee75e584ba75

[PATCH 08/10] drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()

Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 6bc9856e67a7..80700356474c 100644 --- a/d

[PATCH 10/10] drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()

Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 2dd32466919d..33df0dbe7052 100644 --- a/d

[PATCH 06/10] drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()

Use new WREG32_FIELD macro Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index ebd35af7f400..49527c0c2696 100644

[PATCH 01/10] drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()

Introduce WREG32_FIELD15 macro for SOC15 architectures. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 +++ 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/dr

[PATCH 03/10] drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()

Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++--- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 714fd0f228cf..257d0d320f54

[PATCH 07/10] drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 49527c0c2696..6bc9856e67a7 100644 --- a/drivers/gpu/drm/amd/a

[PATCH 05/10] drm/amd/amdgpu: Drop gfx_v9_0_print_status()

It's not used in gfx 6/7/8 so drop it from gfx 9 as well. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 175 +- 1 file changed, 1 insertion(+), 174 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/am

[PATCH 09/10] drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()

Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 80700356474c..2dd32466919d 100644 --

Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

On 05/04/17 09:06 AM, Alex Deucher wrote: On Wed, Apr 5, 2017 at 7:30 AM, Tom St Denis wrote: My firmware is fw.VCE == .feature==0 .firmware==0x34040300 fw.UVD == .feature==0 .firmware==0x015b0b00 fw.MC == .feature==0 .firmware==0x fw.ME == .feature==46

Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

On Wed, Apr 5, 2017 at 7:30 AM, Tom St Denis wrote: > My firmware is > > fw.VCE == .feature==0 .firmware==0x34040300 > fw.UVD == .feature==0 .firmware==0x015b0b00 > fw.MC == .feature==0 .firmware==0x > fw.ME == .feature==46 .firmware==0x00a1 > fw

Re: [PATCH 6/6] drm/amdgpu:invoke new implemented AI MB func

On Wed, Apr 5, 2017 at 5:11 AM, Monk Liu wrote: > Change-Id: I70035e7946e2f66804ae5c3bc846d148c633a057 > Signed-off-by: Monk Liu Series is: Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/soc15.c | 20 +++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > dif

Re: [PATCH] drm/amdgpu: fix over allocating of IRQ sources

On Wed, Apr 5, 2017 at 5:47 AM, Christian König wrote: > From: Christian König > > We need an array of pointers to IRQ sources, not an array of sources. > > Signed-off-by: Christian König > Reported-by: Dan Carpenter Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

Re: [PATCH] drm/amdgpu: fix 64bit division

On Wed, Apr 5, 2017 at 5:39 AM, Christian König wrote: > From: Christian König > > Added with "handle CPU access for split VRAM buffers". > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- > 1 file changed, 2 insertions(+),

Re: [PATCH] drm/amdgpu/smu9: update to latest driver interface

On Tue, Apr 4, 2017 at 11:58 PM, Evan Quan wrote: > Signed-off-by: Evan Quan > Signed-off-by: Alex Deucher Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h | 57 > -- > 1 file changed, 53 insertions(+), 4 deletions(-) > > diff --git a

Re: [RFC] Revert "drm/amdgpu/gfx8: Fix SET_RESOURCES packet"

My firmware is fw.VCE == .feature==0 .firmware==0x34040300 fw.UVD == .feature==0 .firmware==0x015b0b00 fw.MC == .feature==0 .firmware==0x fw.ME == .feature==46 .firmware==0x00a1 fw.PFP == .feature==46 .firmware==0x00eb fw.CE == .feat

[PATCH] drm/amdgpu: fix over allocating of IRQ sources

From: Christian König We need an array of pointers to IRQ sources, not an array of sources. Signed-off-by: Christian König Reported-by: Dan Carpenter --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdg

[PATCH] drm/amdgpu: fix 64bit division

From: Christian König Added with "handle CPU access for split VRAM buffers". Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/

[PATCH 4/6] drm/amdgpu:implement the reset MB func for vega10

they are lack in the bringup stage, we need them for GPU reset feature. Change-Id: I43165a223277f77a6e85d8c28749b690d7f8d51e Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 133 ++ drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 5 ++ 2 files changed

Re: [PATCH 1/6] drm/amdgpu:add PSP block only load_type=PSP

Am 05.04.2017 um 11:11 schrieb Monk Liu: SRIOV currently only can load ucode directly, and PSP block is not supported by VF temporarily. will remove this restrict and use PSP load all ucode even for SRIOV later Change-Id: I6df5c4088c7c72d01928d5af8bfe5520447619ba Signed-off-by: Monk Liu Revi

[PATCH 5/6] drm/amdgpu:timeout set to equal with VI

Change-Id: I9d170ff4893e982a955f19a91764cdfed619bc85 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h index a9815b6..9aefc44 100644 -

[PATCH 6/6] drm/amdgpu:invoke new implemented AI MB func

Change-Id: I70035e7946e2f66804ae5c3bc846d148c633a057 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 20 +++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 2955c0c..35db

[PATCH 3/6] drm/amdgpu:fix typo for mxgpu_ai

Change-Id: Ida034ff6e25046d06470d18fb0f853ba54a27602 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c index cfd5e54..740c0f8 1006

[PATCH 2/6] drm/amdgpu:no need to involv HDP in KIQ

1,KIQ won't touch VRAM so no need to involv HDP flush/invalidate at all. 2,According to CP hw designer KIQ better not use any PM4 package lead to wait behave. Change-Id: I32471c4cc113bfe1423a24747ebaa205ada0bba1 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 driv

[PATCH 1/6] drm/amdgpu:add PSP block only load_type=PSP

SRIOV currently only can load ucode directly, and PSP block is not supported by VF temporarily. will remove this restrict and use PSP load all ucode even for SRIOV later Change-Id: I6df5c4088c7c72d01928d5af8bfe5520447619ba Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-

Re: [PATCH] drm/amdgpu: set vm size and block size by individual gmc by default

Am 05.04.2017 um 08:43 schrieb Junwei Zhang: By default, the value is set by individual gmc. if a specific value is input, it overrides the global value for all Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 44

[PATCH] drm/amd/display: fix NULL pointer dereference.

on vega10, driver can run into a NULL-pointer dereference. Change-Id: I8e2de5343f804d6e736f620ff6d3d6e6488fb970 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm