each SE take 16 bit in cu_ao_mask. For ASICs with 4 SE, cu_ao_mask
has invalid value. so I change cu_ao_mask to cu_ao_bitmap[4][4] and increase
kmd driver version.
On Tue, Jun 20, 2017 at 11:49:23AM +0200, Christian König wrote:
> I'm not 100% sure what this is all about, but it clearly won't work
With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, a cooked hw
vblank counter which increments at leading edge of
vblank, and reliable page flip execution and completion
at leading edge of vblank, we should meet the requirements
for fast/immediate vblank i
With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, the emulated
"hw vblank counter" from vblank timestamping which
increments at leading edge of vblank, and reliable
page flip execution and completion at leading edge
of vblank, we should meet the requireme
This patch series sets dev->vblank_disable_immediate = true on
radeon/amdgpu-kms, nouveau-kms for nv50+, and vc4 for the real
kms driver (as opposed to dispmanx firmware backed kms).
All the drivers should be ready in theory, given their implementation,
for fast vblank disable/enable. In practice,
With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, a cooked hw
vblank counter which increments at leading edge of
vblank, and reliable page flip execution and completion
at leading edge of vblank, we should meet the requirements
for fast/immediate vblank i
With instantaneous high precision vblank timestamping
that updates at leading edge of vblank, the emulated
"hw vblank counter" from vblank timestamping, which
increments at leading edge of vblank, and reliable
page flip execution and completion at leading edge of
vblank, we should meet the requirem
Drivers no longer have any need for these callbacks, and there are no
users. Zap. Zap-zap-zzzap-p-pp-p.
Signed-off-by: Peter Rosin
---
include/drm/drm_fb_helper.h | 32
include/drm/drm_modeset_helper_vtables.h | 16
2 files changed,
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 5 ---
dr
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/ast/ast_drv.h | 1 -
drivers/gpu/
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 24 -
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/cirrus/cirrus_drv.h | 8
dr
Hi!
While trying to get CLUT support for the atmel_hlcdc driver, and
specifically for the emulated fbdev interface, I received some
push-back that my feeble in-driver attempts should be solved
by the core. This is my attempt to do it right.
Boris and Daniel, was this approximately what you had in
The driver stores lut values from the fbdev interface, and is able
to give them back, but does not appear to do anything with these
lut values. The generic fb helpers have replaced this function,
and may even have made the driver work for the C8 mode from the
fbdev interface. But that is untested.
The redundant fb helper .load_lut is no longer used, and can not
work right without also providing the fb helpers .gamma_set and
.gamma_get thus rendering the code in this driver suspect.
Just remove the dead code.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/stm/ltdc.c | 12
dri
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/nouveau/dispnv04/crtc.c | 26 ++
The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/radeon/atombios_crtc.c | 1 -
This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
totally obsolete.
I think the gamma_store can end up invalid on error. But the way I read
it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
this pesky legacy fbdev stuff be any better?
drm_fb_helper_save
The redundant fb helpers .gamma_set and .gamma_get are no longer
used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.
It is a bit strange that the fb helper .load_lut was not hooked
up, so this change may well mak
On 2017-06-20 03:03 PM, Ville Syrjälä wrote:
> On Tue, Jun 20, 2017 at 02:27:38PM -0400, Bhawanpreet Lakha wrote:
>> The test doesn't consider immutable properties
>>
>> Legacy Test: The test trys to set the property, but if the property
>> is immutable the test fails.
>>
On Tue, Jun 20, 2017 at 02:27:38PM -0400, Bhawanpreet Lakha wrote:
> The test doesn't consider immutable properties
>
> Legacy Test: The test trys to set the property, but if the property
> is immutable the test fails.
> Added conditions to check if the pr
The test doesn't consider immutable properties
Legacy Test: The test trys to set the property, but if the property
is immutable the test fails.
Added conditions to check if the property is immutable.
Atomic Test: The immutable properties are added and
In this commit we add a demo that reads the NB voltage
sensor on a Carrizo in shell script.
Signed-off-by: Tom St Denis
---
demo/update/carrizo.update | 4
demo/update/read_sensor.sh | 17 +
2 files changed, 21 insertions(+)
create mode 100644 demo/update/carrizo.update
c
Problem : While running IGT kms_atomic_transition test suite i encountered
a hang in drmHandleEvent immediately following an atomic_commit.
After dumping the atomic state I relized that in this case there was
not even one CRTC attached to the state and only disabled
planes. This probably due to a
Hi Dave,
A few fixes for 4.12:
- Add a new Polaris12 pci id
- A stack corruption fix
- Suspend/resume fix
- PX fix
- Display flickering fix
The following changes since commit 7119dbdf7c52042acb1b02f116fa3257e97659ea:
Merge tag 'drm-intel-fixes-2017-06-15' of
git://anongit.freedesktop.org/git/
Disable PX on these systems.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=101491
Signed-off-by: Alex Deucher
Cc: sta...@vger.kernel.org
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/radeon/rade
Fixes resume from suspend.
bug: https://bugzilla.kernel.org/show_bug.cgi?id=196121
Reported-by: Przemek
Signed-off-by: Alex Deucher
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/radeon/radeon_combios.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/radeon/radeon_com
On Tue, Jun 20, 2017 at 4:15 AM, Flora Cui wrote:
> Change-Id: I056d8af23340d46e5140bd10cc38dfb887cc78ab
> Signed-off-by: Flora Cui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 ++-
>
On Tue, Jun 20, 2017 at 1:46 PM, Christian König
wrote:
> Am 20.06.2017 um 12:34 schrieb Marek Olšák:
>>
>> BTW, I noticed the flush sequence in the kernel is wrong. The correct
>> flush sequence should be:
>>
>> 1) EVENT_WRITE_EOP - CACHE_FLUSH_AND_INV_TS - write a dword to memory,
>> but no fenc
On Tue, Jun 20, 2017 at 1:49 PM, Nicolai Hähnle wrote:
> On 20.06.2017 12:34, Marek Olšák wrote:
>>
>> BTW, I noticed the flush sequence in the kernel is wrong. The correct
>> flush sequence should be:
>>
>> 1) EVENT_WRITE_EOP - CACHE_FLUSH_AND_INV_TS - write a dword to memory,
>> but no fence/int
On 20.06.2017 12:34, Marek Olšák wrote:
BTW, I noticed the flush sequence in the kernel is wrong. The correct
flush sequence should be:
1) EVENT_WRITE_EOP - CACHE_FLUSH_AND_INV_TS - write a dword to memory,
but no fence/interrupt.
2) WAIT_REG_MEM on the dword to wait for idle before SURFACE_SYNC
Am 20.06.2017 um 12:34 schrieb Marek Olšák:
BTW, I noticed the flush sequence in the kernel is wrong. The correct
flush sequence should be:
1) EVENT_WRITE_EOP - CACHE_FLUSH_AND_INV_TS - write a dword to memory,
but no fence/interrupt.
2) WAIT_REG_MEM on the dword to wait for idle before SURFACE_
On Fri, Jun 16, 2017 at 03:51:27PM -0400, Leo wrote:
> Hello,
>
>
> I'm looking for ideas and suggestions on how to enable IGT to work on
> planes with multiple possible_crtcs during atomic commit. Amdgpu
> currently has features that rely on this, and planes with multiple
> crtc's are not being
BTW, I noticed the flush sequence in the kernel is wrong. The correct
flush sequence should be:
1) EVENT_WRITE_EOP - CACHE_FLUSH_AND_INV_TS - write a dword to memory,
but no fence/interrupt.
2) WAIT_REG_MEM on the dword to wait for idle before SURFACE_SYNC.
3) SURFACE_SYNC (TC, K$, I$)
4) Write CP
On Tue, Jun 20, 2017 at 11:49:23AM +0200, Christian König wrote:
> I'm not 100% sure what this is all about, but it clearly won't work like
> this.
>
> > diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
> > index df250de..dcbe22c 100644
> > --- a/include/drm/amdgpu_drm.h
> > +++ b/
I'm not 100% sure what this is all about, but it clearly won't work like
this.
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index df250de..dcbe22c 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -832,7 +832,7 @@ struct drm_amdgpu_info_device {
On Mon, Jun 19, 2017 at 04:11:35PM -0400, Andrey Grodzovsky wrote:
>
>
> On 06/19/2017 03:24 PM, Sean Paul wrote:
> > On Mon, Jun 19, 2017 at 11:35:28AM -0400, Harry Wentland wrote:
> > > On 2017-06-09 05:30 PM, Andrey Grodzovsky wrote:
> > > > Problem:
> > > > While running IGT kms_atomic_transi
Change-Id: Ie2a812716a6802f7a5a0bc09b1a8db824c5bf2ed
Signed-off-by: Flora Cui
---
amdgpu/amdgpu.h | 2 +-
amdgpu/amdgpu_gpu_info.c | 2 +-
include/drm/amdgpu_drm.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index b6779f9..34ca
This one and "drm/amdgpu/atom: fix ps allocation size for
EnableDispPowerGating" is Acked-by: Christian König
as well.
But you might want to ping somebody from the display side to ack as well.
Regards,
Christian.
Am 20.06.2017 um 04:40 schrieb zhoucm1:
Acked-by: Chunming Zhou
On 2017年06月2
Change-Id: I056d8af23340d46e5140bd10cc38dfb887cc78ab
Signed-off-by: Flora Cui
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 +++-
drivers/gpu/dr
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