Seems the change is more proper, but where do you find
mmHDP_READ_CACHE_INVALIDATE? Could you double check if Windows driver
has changed to use this?
I'm confusing it, since mmHDP_DEBUG0 implementation is from windows as
well.
I even don't find mmHDP_READ_CACHE_INVALIDATE in register spec.
R
What question ? please reply here
-Original Message-
From: Zhou, David(ChunMing)
Sent: 2017年9月19日 12:25
To: Liu, Monk ; Koenig, Christian ;
amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp
invalidate
Please answer my question as I r
previously a patch has typo error, correct it
Change-Id: I91bcefd7148b5db1c7d957c868e13a46ca40ef74
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/am
GPU reset will require all hw doing hw_init thus
ucode_init_bo will be invoked again, which lead to
memory leak
skip the fw_buf allocation during sriov gpu reset to avoid
memory leak.
Change-Id: I31131eda1bd45ea2f5bdc50c5da5fc5a9fe9027d
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amd
otherwise a gpu hang will make application couldn't be killed
under timedout=0 mode
v2:
Fix memoryleak job/job->s_fence issue
unlock mn
remove the ERROR msg after waiting being interrupted
Change-Id: I6051b5b3ae1188983f49325a2438c84a6c12374a
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgp
Please answer my question as I raised in another thread, otherwise I will give
a NAK on this!
Regards,
David Zhou
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Liu,
Monk
Sent: Tuesday, September 19, 2017 12:04 PM
To: Koenig, Christian ; amd
Christian,
> That sounds at least a bit better. But my question is why doesn't this work
> like it does on Tonga, e.g. correctly clean things up?
Tonga also suffer with this issue, just that we fixed it in the branch for CSP
customer and staging code usually behind our private branch ...
> Yea
Yeah, vnc1_0 and uvd_v7_0
Thanks
-Original Message-
From: Koenig, Christian
Sent: 2017年9月18日 19:39
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp
invalidate
Yeah, but Vega10 has UVD7 and in uvd_v7_0.c we have:
>
This is a small cleanup patch from my initial naive attempt at
extracting a TTM bo in amdgpu_sync_resv(). It didn't end up being useful
in that specific case, but I thought I'd send it out anyways in case you
find it useful.
Regards,
Andres
On 2017-09-18 11:17 PM, Andres Rodriguez wrote:
Si
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 9 +
3 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/a
On 2017-09-18 10:47 PM, zhoucm1 wrote:
On 2017年09月19日 07:16, Andres Rodriguez wrote:
Introduce a flag to signal that access to a BO will be synchronized
through an external mechanism.
Currently all buffers shared between contexts are subject to implicit
synchronization. However, this is onl
Got some feedback from Dave, and this patch doesn't handle dri3 use
cases correctly.
Regards,
Andres
On 2017-09-18 07:16 PM, Andres Rodriguez wrote:
Implicit sync kicks in when a buffer is used by two different amdgpu
contexts simultaneously. Jobs that use explicit synchronization
mechanisms
On Sat, Sep 16, 2017 at 8:20 AM, Christian König
wrote:
> Am 15.09.2017 um 22:06 schrieb Arnd Bergmann:
>>
>> The structure returned from r600_audio_status() is only partially
>> initialized, and older gcc versions (4.3 and 4.4) warn about this:
>>
>> drivers/gpu/drm/radeon/r600_hdmi.c: In functio
On 2017年09月19日 07:16, Andres Rodriguez wrote:
Introduce a flag to signal that access to a BO will be synchronized
through an external mechanism.
Currently all buffers shared between contexts are subject to implicit
synchronization. However, this is only required for protocols that
currently do
Reviewed-by: Roger He
Thanks
Roger(Hongbo.He)
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
Sent: Monday, September 18, 2017 8:34 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: use 2MB fragment size for GFX
pci_enable_device will set power state to D0. This patch is just work around
the issue, not address the root cause.
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex
Deucher
Sent: Tuesday, September 19, 2017 5:07 AM
To: Koenig, Christian
On 2017-09-15 05:14 PM, Andrew Morton wrote:
> On Mon, 28 Aug 2017 21:53:10 -0400 Felix Kuehling
> wrote:
>
>> This adds a statically sized closed hash table implementation with
>> low memory and CPU overhead. The API is inspired by kfifo.
>>
>> Storing, retrieving and deleting data does not invo
Thanks for the reviews. I rebased this on amd-staging-drm-next, retested
and submitted.
Christian, do you want to do some graphics PASID and VMFault work on top
of that? I think I'll be working on more KFD upstreaming this week and
maybe look at this subject again next week.
Regards,
Felix
On
Should add I was able to read/write system memory mapped by amdgpu with these
patches in place on my polaris10 device (with iommu enabled of course).
From: amd-gfx on behalf of Tom St Denis
Sent: Monday, September 18, 2017 13:33
To: amd-gfx@lists.freede
Introduce a flag to signal that access to a BO will be synchronized
through an external mechanism.
Currently all buffers shared between contexts are subject to implicit
synchronization. However, this is only required for protocols that
currently don't support an explicit synchronization mechanism
Implicit synchronization of jobs that access a shared bo is always enabled.
Currently this behaviour is required for DRI2/3 and PRIME use cases, where the
protocol doesn't provide a mechanism to shared an synchronization primitive
alongside the surface.
This patch series aims to provide a mechanis
For testing the kernel commit
---
include/drm/amdgpu_drm.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index da2ade6..c01abaa 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -89,6 +89,10 @@ extern "C" {
#defin
Implicit sync kicks in when a buffer is used by two different amdgpu
contexts simultaneously. Jobs that use explicit synchronization
mechanisms end up needlessly waiting to be scheduled for long periods
of time in order to achieve serialized execution.
This patch disables implicit synchronization
On Mon, Sep 18, 2017 at 5:31 AM, Christian König
wrote:
> Am 18.09.2017 um 08:11 schrieb Monk Liu:
>>
>> From: Horace Chen
>>
>> Kernel will set the PCI power state to UNKNOWN after unloading,
>> Since SRIOV has faked PCI config space so the UNKNOWN state
>> will be kept forever.
>>
>> In driver
Change-Id: I10fc5efbc303056c5c5c4dc4f4dd2c3186595a91
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 728c0d8..4e7fe07
When max_bytes is not 8 bytes aligned and bo size is larger than
max_bytes, the last 8 bytes in a ttm node may be left unchanged.
For example, on pre SDMA 4.0, max_bytes = 0x1f, and the bo size
is 0x20, the problem will happen.
In order to fix the problem, we store the max nums of PTEs/PDE
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Harry Wentland
> Sent: Friday, September 15, 2017 7:52 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Grodzovsky, Andrey; Wentland, Harry; Kuehling, Felix; Deucher,
> Alexander; Cheng, Tony; Koe
Signed-off-by: Tom St Denis
(v2): Use iova debugfs for read/write not address translation
---
src/lib/CMakeLists.txt | 1 -
src/lib/close_asic.c | 2 +-
src/lib/discover.c | 3 +
src/lib/free_maps.c| 44 --
src/lib/read_vram.c| 213 ---
Acked-by: John Bridgman
>-Original Message-
>From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Christian König
>Sent: Monday, September 18, 2017 8:34 AM
>To: amd-gfx@lists.freedesktop.org
>Subject: [PATCH] drm/amdgpu: use 2MB fragment size for GFX6,7 and 8
>
>From
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/ttm/Makefile | 2 +-
drivers/gpu/drm/ttm/ttm_debug.c | 74 -
drivers/gpu/drm/ttm/ttm_trace.h | 87 ---
drivers/gpu/drm/ttm/ttm_tracepoints.c | 45 --
4
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 36 +++--
1 file changed, 3 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 02ae32378e1c..b41d03226c26 100644
In this respin I add some changes per feedback and make the iova
entry have proper read/write methods which access pages mapped
by amdgpu. So there is no need for /dev/mem or /dev/fmem anymore
when reading system memory.
Patches 3/4 are unchanged and remove the TTM trace from amdgpu
and from TTM
Signed-off-by: Tom St Denis
(v2): add domains and avoid strcmp
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 54 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +--
2 files changed, 32 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_
Signed-off-by: Tom St Denis
(v2): Add domain to iova debugfs
(v3): Add true read/write methods to access system memory of pages
mapped to the device
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 104
1 file changed, 104 insertions(+)
diff --git a/drivers/g
Yes, the UMD does it.
Marek
On Mon, Sep 18, 2017 at 11:18 AM, Christian König
wrote:
> Am 18.09.2017 um 08:11 schrieb Monk Liu:
>>
>> Change-Id: I584572cfb9145ee1b8d11d69ba2989bd6acfd706
>> Signed-off-by: Monk Liu
>
>
> I could be wrong, but wasn't the consensus that this should be done by the
Though to be fair, we should probably consolidate the comment style so that
it's actually consistent through the KFD.
Kent
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Russell, Kent
Sent: Monday, September 18, 2017 11:28 AM
To: Kuehling,
Correct (coming from the guy who did all of the checkpatch cleanup for KFD).
For multi-line comments, /* Can be on its own, or on the same line as the
comment. */ has to be on its own.
https://github.com/torvalds/linux/blob/master/scripts/checkpatch.pl#L3042
Kent
-Original Message-
Fr
On 2017-09-17 08:03 AM, Oded Gabbay wrote:
> On Sat, Sep 16, 2017 at 2:43 AM, Felix Kuehling
> wrote:
>> From: Yong Zhao
>>
>> Avoid intermediate negative numbers when doing calculations with a mix
>> of signed and unsigned variables where implicit conversions can lead
>> to unexpected results.
On 2017-09-17 08:03 AM, Oded Gabbay wrote:
> On Sat, Sep 16, 2017 at 2:43 AM, Felix Kuehling
> wrote:
>> From: Yong Zhao
>>
>> Avoid intermediate negative numbers when doing calculations with a mix
>> of signed and unsigned variables where implicit conversions can lead
>> to unexpected results.
Am 18.09.2017 um 15:01 schrieb Tom St Denis:
On 18/09/17 08:48 AM, Christian König wrote:
Am 18.09.2017 um 14:35 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 53
++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h |
On 18/09/17 08:48 AM, Christian König wrote:
Am 18.09.2017 um 14:35 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 53
++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +--
2 files changed, 31 insertions(+), 26
On 18/09/17 08:52 AM, Christian König wrote:
Am 18.09.2017 um 14:35 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b
Am 18.09.2017 um 14:35 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7
Am 18.09.2017 um 14:35 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 53 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +--
2 files changed, 31 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/
Signed-off-by: Tom St Denis
---
src/lib/CMakeLists.txt | 1 -
src/lib/close_asic.c | 2 +-
src/lib/discover.c | 3 +
src/lib/free_maps.c| 44 -
src/lib/read_vram.c| 167 ++---
src/umr.h | 14 +
6 files
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/ttm/Makefile | 2 +-
drivers/gpu/drm/ttm/ttm_debug.c | 74 -
drivers/gpu/drm/ttm/ttm_trace.h | 87 ---
drivers/gpu/drm/ttm/ttm_tracepoints.c | 45 --
4
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7848ffa99eb4..b4c298925e2a 100644
--- a/drivers/gp
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 36 +++--
1 file changed, 3 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index b4c298925e2a..e0c37fe4d043 100644
These patches tidy up the amdgpu_ttm debugfs creation, add
an iova_to_phys interface and then remove the TTM trace from both
amdgpu and drm/ttm.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gf
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 53 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +--
2 files changed, 31 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/
From: Christian König
Use 2MB fragment size by default for older hardware generations as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
3 files changed, 3 inserti
Am 18.09.2017 um 12:12 schrieb Liu, Monk:
Christian,
Let's discuss this patch and the one follows which skip the KIQ MQD free to
avoid SAVE_FAIL issue.
For skipping KIQ MQD deallocation patch, I think I will drop it and use a new
way:
We allocate KIQ MQD in VRAM domain and this BO can be saf
Yeah, but Vega10 has UVD7 and in uvd_v7_0.c we have:
static void uvd_v7_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
{
amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(HDP, 0,
mmHDP_DEBUG0), 0));
amdgpu_ring_write(ring, 1);
}
That should probably be fixed as well.
Re
Am 18.09.2017 um 12:47 schrieb Liu, Monk:
I didn't get your point... how could bo_create_kernel solve my issue ?
It doesn't solve the underlying issue, you just need less code for your
workaround.
With bo_create_kernel you can do create/pin/kmap in just one function call.
The thing here i
Only vega10 has this register
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: 2017年9月18日 17:20
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp
invalidate
Am 18.09.2017 um 08:
I didn't get your point... how could bo_create_kernel solve my issue ?
The thing here is during gpu reset we invoke hw_init for every hw component,
and by design hw_init shouldn't doing anything software related, thus the BO
allocating in hw_init is wrong,
Even switch to bo_create_kernel won't
Christian,
Let's discuss this patch and the one follows which skip the KIQ MQD free to
avoid SAVE_FAIL issue.
For skipping KIQ MQD deallocation patch, I think I will drop it and use a new
way:
We allocate KIQ MQD in VRAM domain and this BO can be safely freed after driver
unloaded, because af
Am 18.09.2017 um 08:11 schrieb Monk Liu:
From: Horace Chen
Kernel will set the PCI power state to UNKNOWN after unloading,
Since SRIOV has faked PCI config space so the UNKNOWN state
will be kept forever.
In driver reload if the power state is UNKNOWN then enabling msi
will fail.
forcely set
Am 18.09.2017 um 08:11 schrieb Monk Liu:
[SWDEV-126631] - fix hypervisor save_vf fail that occured
after driver removed:
1. Because the KIQ and KCQ were not ummapped, save_vf will fail if driver freed
mqd of KIQ and KCQ.
2. KIQ can't be unmapped since RLCV always need it, the bo_free on KIQ shou
Am 18.09.2017 um 08:12 schrieb Monk Liu:
fix missing finish uvd enc_ring and wrongly finish uvd ring
Change-Id: Ib74237ca5adcb3b128c9b751fced0b7db7b09e86
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
di
Am 18.09.2017 um 08:11 schrieb Monk Liu:
bo_free on csa is too late to put in amdgpu_fini because that
time ttm is already finished,
Move it earlier to avoid the page fault.
Change-Id: Id9c3f6aa8720cabbc9936ce21d8cf98af6e23bee
Signed-off-by: Monk Liu
Signed-off-by: Horace Chen
Reviewed-by: C
Am 18.09.2017 um 08:12 schrieb Monk Liu:
From: Horace Chen
Because there may have multiple FLR waiting for done, the waiting
time of events may be long, add the time to 12s to reduce timeout
failure.
Change-Id: I6b33170ba7dedf781b99ba6095127efce403af81
Signed-off-by: Horace Chen
Acked-by: C
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: I61dc02ea6a450f9acfa3bae07aa20244261f5369
Signed-off-by: Monk Liu
Reviewed-by: Christian König
Please scan the code once more, we most likely have used mmHDP_DEBUG0
for this at even more places.
Christian.
---
drivers/gpu/drm/amd/amd
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: I584572cfb9145ee1b8d11d69ba2989bd6acfd706
Signed-off-by: Monk Liu
I could be wrong, but wasn't the consensus that this should be done by
the UMD?
Marek, please comment.
Christian.
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: I635271ba4c89189017daa302a7fe5cd65c3eef06
Signed-off-by: Monk Liu
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/a
Am 18.09.2017 um 08:11 schrieb Monk Liu:
FRAME_CONTROL(begin) is needed for vega10 due to ucode logic change,
it can fix some CTS random fail under gfx preemption enabled mode.
Change-Id: I0442337f6cde13ed2a33f033badcb522e0f35e2d
Signed-off-by: Monk Liu
Acked-by: Christian König
---
driv
Am 18.09.2017 um 08:11 schrieb Monk Liu:
only with this way we can debug the VMC page fault issue
Change-Id: Ifc8373c3c3c40d54ae94dedf1be74d6314faeb10
Signed-off-by: Monk Liu
Please make this behavior depend on the vm_fault_stop module parameter
just like it is handled on older generations.
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: I3a43901f5757b9fab629824a74ad9a4770a47b38
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/d
Am 18.09.2017 um 08:11 schrieb Monk Liu:
doing gpu reset will rerun all hw_init and thus
ucode_init_bo is invoked again, so we need to skip
the fw_buf allocation during sriov gpu reset to avoid
memory leak.
Change-Id: I31131eda1bd45ea2f5bdc50c5da5fc5a9fe9027d
Signed-off-by: Monk Liu
---
drive
Am 18.09.2017 um 08:11 schrieb Monk Liu:
otherwise a gpu hang will make application couldn't be killed
Change-Id: I6051b5b3ae1188983f49325a2438c84a6c12374a
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 12 ++--
NAK, Tonga has no this problem, please keep the patch into internal branch for
temporally.
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Monk
Liu
Sent: Monday, September 18, 2017 2:12 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Horace ;
Am 18.09.2017 um 08:11 schrieb Monk Liu:
At least for SRIOV we found reload PSP fw during
gpu reset cause PSP hang.
Change-Id: I5f273187a10bb8571b77651dfba7656ce0429af0
Signed-off-by: Monk Liu
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 15 +--
1
Am 18.09.2017 um 08:11 schrieb Monk Liu:
currently in_reset is only used in sriov gpu reset, and it
will be used for other non-gfx hw component later, like
PSP, so move it from gfx to adev and rename to in_sriov_reset
make more sense.
Change-Id: Ibb8546f6e4635a1cca740e57f6244f158c70a1e6
Signed-o
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: I4deb65675d2531236b2f4e2bc6f015c657546464
Signed-off-by: Monk Liu
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Am 18.09.2017 um 08:11 schrieb Monk Liu:
Change-Id: Ifc6942ed0221f3134bfba4d66fde743484191da3
Signed-off-by: Monk Liu
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgp
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