[PATCH] drm/amd/powerplay: move set_clockgating_by_smu to pp func table

2017-09-25 Thread Rex Zhu
Change-Id: I08f7eb9af1ddf4fac199d712f41b9afee94b9acd Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 4 +++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 23 +++- drivers/gpu/drm/amd/amdgpu/vi.c | 22 +++- drivers/gpu/drm/amd

答复: [PATCH] drm/amd/powerplay: fix copy error in powerplay

2017-09-25 Thread Qu, Jim
Reviewed-by: Jim Qu Thanks JimQu 发件人: amd-gfx 代表 Rex Zhu 发送时间: 2017年9月26日 10:35 收件人: amd-gfx@lists.freedesktop.org 抄送: Zhu, Rex 主题: [PATCH] drm/amd/powerplay: fix copy error in powerplay cause amdgpu fail to initialize on CZ/ST Change-Id: Ica0527e997

[PATCH] drm/amd/powerplay: refine code in amd_powerplay.c

2017-09-25 Thread Rex Zhu
delete flag of PP_DPM_DISABLED pp_en in pp_handle is enough Change-Id: Iad7d48690e91e736da0f76b3a11a87d2cb519b05 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 9 -- drivers/gpu/drm/amd/powerplay/amd_po

RE: powerplay change breaks driver

2017-09-25 Thread Zhu, Rex
Thanks Tom. Have found the root cause. An copy error when initialize smu function table. case AMDGPU_FAMILY_CZ: - hwmgr->smumgr_funcs = &ci_smu_funcs; + hwmgr->smumgr_funcs = &cz_smu_funcs; Best Regards Rex -Original Message- From: amd-gfx [mailto:amd-gfx-bou

[PATCH] drm/amd/powerplay: fix copy error in powerplay

2017-09-25 Thread Rex Zhu
cause amdgpu fail to initialize on CZ/ST Change-Id: Ica0527e9979268f609dbbe69fb8c7ecd97d26875 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/

Re: Status of ROCm runtime upstream kernels

2017-09-25 Thread Felix Kuehling
On 2017-09-25 04:26 PM, Tom Stellard wrote: > On 09/25/2017 01:11 PM, Felix Kuehling wrote: >> Yes, it's only on CZ and KV for now. >> > And which kernel version do I need? Current amd-staging-drm-next should work. The necessary patches are making their way into Linux 4.14. Regards,   Felix > >

Re: Status of ROCm runtime upstream kernels

2017-09-25 Thread Tom Stellard
On 09/25/2017 01:11 PM, Felix Kuehling wrote: > Yes, it's only on CZ and KV for now. > And which kernel version do I need? -Tom > You also need a custom Thunk from here because the ioctl ABI is getting > changed in the upstreaming process: > https://github.com/RadeonOpenCompute/ROCT-Thunk-Inter

Re: Status of ROCm runtime upstream kernels

2017-09-25 Thread Felix Kuehling
Yes, it's only on CZ and KV for now. You also need a custom Thunk from here because the ioctl ABI is getting changed in the upstreaming process: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/tree/fxkamd/drm-next-wip KV support in the user mode package is currently lacking. I was able

Status of ROCm runtime upstream kernels

2017-09-25 Thread Tom Stellard
Hi Felix, In a mailing list post[1], you mentioned that you had the ROCm runtime working on an upstream kernel, which kernel version was this and was it only Kaveri and Carrizo? Thanks, Tom [1] https://lists.freedesktop.org/archives/amd-gfx/2017-September/012951.html ___

Re: powerplay change breaks driver

2017-09-25 Thread Tom St Denis
To narrow things down it's likely something in the CZ code paths as it still crashes with the Polaris10 removed. Tom On 25/09/17 01:55 PM, Tom St Denis wrote: This change commit f96306921d5e346ebc82c7c51ae6e0b736e5b425 Author: Rex Zhu Date:   Wed Sep 20 14:44:55 2017 +0800     drm/amd/pow

powerplay change breaks driver

2017-09-25 Thread Tom St Denis
This change commit f96306921d5e346ebc82c7c51ae6e0b736e5b425 Author: Rex Zhu Date: Wed Sep 20 14:44:55 2017 +0800 drm/amd/powerplay: refine powerplay code. delete struct smumgr, put smu backend function table in struct hwmgr Change-Id: I7b73ef062b147b4e7199105a3c101f6c8038cc5

[PATCH] dmr/amd/powerplay: Fix typo in ci_populate_fuzzy_fan()

2017-09-25 Thread Tom St Denis
Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c index 7709f620347a..a72ae7ed03cf 100644 --- a/drivers/

RE: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO v2

2017-09-25 Thread Deucher, Alexander
> -Original Message- > From: Pixel Ding [mailto:pixel.d...@amd.com] > Sent: Monday, September 25, 2017 2:38 AM > To: amd-gfx@lists.freedesktop.org; Ding, Pixel; Min, Frank; Liu, Monk; > Deucher, Alexander > Subject: [PATCH] drm/amdgpu: right shift 2 bits for > SDMA_GFX_RB_WPTR_POLL_ADDR_LO

Re: [PATCH 07/10] drm/amdgpu: create powerplay by cgs interface

2017-09-25 Thread Tom St Denis
Nevermind it applies fine after the series you pushed a bit ago today. Cheers, Tom On 25/09/17 12:13 PM, Tom St Denis wrote: This doesn't apply on top of drm-next I don't know why since "git status" doesn't report any conflicting files... Tom On 25/09/17 09:49 AM, Rex Zhu wrote: Signed-off-

Re: [PATCH 07/10] drm/amdgpu: create powerplay by cgs interface

2017-09-25 Thread Tom St Denis
This doesn't apply on top of drm-next I don't know why since "git status" doesn't report any conflicting files... Tom On 25/09/17 09:49 AM, Rex Zhu wrote: Signed-off-by: Rex Zhu Change-Id: I3b2fa446fd7e233042794fe3d2fb5cbce903fe2d --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 30

Re: [PATCH] drm/amdgpu: protect chash related code under macro

2017-09-25 Thread Felix Kuehling
It's part of the same patch that starts using the function: commit c18d4ac89dc8ad1622c3abc7f4ff31b563c0196b Author: Felix Kuehling Date: Sat Aug 26 02:43:06 2017 -0400 drm/amdgpu: Track pending retry faults in IH and VM (v2) IH tracks pending retry faults in a hash table for fast

RE: [PATCH 2/2] drm/amdgpu: Add ability to determine and report if board supports ECC.

2017-09-25 Thread Deucher, Alexander
> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of David Panariti > Sent: Friday, September 22, 2017 1:50 PM > To: amd-gfx@lists.freedesktop.org > Cc: Panariti, David > Subject: [PATCH 2/2] drm/amdgpu: Add ability to determine and report if >

RE: [PATCH 1/2] drm/amdgpu: New header for fields needed to determine state of ECC.

2017-09-25 Thread Deucher, Alexander
> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of David Panariti > Sent: Friday, September 22, 2017 1:50 PM > To: amd-gfx@lists.freedesktop.org > Cc: Panariti, David > Subject: [PATCH 1/2] drm/amdgpu: New header for fields needed to > determi

[PATCH 10/10] drm/amd/powerplay: export new interfaces in amd_pm_funcs

2017-09-25 Thread Rex Zhu
Change-Id: If13500f76da6e42f50d40fc794fc5e1e5dc143bf Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/include/amd_shared.h | 38 +++- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/am

[PATCH 07/10] drm/amdgpu: create powerplay by cgs interface

2017-09-25 Thread Rex Zhu
Signed-off-by: Rex Zhu Change-Id: I3b2fa446fd7e233042794fe3d2fb5cbce903fe2d --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 30 + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 81 +-- drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 5 -- 3 files cha

[PATCH 01/10] drm/amdgpu: move common pm sysfs code to amdgpu_device.c

2017-09-25 Thread Rex Zhu
Change-Id: I4ad2c914081dd71b10a89f650fea87f9cbc9c859 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 6 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 6 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 7 +-- drivers/gpu/drm/amd/amdgpu/ci_dpm.c

[PATCH 09/10] drm/amdgpu: add comments in struct amd_pm_funcs define

2017-09-25 Thread Rex Zhu
Change-Id: Ie54071d41fc8d67cb35a89cd500514dc067a9192 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/include/amd_shared.h | 51 ++-- 1 file changed, 29 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/a

[PATCH 08/10] drm/amd/powerplay: change dmesg log level in powerplay

2017-09-25 Thread Rex Zhu
Use pr_debug to prevent spamming unimportant dmesg. Change-Id: I18b4df61d9d36f081df8ad3ed047eb195da70e7c Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b

[PATCH 06/10] drm/amdgpu: add cgs interface to register pp handle

2017-09-25 Thread Rex Zhu
Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 23 +++ drivers/gpu/drm/amd/include/cgs_common.h | 8 2 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c index 193325

[PATCH 05/10] drm/amdgpu: delete pp_enable in adev

2017-09-25 Thread Rex Zhu
amdgpu not care powerplay or dpm is enabled. just check ip functions and pp functions Change-Id: I972700055e2ee4655ac1b24fe7ff2dacdaf49979 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 77 -

[PATCH 04/10] drm/amdgpu: delete dead code about fw load check

2017-09-25 Thread Rex Zhu
Change-Id: I1df6ff230a4fc95afdb319f37f24dd1cae82eaaa Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 60 -- drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 20 +++- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 21 +++- 3 files changed, 23 i

[PATCH 03/10] drm/amd/powerplay: fix memory leak in powerplay

2017-09-25 Thread Rex Zhu
cgs device not free. Change-Id: I89435944a1205cb1a8da93469db3a3633a54125e Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 9 ++--- drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gp

[PATCH 02/10] drm/amdgpu: move amdgpu_ucode_init_bo to amdgpu_device.c

2017-09-25 Thread Rex Zhu
Change-Id: I8f1016d9d77437b80fce97dadaae52f49c2c901e Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 8 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 - 3 files changed, 8 insertions(+), 14 de

Re: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO v2

2017-09-25 Thread Ding, Pixel
Hi Alex, We found that this statement introduces issue. In sdma_v3_0_ring_set_wptr(): WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); When changing it to normal assignment operation, issue is gone, also if adding some dumps here to make it slower, issue is gone… Any idea? Is there some reas

[PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO

2017-09-25 Thread Pixel Ding
Both Tonga and Vega register SPECs indicate that this registers only use 31:2 bits in DW. SRIOV test case immediately fails withtout this shift. Signed-off-by: Pixel Ding --- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +- 2 files changed, 2 insertio

RE: [PATCH] drm/amdgpu: protect chash related code under macro

2017-09-25 Thread S, Shirish
Ok. Is there a link to the patch? Regards, Shirish S -Original Message- From: Kuehling, Felix Sent: Friday, September 22, 2017 7:36 PM To: S, Shirish ; amd-gfx@lists.freedesktop.org; Deucher, Alexander Subject: Re: [PATCH] drm/amdgpu: protect chash related code under macro This sho

Re: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO

2017-09-25 Thread Ding, Pixel
Hi Monk, The world switch gets immediately fail. According to Xiangliang’s comment, I think 17.50 also has this issue. Other G branch uses original patch from Frank, that doesn’t have this issue. Please confirm this. Also refer to http://adcweb02.amd.com/orlvalid/regspec/web_regspec/vega11/reg

Re: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO v2

2017-09-25 Thread Ding, Pixel
Yes, it seems not related to the seen issue. The previous change simplifies the shift operations while the logic is same. Please ignore. — Sincerely Yours, Pixel On 25/09/2017, 3:08 PM, "Christian König" wrote: >NAK, that doesn't looks correct to me. > >> Both Tonga and Vega register S

RE: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO

2017-09-25 Thread Liu, Monk
See the code in drm-next: /* setup the wptr shadow polling */ wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); WREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), lower_32_bits(wptr_gpu_addr));

Re: radeon_get_bios: BUG: unable to handle kernel paging request

2017-09-25 Thread Christian König
Hi Thomas, please open up a bug report on http://bugs.freedesktop.org/. If this worked on an older kernel version bisecting would be a good idea as well. Regards, Christian. Am 24.09.2017 um 12:26 schrieb Thomas Meyer: Hi, while trying to resurrect my old Macbook as an 32 bit kernel testin

Re: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO v2

2017-09-25 Thread Ding, Pixel
+Xiangliang, — Sincerely Yours, Pixel On 25/09/2017, 2:38 PM, "Pixel Ding" wrote: >Both Tonga and Vega register SPECs indicate that this registers only >use 31:2 bits in DW. SRIOV test case immediately fails withtout this >shift. > >v2: write to ADDR field > >Signed-off-by: Pixel Ding >

Re: [PATCH] drm/amdgpu: right shift 2 bits for SDMA_GFX_RB_WPTR_POLL_ADDR_LO v2

2017-09-25 Thread Christian König
NAK, that doesn't looks correct to me. Both Tonga and Vega register SPECs indicate that this registers only use 31:2 bits in DW. This means that the value must be DW aligned and NOT that it needs to be shifted by 2! Regards, Christian. Am 25.09.2017 um 08:38 schrieb Pixel Ding: Both Tonga a