Am 21.02.19 um 22:02 schrieb Thomas Hellstrom:
> Hi,
>
> On Thu, 2019-02-21 at 20:24 +, Kuehling, Felix wrote:
>> On 2019-02-21 12:34 p.m., Thomas Hellstrom wrote:
>>> On Thu, 2019-02-21 at 16:57 +, Kuehling, Felix wrote:
On 2019-02-21 2:59 a.m., Koenig, Christian wrote:
> On x86
Series is:
Acked-by: Alex Deucher
On Thu, Feb 21, 2019 at 10:09 PM Evan Quan wrote:
>
> Instead of the hard-coded ones from VBIOS.
>
> Change-Id: Ic317e292fbea89f01badfcfe240134aabcbe84ec
> Signed-off-by: Evan Quan
> ---
> .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 46 ---
Good Morning,
On Thursday, 21 February 2019 22:00:40 CET Li, Sun peng (Leo) wrote:
>
> On 2019-02-20 12:24 a.m., Mathias Fröhlich wrote:
> > Hi,
> >
> > ping?
> > ... to the dc folks?
> >
> > best
> > Mathias
>
> Hi Mathias,
>
> Sorry for the wait, change looks good to me.
>
> Reviewed-by:
On 2/9/19 1:52 AM, Mario Kleiner wrote:
> In VRR mode, keep track of the vblank count of the last
> completed pageflip in amdgpu_crtc->last_flip_vblank, as
> recorded in the pageflip completion handler after each
> completed flip.
>
> Use that count to prevent mmio programming a new pageflip
>
Instead of the hard-coded ones from VBIOS.
Change-Id: Ic317e292fbea89f01badfcfe240134aabcbe84ec
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 46 ---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.h| 4 ++
2 files changed, 34 insertions(+), 16
As these settings got reset during above phm_apply_clock_adjust_rules.
Change-Id: Ie3296a87ef1d1b02e2195cdf69bdfb45c0b9f453
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
Set the default fclk as what we got from VBIOS.
Change-Id: If1c54dc854a5ebe0cdb439bad8fefc26e80f0511
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 3 +++
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h | 1 +
Set the soft/hard max settings as max possible to
not violate the OD settings.
Change-Id: Ia87eb13b914cb85aac64525a30ef7af57fddf912
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 32 +--
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.h| 2 ++
2 files
This can fix possible screen freeze on high resolution displays.
Change-Id: Ia1f1708638a85d57789a61ba0937c5221bd28c31
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 38 ++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git
For UCLK_FMAX OD feature, SMU overwrites the highest UCLK DPM level freq.
Therefore it can only take values that are greater than the second highest
DPM level freq.
Change-Id: I81eec21d8212ee08425c6462376b82690f4f8038
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.c|
There will be some needs to retrieve clock information from other
sysplls also except default 0.
Change-Id: I312f11679b5c146f7315d096fab1d051ce6ecc6c
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/ppatomfwctrl.c| 27 ++-
.../drm/amd/powerplay/hwmgr/ppatomfwctrl.h
As these are already set during apply_clocks_adjust_rules.
Change-Id: I7eb845597ebe0527bf853dffae7e578434651091
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 24 ---
1 file changed, 24 deletions(-)
diff --git
Hi Alex,
Please help, thanks.
Best wishes
Emily Deng
>-Original Message-
>From: Alex Deucher
>Sent: Friday, February 22, 2019 12:13 AM
>To: Deng, Emily ; Maling list - DRI developers de...@lists.freedesktop.org>
>Cc: amd-gfx list
>Subject: Re: [PATCH libdrm] libdrm: Fix issue
There were two set_pte_pde function pointers in amdgpu_gmc_funcs and
amdgpu_vm_pte_funcs respectively. Because they are so similar, sometimes
it is confusing. So Rename the one in amdgpu_vm_pte_funcs to
write_pte_pde.
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6
Hi Dave, Daniel,
Fixes for 5.1:
amdgpu:
- Fix missing fw declaration after dropping old CI DPM code
- Fix debugfs access to registers beyond the MMIO bar size
- Fix context priority handling
- Add missing license on some new files
- Various cleanups and bug fixes
radeon:
- Fix missing break in
Hi,
On Thu, 2019-02-21 at 20:24 +, Kuehling, Felix wrote:
> On 2019-02-21 12:34 p.m., Thomas Hellstrom wrote:
> > On Thu, 2019-02-21 at 16:57 +, Kuehling, Felix wrote:
> > > On 2019-02-21 2:59 a.m., Koenig, Christian wrote:
> > > > On x86 with HIGHMEM there is no dma32 zone. Why do we
On 2019-02-20 12:24 a.m., Mathias Fröhlich wrote:
> Hi,
>
> ping?
> ... to the dc folks?
>
> best
> Mathias
Hi Mathias,
Sorry for the wait, change looks good to me.
Reviewed-by: Leo Li
...and merged.
Thanks for cleaning this up.
Leo
>
> On Wednesday, 13 February 2019 21:38:03 CET Alex
On 2019-02-21 12:34 p.m., Thomas Hellstrom wrote:
> On Thu, 2019-02-21 at 16:57 +, Kuehling, Felix wrote:
>> On 2019-02-21 2:59 a.m., Koenig, Christian wrote:
>>> On x86 with HIGHMEM there is no dma32 zone. Why do we need one on
> x86_64? Can we make x86_64 more like HIGHMEM instead?
The DP 1.4 spec defines the SDP header and SDP contents for
a Picture Parameter Set (PPS) that must be sent in advance
of DSC transmission to define the encoding characteristics.
This was done in one struct, drm_dsc_pps_infoframe, which
conatined the SDP header and PPS. Because the PPS is
a
drm_dsc could use some work so that drm drivers other than
i915 can make use of it their own DSC implementations
Move rc compute, a function that forms part of the DSC spec,
into drm. Update it to DSC 1.2. Also split the PPS packing and
SDP header init functions, to allow for drivers with
their
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 135
Native 420 and 422 transfer modes are new in DSC1.2
In these modes, each two pixels of a slice are treated as one
pixel, so the slice width is half as large (round down) for
the purposes of calucating the groups per line and chunk size
in bytes
In native 422 mode, each pixel has four components,
On 2019-02-21 12:48 p.m., Yang, Philip wrote:
> Only select HMM_MIRROR will get kernel config dependency warnings
> if CONFIG_HMM is missing in the config. Add depends on HMM will
> solve the issue.
>
> Add conditional compilation to fix compilation errors if HMM_MIRROR
> is not enabled as HMM
Only select HMM_MIRROR will get kernel config dependency warnings
if CONFIG_HMM is missing in the config. Add depends on HMM will
solve the issue.
Add conditional compilation to fix compilation errors if HMM_MIRROR
is not enabled as HMM config is not enabled.
Change-Id:
Thanks Jerome for the the correct HMM config option, only select
HMM_MIRROR is not good enough because CONFIG_HMM option maybe missing,
add depends on ARCH_HAS_HMM will solve the issue.
I will submit new patch to fix the compilation error if HMM_MIRROR
config is missing and the HMM config
On Thu, 2019-02-21 at 16:57 +, Kuehling, Felix wrote:
> On 2019-02-21 2:59 a.m., Koenig, Christian wrote:
> > On x86 with HIGHMEM there is no dma32 zone. Why do we need one on
> > > > x86_64? Can we make x86_64 more like HIGHMEM instead?
> > > >
> > > > Regards,
> > > > Felix
> > > >
>
On 2019-02-21 2:59 a.m., Koenig, Christian wrote:
> On x86 with HIGHMEM there is no dma32 zone. Why do we need one on
>>> x86_64? Can we make x86_64 more like HIGHMEM instead?
>>>
>>> Regards,
>>> Felix
>>>
>> IIRC with x86, the kernel zone is always smaller than any dma32 zone,
>> so we'd
On Thu, Feb 14, 2019 at 2:53 AM Emily Deng wrote:
>
> For multiple GPUs which has the same BDF, but has different domain ID,
> the drmOpenByBusid will return the wrong fd when startx.
>
> The reproduce sequence as below:
> 1. Call drmOpenByBusid to open Card0, then will return the right fd0, and
Den 08.02.2019 15.01, skrev Noralf Trønnes:
> This series makes drm_dev_unplug() compatible with the upcoming
> devm_drm_dev_init(), fixes a double drm_dev_unregister() situation and
> simplifies the drm_device ref handling wrt to the last fd closed after
> unregister.
>
> The first version of
> -Original Message-
> From: Michael D Labriola [mailto:michael.d.labri...@gmail.com]
> Sent: 19 February 2019 23:08
> To: dri-de...@lists.freedesktop.org; Alex Deucher
> ; Christian Koenig ;
> Chunming Zhou ; amd-gfx@lists.freedesktop.org; Monk
> Liu
> Cc: Juergen Gross ; Christoph
HI Alex,
I will check with your patch. if it doesn't work i will raise bug .
Regards,
Sk shahul.
On Thu, Feb 21, 2019 at 12:01 PM Alex Deucher wrote:
> On Wed, Feb 20, 2019 at 11:56 PM shahul hameed
> wrote:
> >
> > Hi All,
> >
> > I did below exoeriments:
> >
> > -> S2idle is working in
Am 21.02.19 um 04:09 schrieb Sasha Levin:
On Wed, Feb 20, 2019 at 03:16:06PM +0100, Christian König wrote:
The changes to fix those are two invasive for backporting.
Just disable the feature in 4.20 and 5.0.
Signed-off-by: Christian König
Cc: [4.20+]
For the sake of having it in the
32 matches
Mail list logo