[PATCH 48/49] drm/amd/display: Enable MPO with pre-blend color processing (RGB)

From: Michael Strauss [Why] DCN10 performs color processing before MPC combination, causes color shift in RGB colorspaces when positive brightness offset is applied However, YCbCr is still unfixed and remains disabled [How] Add layerIndex to dc_plane_state and dc_plane_info structs Re-enable

[PATCH 37/49] drm/amd/display: Register VUPDATE_NO_LOCK interrupts for DCN2

From: Nicholas Kazlauskas [Why] These are needed to send back DRM vblank events in the case where VRR is on. Without the interrupt enabled we're deferring the events into the vblank queue and userspace is left waiting forever to get back the events they need. Found using igt@kms_vrr - the test

[PATCH 34/49] drm/amd/display: Check if set_blank_data_double_buffer exists before call

From: Vitaly Prosyak Not all ASIC types have this function implemented - check before calling. Signed-off-by: Vitaly Prosyak Reviewed-by: Julian Parkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[PATCH 36/49] drm/amd/display: wake up ogam mem pwr before programming ocsc

From: Charlene Liu [Description] OGAM_MEM_PWR could stay in light up when driver woke up to update gamma. either disable MEM_LOW power feature or set to OGAM_bypass could make artificial color distortion goes away. Easy reproduce after LOW_MEM Power feature enables and resume from S3.

[PATCH 39/49] drm/amd/display: Remove redundant definition of dwb_source enums

From: Julian Parkin There are repeated (but guarded) definitions of dwb_src enums. There are also unused entires. Clean them up. Signed-off-by: Julian Parkin Reviewed-by: Charlene Liu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | 12 1 file changed, 12

[PATCH 42/49] drm/amd/display: 3.2.45

From: Anthony Koo Signed-off-by: Anthony Koo Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 5e53a9eabb34..7bc16eaf8b01 100644 ---

[PATCH 43/49] drm/amd/display: fix dcn20 global sync dml param extraction

From: Dmytro Laktyushkin Currently the paremeters are extracted as if dml is calculating using pipes as we pass them in. in reality, dml internally merges pipes into planes if pipe split is detected. This change adds reverse logic to dcn20_calculate_dlg_params so that the global sync parameters

[PATCH 46/49] drm/amd/display: check hpd before retry verify link cap

From: Wenjing Liu [why] During detection link training if a display is disconnected, the current code will retry 3 times of link training on disconnected link before giving up. [how] Before each retry check for HPD status, only retry verify link cap when HPD is still high. Also put a 10ms delay

[PATCH 38/49] drm/amd/display: Add enum for H-timing divider mode

From: Qingqing Zhuo Add h_timing_div_mode enum to better reflect possible register values. Replace previously programmed values with enum Signed-off-by: Qingqing Zhuo Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c| 9 +

[PATCH 44/49] drm/amd/display: 3.2.46

From: Anthony Koo Signed-off-by: Anthony Koo Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 7bc16eaf8b01..87be02a8a958 100644 ---

[PATCH 45/49] drm/amd/display: enable dcn_mem_pwr as golden setting updates

From: Charlene Liu Enable dcn_mem_pwr as golden setting updates Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

[PATCH 47/49] drm/amd/display: audio cannot switch to internal when display turns off

From: yanyan kang [why] disable_az_endpoint has been skipped because dc->debug.az_endpoint_mute_only = true. [how] set dc->debug.az_endpoint_mute_only false when PPLIB’s PME notification function pointer is not NULL at the dcn10_resource construct function,because right now SMU/PPLIB and DAL

[PATCH 40/49] drm/amd/display: Add Logging for Gamma Related information (2/2)

From: Wyatt Wood [Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Signed-off-by: Wyatt Wood Reviewed-by: Krunoslav Kovac Acked-by: Leo Li --- .../amd/display/dc/dcn10/dcn10_cm_common.c| 4 +--

[PATCH 49/49] drm/amd/display: Load NV12 SOC BB from firmware

From: Leo Li [Why] Previous SOC bounding box firmware loading logic was for NV10, when we still had it in firmware. Now that it's brought into driver code, and NV12 BB is in firmware, this logic needs to be repurposed for NV12. [How] Set SOC_BOUNDING_BOX_VALID to false, and add the

[PATCH 41/49] drm/amd/display: Add and refine DSC logs in enable sequence

From: Nikola Cornij [why] Some logs messages were not precise and some new log messages were needed after "get packed PPS" function was introduced Signed-off-by: Nikola Cornij Reviewed-by: Wenjing Liu Acked-by: Leo Li --- .../drm/amd/display/dc/core/dc_link_hwss.c| 34

[PATCH 25/49] drm/amd/display: Remove duplicate interface for programming FB

From: Julian Parkin [Why] There are currently two interfaces for exactly the same thing: hupb_update_dchub in hupb and update_dchub in hubbub. The hubbub version is currently unused past dcn10, largely because the call from the dcn10 hardware sequencer does not call through the interface, so the

[PATCH 31/49] drm/amd/display: Remove 4:2:2 DSC support

From: Nikola Cornij [why] If DSC is available, a higher picture quality is achieved by using DSC with 4:4:4 format. Using 4:2:2 instead does not offer any benefit and would only introduce loss of quality. Removing it reduces maintenance and testing effort. Signed-off-by: Nikola Cornij

[PATCH 21/49] drm/amd/display: Change DSC policy from slices per column to minimum slice height

From: Nikola Cornij [why] Minimum slice height is recommended by VESA DSC Spreadsheet user guide Signed-off-by: Nikola Cornij Reviewed-by: Jun Lei Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 71 ++--- 1 file changed, 32 insertions(+), 39 deletions(-)

[PATCH 23/49] drm/amd/display: 3.2.44

From: Aric Cyr Signed-off-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 2d3caa91d826..5e53a9eabb34 100644 ---

[PATCH 32/49] drm/amd/display: Add Logging for Gamma Related information (1/2)

From: Wyatt Wood [Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add new log types and logging code to the color module. Signed-off-by: Wyatt Wood Reviewed-by: Aric Cyr Acked-by: Leo Li --- .../gpu/drm/amd/display/include/logger_interface.h

[PATCH 24/49] drm/amd/display: fix pipe selection logic in validate

From: Jun Lei [why] Resource mapping done in dcn20_validate_bandwidth has a flaw: When a full update is performed, the HWSS will only update the MPCC tree for the stream that is updated as opposed to all streams. This means that when mapping pipes in validation, care must be taken to not

[PATCH 26/49] drm/amd/display: Update DML parameters

From: Ilya Bakoulin [Why] Need to add DML struct members that were omitted in previous DML implemenations. [How] - Add missing enum values - Add missing struct members - Set new input values in the fetch functions Signed-off-by: Ilya Bakoulin Reviewed-by: Charlene Liu Acked-by: Leo Li ---

[PATCH 35/49] drm/amd/display: Correct DSC PPS log

From: Nikola Cornij [why] A misleading message "Programming PPS" appears before both programming and "query PPS" functions [how] Move the message from "log PPS" function to "program PPS" function Signed-off-by: Nikola Cornij Reviewed-by: Wenjing Liu Acked-by: Leo Li ---

[PATCH 22/49] drm/amd/display: Set DSC before DIG front-end is connected to its back-end

From: Nikola Cornij [why] At the time DIG FE is connected to its BE, the clocks in OTG are enabled and PHY will also be set up. When DSC has to be used to fit the stream into the available bandwidth, without DSC being set DIG could get exposed to the higer bandwidth it (or link) could handle.

[PATCH 33/49] drm/amd/display: Fix type of ODMCombineType field

From: Ilya Bakoulin The type was changed previously to better reflect possible register values. Signed-off-by: Ilya Bakoulin Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH 18/49] drm/amd/display: enabling seamless boot sequence for dcn2

From: Martin Leung [Why] Seamless boot (building SW state inheriting BIOS-initialized timing) was enabled on DCN2, including fixes [How] Includes fixes for MPC, DPPCLK, and DIG FE mapping/OTG source select/ Pixel clock. This is part 2 of 2 for seamless boot NV10 Signed-off-by: Martin Leung

[PATCH 04/49] drm/amd/display: reset hdmi tmds rate and data scramble on pipe reset

From: Wenjing Liu [why] hdmi data scramble and tmds rate is not reset during pipe reset. [how] reset hdmi tmds rate and data scramble on pipe reset Signed-off-by: Wenjing Liu Reviewed-by: Chris Park Acked-by: Leo Li --- .../amd/display/dc/dce/dce_stream_encoder.c | 19 +++

[PATCH 00/49] DC Patches 09 Aug, 2019

From: Leo Li Summary of change: * Fix potential black-screen after mode change on DCN20 * Fix igt@kms_vrr for DCN20 * Link training optimizations * Fix NV12 SOC bounding box loading from firmware Anthony Koo (3): drm/amd/display: fix issue where 252-255 values are clipped drm/amd/display:

[PATCH 17/49] drm/amd/display: fix dcn-specific clk_mgr init_clocks

From: Martin Leung [Why] underflow seen on certain monitor setups caused by making dcnxx_init_hw generic [How] by moving dcn20_init_hw into dcn10, we added a dcn-specific clk_mgr init (dc->clk_mgr->funcs->init_clocks()). Thus, put old clk_mgr memset in an else statement so both memsets don't

[PATCH 28/49] drm/amd/display: HUBP/HUBBUB register programming fixes

From: Ilya Bakoulin [Why] - Need to change interface function signature / add an enum to reflect the available register field values [How] - Add a new enum and modify existing functions to use it instead of bool Signed-off-by: Ilya Bakoulin Reviewed-by: Charlene Liu Acked-by: Leo Li ---

[PATCH 29/49] drm/amd/display: Enable type C hotplug

From: Eric Yang [Why and How] We want to change where timing is done for alt mode. Some of the commented out #ifs are needed for DCN20 so we enable them for that case. Signed-off-by: Eric Yang Reviewed-by: Eric Yang Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 59

[PATCH 27/49] drm/amd/display: update optc odm interface for more than 2 opps

From: Dmytro Laktyushkin Current optc odm interface only accepts 2 opps, we need to expand this to allow 4 to 1 odm combine. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Leo Li --- .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 3 +--

[PATCH 05/49] drm/amd/display: fix issue where 252-255 values are clipped

From: Anthony Koo [Why] When endpoint is at the boundary of a region, such as at 2^0=1 we find that the last segment has a sharp slope and some points are clipped at the top. [How] If end point is 1, which is exactly at the 2^0 region boundary, we need to program an additional region beyond

[PATCH 30/49] drm/amd/display: reprogram VM config when system resume

From: Lewis Huang [Why] The vm config will be clear to 0 when system enter S4. It will cause hubbub didn't know how to fetch data when system resume. The flip always pending because earliest_inuse_address and request_address are different. [How] Reprogram VM config when system resume

[PATCH 19/49] drm/amd/display: clean up DML for DCN2x

From: Jun Lei [why] Previous "less risky" implemenation of 3 tiered fallback is no longer necessary since DMLv2 has gone through proper validation. v2 can now be used as the default and 1 level of fallback can be removed [how] remove previous workaround implemenation Signed-off-by: Jun Lei

[PATCH 03/49] drm/amd/display: reset drr programming on pipe reset

From: Wenjing Liu [why] drr is still enabled after driver is unloaded causing black screen [how] disable drr during pipe reset. Signed-off-by: Wenjing Liu Reviewed-by: Jun Lei Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +++

[PATCH 09/49] drm/amd/display: Synchronous DisplayPort Link Training

From: David Galiffi [WHY] We require a method to perform synchronous link training. [HOW] Sync LT is broken into 3 basic steps. "Begin" starts the state machine, and resets "preferred" link settings. "Attempt" will attempt to train the link with a given set of training parameters. "End" stops

[PATCH 16/49] drm/amd/display: Make init_hw and init_pipes generic for seamless boot

From: Martin Leung [Why] For seamless boot the init_hw sequence must be split into actual hardware vs pipes, in order to defer pipe initialization to set mode and skip of pipe-destructive sequences [How] made dcn10_init_hw and dcn10_init_pipes generic for future dcns to inherit deleted dcn20

[PATCH 12/49] drm/amd/display: Add work-around option to skip DCN20 clock updates

From: Jaehyun Chung [Why] Auto Overclock Memory fails for some systems that don't support p-state. [How] Implement the workaround, and it's corresponding enable flag. Signed-off-by: Jaehyun Chung Reviewed-by: Alvin Lee Acked-by: Leo Li ---

[PATCH 20/49] drm/amd/display: Add HLG support in color module

From: Vitaly Prosyak [Why & How] Support hlg OETF and EOTF based on BT.2100-2 Follow up is required. Signed-off-by: Vitaly Prosyak Reviewed-by: Krunoslav Kovac Acked-by: Leo Li Acked-by: Vitaly Prosyak --- .../amd/display/modules/color/color_gamma.c | 102 +++--- 1 file

[PATCH 14/49] drm/amd/display: wait for pending complete when enabling a plane

From: Jun Lei [why] When planes are enabled, they must be enabled using VSYNC update (not immediate). However, before the VUPDATE occurs, DM may call with an "immediate" flip which is address only. This operation would normally be okay, but if the locking for immediate flip happens to occur

[PATCH 15/49] drm/amd/display: 3.2.43

From: Aric Cyr Signed-off-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 1866fa71a764..9824f5589a0b 100644 ---

[PATCH 13/49] drm/amd/display: refactor gpio to allocate hw_container in constructor

From: Su Sung Chung [why] if dynamic allocation fails during gpio_open, it will cause crash due to page fault. [how] handle allocation when gpio object gets created and prevent from calling gpio_open if allocation failed Signed-off-by: Su Sung Chung Reviewed-by: Jun Lei Acked-by: Leo Li ---

[PATCH 11/49] drm/amd/display: fixup DPP programming sequence

From: Jun Lei [why] DC does not correct account for the fact that DPP DTO is double buffered while DPP ref is not. This means that when DPP ref clock is lowered when it's "safe to lower", the DPP blocks that need an increased divider will temporarily have actual DPP clock drop below minimum

[PATCH 06/49] drm/amd/display: Fix frames_to_insert math

From: Bayan Zabihiyan [Why] The math on deciding on how many "frames to insert" sometimes sent us over the max refresh rate. Also integer overflow can occur if we have high refresh rates. [How] Instead of clipping the frame duration such that it doesn’t go below the min, just remove a frame

[PATCH 02/49] drm/amd/display: Add DFS reference clock field

From: Yongqiang Sun Add to clk_mgr_internal struct, for future use. Signed-off-by: Yongqiang Sun Reviewed-by: Yongqiang Sun Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH 01/49] drm/amd/display: Add PIXEL_RATE control regs for more instances

From: Yongqiang Sun For use by future ASICs (cherry picked from commit 08a026f1ae782884b18dfa108de019a5a985e92a) Signed-off-by: Sung Lee Signed-off-by: Yongqiang Sun Reviewed-by: Yongqiang Sun Acked-by: Leo Li --- .../gpu/drm/amd/display/dc/dce/dce_hwseq.h| 25 +++ 1

[PATCH 10/49] drm/amd/display: make firmware info only load once during dc_bios create

From: Dmytro Laktyushkin Currently every time DC wants to access firmware info we make a call into VBIOS. This makes no sense as there is nothing that can change runtime inside fw info and can cause issues when calling unstable bios during bringup. This change eliminate this behavior by only

[PATCH 07/49] drm/amd/display: Add 22, 24, and 26 degamma

From: Vitaly Prosyak [Why & How] Support degamma ROM and RAM based on hardware capabilities. Some refactoring into color module Signed-off-by: Vitaly Prosyak Reviewed-by: Gary Kattan Reviewed-by: Nevenko Stupar Acked-by: Leo Li Acked-by: Vitaly Prosyak ---

[PATCH 08/49] drm/amd/display: Improve sharing of HUBBUB register lists

From: Julian Parkin Add DCN20 common register list that contains registers shared between DCN20 generations. Signed-off-by: Julian Parkin Reviewed-by: Charlene Liu Acked-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h | 9 ++--- 1 file changed, 6

[PATCH] drm/amd/display: Fix a typo - dce_aduio_mask --> dce_audio_mask

This should be 'dce_audio_mask', not 'dce_aduio_mask'. Signed-off-by: Christophe JAILLET --- drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 2 +- drivers/gpu/drm/amd/display/dc/dce/dce_audio.h | 6 +++--- drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 2 +-

Re: [PATCH] drm/amd/display: use kvmalloc for dc_state (v2)

Reviewed-by: Andrey Grodzovsky Andrey On 8/9/19 2:59 PM, Alex Deucher wrote: > It's large and doesn't need contiguous memory. Fixes > allocation failures in some cases. > > v2: kvfree the memory. > > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/amd/display/dc/core/dc.c | 11

[PATCH] drm/amd/display: use kvmalloc for dc_state (v2)

It's large and doesn't need contiguous memory. Fixes allocation failures in some cases. v2: kvfree the memory. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git

[pull] amdgpu, amdkfd, radeon, ttm drm-next-5.4

Hi Dave, Daniel, Same request as earlier, but with the readq/writeq stuff resolved and 5.3-rc3 backmerged. diffstat trimmed for size. The following changes since commit 41a5a2a8531f95d18bb4efddea581ccb469e8ee5: drm/amd/display: init res_pool dccg_ref, dchub_ref with xtalin_freq (2019-07-18

Re: [PATCH v19 02/15] arm64: Introduce prctl() options to control the tagged user addresses ABI

On Tue, Jul 23, 2019 at 07:58:39PM +0200, Andrey Konovalov wrote: > From: Catalin Marinas > > It is not desirable to relax the ABI to allow tagged user addresses into > the kernel indiscriminately. This patch introduces a prctl() interface > for enabling or disabling the tagged ABI with a global

Re: [PATCH v19 04/15] mm: untag user pointers passed to memory syscalls

On Tue, Jul 23, 2019 at 07:58:41PM +0200, Andrey Konovalov wrote: > This patch is a part of a series that extends kernel ABI to allow to pass > tagged user pointers (with the top byte set to something else other than > 0x00) as syscall arguments. > > This patch allows tagged pointers to be passed

[PATCH] drm/amd/display: Fix a typo - amdpgu_dm --> amdgpu_dm

This should be 'amdgpu_dm', not 'amdpgu_dm' Signed-off-by: Christophe JAILLET --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

[PATCH 25/27] drm/amdgpu: use direct loading on renoir vcn for the moment

From: Huang Rui PSP has issue for renoir, that will cause VCN fw failed to be loaded. So use direct loading for the moment till the issue is addressed. Signed-off-by: Huang Rui Reviewed-by: Aaron Liu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 9 ++---

[PATCH 26/27] drm/amdgpu: skip mec2 jump table loading for renoir

From: Huang Rui Renoir need not load mec2 jump table with psp. Signed-off-by: Huang Rui Reviewed-by: Aaron Liu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

[PATCH 24/27] drm/amdgpu: set fw default loading by psp for renoir

From: Aaron Liu By default, set amdgpu ucode type to AMDGPU_FW_LOAD_PSP. Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git

[PATCH 19/27] drm/amdgpu: enable Doorbell support for Renoir (v2)

From: Leo Liu Add VCN range aperture to NBIO 7.0 v2: rebase (Alex) Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 21 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 4 2 files

[PATCH 20/27] drm/amdgpu: add VCN2.0 to Renoir IP blocks

From: Leo Liu Thus enable VCN2.0 for Renoir Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c

[PATCH 21/27] drm/amdgpu: enable clock gating for renoir

From: Aaron Liu enable gfx clock gating for renoir Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + drivers/gpu/drm/amd/amdgpu/soc15.c| 1 + 2 files changed, 2 insertions(+) diff --git

[PATCH 08/27] drm/amdgpu: add sdma support for renoir

From: Huang Rui Add renoir checks to appropriate places. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

[PATCH 13/27] drm/amdgpu: add asic funcs for renoir

From: Aaron Liu add asic funcs for renoir, init soc15_asic_funcs Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 04/27] drm/amdgpu: add soc15 common ip block support for renoir

From: Huang Rui This patch adds common ip support for renoir. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c

[PATCH 07/27] drm/amdgpu: add gfx support for renoir

From: Huang Rui Add Renoir checks to gfx9 code. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 26 -- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git

[PATCH 02/27] drm/amdgpu: add renoir asic_type enum

From: Huang Rui This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[]. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 + include/drm/amd_asic_type.h| 1 + 2 files changed, 2

[PATCH 17/27] drm/amdgpu: add sdma golden settings for renoir

From: Huang Rui This patch adds sdma golden settings for renoir asic. Signed-off-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

[PATCH 11/27] drm/amdgpu: fix no interrupt issue for renoir emu

From: Aaron Liu In renoir's ih model, there's a change in mmIH_CHICKEN register, that limits IH to use physical address directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Hawking Zhang Acked-by: Alex Deucher Signed-off-by:

[PATCH 23/27] drm/amdgpu: update lbpw for renoir

From: Aaron Liu enable gfx_v9_0_init_lbpw for renoir Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

[PATCH 22/27] drm/amdgpu: enable power gating for renoir

From: Aaron Liu enable gfx power gating for renoir Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

[PATCH 27/27] drm/amdgpu: flag renoir as experimental for now

The current code won't likely work on production hw when it ships so leave it as experimental until it's ready. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

[PATCH 16/27] drm/amdgpu: add gfx golden settings for renoir (v2)

From: Huang Rui This patch adds gfx golden settings for renoir real asic. v2: update settings (Alex) Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 26 ++ 1 file changed, 26 insertions(+)

[PATCH 12/27] drm/amdgpu: enable dce virtual ip module for Renoir

From: Aaron Liu Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 1 + drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c

[PATCH 18/27] drm/amdgpu: enable Renoir VCN firmware loading

From: Leo Liu By adding new Renoir VCN firmware Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

[PATCH 03/27] drm/amdgpu: add renoir support for gpu_info and ip block setting

From: Huang Rui This patch adds renoir support for gpu_info firmware and ip block setting. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git

[PATCH 15/27] drm/amdgpu: add psp_v12_0 for renoir (v2)

From: Aaron Liu 1. Add psp ip block 2. Use direct loading type by default and it can also config psp loading type. 3. Bypass sos fw loading and xgmi interface v2: drop TA loading Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Signed-off-by: Alex Deucher ---

[PATCH 10/27] drm/amdgpu: add renoir pci id

From: Huang Rui Add Renoir PCI id support. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

[PATCH 14/27] drm/amdgpu: set rlc funcs for renoir

From: Aaron Liu add gfx_v9_0_rlc_funcs for renoir Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

[PATCH 05/27] drm/amdgpu: add gmc v9 supports for renoir

From: Huang Rui Add gfx memory controller support for renoir. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

[PATCH 06/27] drm/amdgpu: set fw load type for renoir

From: Huang Rui This patch sets fw load type as direct for renoir for the moment. Will switch to psp when psp is ready. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 1 + 1 file changed, 1 insertion(+) diff

[PATCH 09/27] drm/amdgpu: set ip blocks for renoir

From: Huang Rui Enable ip blocks for renoir. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c

Re: 1c74ca7a1a9a ("drm/fb-helper: call vga_remove_vgacon automatically.")

On Fri, Aug 09, 2019 at 10:54:41AM +0200, Gerd Hoffmann wrote: > A bit later: > >[8.198138] radeon :00:01.0: Direct firmware load for > radeon/PALM_pfp.bin failed with error -2 >[8.198351] r600_cp: Failed to load firmware "radeon/PALM_pfp.bin" >[8.198512]

Re: [PATCH v3 38/41] powerpc: convert put_page() to put_user_page*()

John Hubbard writes: > On 8/7/19 10:42 PM, Michael Ellerman wrote: >> Hi John, >> >> john.hubb...@gmail.com writes: >>> diff --git a/arch/powerpc/mm/book3s64/iommu_api.c >>> b/arch/powerpc/mm/book3s64/iommu_api.c >>> index b056cae3388b..e126193ba295 100644 >>> ---

Re: [PATCH 00/34] put_user_pages(): miscellaneous call sites

On Wed 07-08-19 19:36:37, Ira Weiny wrote: > On Wed, Aug 07, 2019 at 10:46:49AM +0200, Michal Hocko wrote: > > > So I think your debug option and my suggested renaming serve a bit > > > different purposes (and thus both make sense). If you do the renaming, you > > > can just grep to see

Re: [PATCH 00/34] put_user_pages(): miscellaneous call sites

On Thu 08-08-19 16:25:04, Weiny, Ira wrote: > > I thought I'd caught things early enough to get away with the > > rename and deletion of that. You could either: > > > > a) open code an implementation of vaddr_put_pages_dirty_lock() that > > doesn't call any of the *put_user_pages_dirty*()

Re: [PATCH 3/5] drm/amdkfd: Postpone memory mapping flags calculation to mapping time

Am 09.08.19 um 16:21 schrieb Zeng, Oak: Regards, Oak -Original Message- From: Koenig, Christian Sent: Friday, August 9, 2019 8:31 AM To: Zeng, Oak ; amd-gfx@lists.freedesktop.org Cc: Kuehling, Felix ; Keely, Sean Subject: Re: [PATCH 3/5] drm/amdkfd: Postpone memory mapping flags

Re: [PATCH 4/5] drm/amdgpu: Support snooped PTE flag

Am 09.08.19 um 16:24 schrieb Zeng, Oak: > > Regards, > Oak > > -Original Message- > From: Koenig, Christian > Sent: Friday, August 9, 2019 8:31 AM > To: Zeng, Oak ; amd-gfx@lists.freedesktop.org > Cc: Kuehling, Felix ; Keely, Sean > Subject: Re: [PATCH 4/5] drm/amdgpu: Support snooped

RE: [PATCH 4/5] drm/amdgpu: Support snooped PTE flag

Regards, Oak -Original Message- From: Koenig, Christian Sent: Friday, August 9, 2019 8:31 AM To: Zeng, Oak ; amd-gfx@lists.freedesktop.org Cc: Kuehling, Felix ; Keely, Sean Subject: Re: [PATCH 4/5] drm/amdgpu: Support snooped PTE flag Am 09.08.19 um 04:15 schrieb Zeng, Oak: > Set

RE: [PATCH 3/5] drm/amdkfd: Postpone memory mapping flags calculation to mapping time

Regards, Oak -Original Message- From: Koenig, Christian Sent: Friday, August 9, 2019 8:31 AM To: Zeng, Oak ; amd-gfx@lists.freedesktop.org Cc: Kuehling, Felix ; Keely, Sean Subject: Re: [PATCH 3/5] drm/amdkfd: Postpone memory mapping flags calculation to mapping time Am 09.08.19 um

Re: libdrm patch merge request

This broke the CI pipeline: https://gitlab.freedesktop.org/mesa/drm/pipelines/54903 Looks like the problem is that the autotools build doesn't properly disable the amdgpu tests when the json-c library is missing. I suggest the following: 1. Add a HAVE_JSONC guard in tests/Makefile.am 2. Add

RE: [PATCH 1/5] drm/amdgpu: Extends amdgpu vm definitions

Regards, Oak -Original Message- From: Koenig, Christian Sent: Friday, August 9, 2019 8:29 AM To: Zeng, Oak ; amd-gfx@lists.freedesktop.org Cc: Kuehling, Felix ; Keely, Sean Subject: Re: [PATCH 1/5] drm/amdgpu: Extends amdgpu vm definitions Am 09.08.19 um 04:15 schrieb Zeng, Oak: >

Re: [PATCH 4/5] drm/amdgpu: Support snooped PTE flag

Am 09.08.19 um 04:15 schrieb Zeng, Oak: > Set snooped PTE flag according to mapping flag. Write request to a > page with snooped bit set, will send out invalidate probe request > to TCC of the remote GPU where the vram page resides. > > Change-Id: I799f68ec7a5a1abf32075f5ef31051641a0b3736 >

Re: [PATCH 3/5] drm/amdkfd: Postpone memory mapping flags calculation to mapping time

Am 09.08.19 um 04:15 schrieb Zeng, Oak: > Some mapping flags are decided by memory mapping destination which is not > know at memory object allocation time. So it is reasonable to decide memory > mapping flags at mapping time, instead of alloc time. Record memory allocation > flags during

Re: [PATCH 1/5] drm/amdgpu: Extends amdgpu vm definitions

Am 09.08.19 um 04:15 schrieb Zeng, Oak: > Add definition of all supported mtypes. The RW mtype > is recently introduced for arcturus. Also add definition > of a flag to probe and possibly invalidate remote GPU > cache, which will be used later in this series. > > Change-Id:

Re: [PATCH] drm/amdgpu: remove ras block's feature status info in sysfs

Reviewed-by: Christian König Am 09.08.19 um 12:28 schrieb Zhang, Hawking: > Reviewed-by: Hawking Zhang > > Regards, > Hawking > > -Original Message- > From: amd-gfx On Behalf Of Tao Zhou > Sent: 2019年8月9日 17:51 > To: amd-gfx@lists.freedesktop.org; Koenig, Christian > ; Zhang, Hawking

Re: [PATCH v3 20/41] fbdev/pvr2fb: convert put_page() to put_user_page*()

On 8/7/19 3:33 AM, john.hubb...@gmail.com wrote: > From: John Hubbard > > For pages that were retained via get_user_pages*(), release those pages > via the new put_user_page*() routines, instead of via put_page() or > release_pages(). > > This is part a tree-wide conversion, as described in

Re: [PATCH 4/4] drm/amdgpu: enable mmhub clock gating for Arcturus

Reviewed-by: Kevin Wang From: amd-gfx on behalf of Le Ma Sent: Friday, August 9, 2019 7:26 PM To: amd-gfx@lists.freedesktop.org Cc: Ma, Le Subject: [PATCH 4/4] drm/amdgpu: enable mmhub clock gating for Arcturus Init MC_MGCG/LS flag. Also apply to athub CG.

Re: [PATCH 2/4] drm/amdgpu: increase CGCG gfx idle threshold for Arcturus

Reviewed-by: Kevin Wang From: amd-gfx on behalf of Le Ma Sent: Friday, August 9, 2019 7:26 PM To: amd-gfx@lists.freedesktop.org Cc: Ma, Le Subject: [PATCH 2/4] drm/amdgpu: increase CGCG gfx idle threshold for Arcturus Follow the hw spec, and no need to

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