RE: [PATCH] drm/amdgpu: introduce vram lost for reset

[Liu, Monk]

sure

_
Monk Liu|GPU Virtualization Team |AMD
[sig-cloud-gpu]

From: Deucher, Alexander 
Sent: Tuesday, August 27, 2019 8:48 PM
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: introduce vram lost for reset

Can you update nv.c as well?  With that fixed,
Reviewed-by: Alex Deucher 
mailto:alexander.deuc...@amd.com>>


From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Monk Liu mailto:monk@amd.com>>
Sent: Tuesday, August 27, 2019 4:34 AM
To: amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liu, Monk mailto:monk@amd.com>>
Subject: [PATCH] drm/amdgpu: introduce vram lost for reset

for SOC15/vega10 the BACO reset & mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer

Signed-off-by: Monk Liu mailto:monk@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f6ae565..11e0fc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1155,6 +1155,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) 
((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1)))
 #define amdgpu_asic_need_reset_on_init(adev) 
(adev)->asic_funcs->need_reset_on_init((adev))
 #define amdgpu_asic_get_pcie_replay_count(adev) 
((adev)->asic_funcs->get_pcie_replay_count((adev)))
+#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));

 /* Common functions */
 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 02b3e7d..31690e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3482,7 +3482,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device 
*adev,
 amdgpu_virt_init_data_exchange(adev);
 amdgpu_virt_release_full_gpu(adev, true);
 if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
-   atomic_inc(>vram_lost_counter);
+   amdgpu_inc_vram_lost(adev);
 r = amdgpu_device_recover_vram(adev);
 }

@@ -3648,7 +3648,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info 
*hive,
 vram_lost = 
amdgpu_device_check_vram_lost(tmp_adev);
 if (vram_lost) {
 DRM_INFO("VRAM is lost due to GPU 
reset!\n");
-   
atomic_inc(_adev->vram_lost_counter);
+   amdgpu_inc_vram_lost(tmp_adev);
 }

 r = amdgpu_gtt_mgr_recover(
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index fe2212df..8af7501 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -557,10 +557,12 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
 {
 switch (soc15_asic_reset_method(adev)) {
 case AMD_RESET_METHOD_BACO:
+   amdgpu_inc_vram_lost(adev);
 return soc15_asic_baco_reset(adev);
 case AMD_RESET_METHOD_MODE2:
 return soc15_mode2_reset(adev);
 default:
+   amdgpu_inc_vram_lost(adev);
 return soc15_asic_mode1_reset(adev);
 }
 }
--
2.7.4

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Re: [PATCH 2/2] mm/hmm: hmm_range_fault() infinite loop

[Ralph Campbell]

On 8/27/19 11:41 AM, Jason Gunthorpe wrote:

On Fri, Aug 23, 2019 at 03:17:53PM -0700, Ralph Campbell wrote:


Signed-off-by: Ralph Campbell 
  mm/hmm.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/mm/hmm.c b/mm/hmm.c
index 29371485fe94..4882b83aeccb 100644
+++ b/mm/hmm.c
@@ -292,6 +292,9 @@ static int hmm_vma_walk_hole_(unsigned long addr, unsigned 
long end,
hmm_vma_walk->last = addr;
i = (addr - range->start) >> PAGE_SHIFT;
  
+	if (write_fault && walk->vma && !(walk->vma->vm_flags & VM_WRITE))

+   return -EPERM;


Can walk->vma be NULL here? hmm_vma_do_fault() touches it
unconditionally.

Jason


walk->vma can be NULL. hmm_vma_do_fault() no longer touches it
unconditionally, that is what the preceding patch fixes.
I suppose I could change hmm_vma_walk_hole_() to check for NULL
and fill in the pfns[] array, I just chose to handle it in
hmm_vma_do_fault().
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Re: [PATCH 2/2] mm/hmm: hmm_range_fault() infinite loop

[Jason Gunthorpe]

On Fri, Aug 23, 2019 at 03:17:53PM -0700, Ralph Campbell wrote:

> Signed-off-by: Ralph Campbell 
>  mm/hmm.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/mm/hmm.c b/mm/hmm.c
> index 29371485fe94..4882b83aeccb 100644
> +++ b/mm/hmm.c
> @@ -292,6 +292,9 @@ static int hmm_vma_walk_hole_(unsigned long addr, 
> unsigned long end,
>   hmm_vma_walk->last = addr;
>   i = (addr - range->start) >> PAGE_SHIFT;
>  
> + if (write_fault && walk->vma && !(walk->vma->vm_flags & VM_WRITE))
> + return -EPERM;

Can walk->vma be NULL here? hmm_vma_do_fault() touches it
unconditionally.

Jason
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Re: [PATCH 3/3] drm/amd/powerplay: enable jpeg powergating for navi1x

[Alex Deucher]

Series is:
Reviewed-by: Alex Deucher 

On Tue, Aug 27, 2019 at 3:20 AM Yuan, Xiaojie  wrote:
>
> jpeg pg depends on vcn pg
>
> Signed-off-by: Xiaojie Yuan 
> ---
>  drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c 
> b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index 2d908afbf525..1970843f225f 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -368,7 +368,8 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
> *(uint64_t *)feature_mask |= 
> FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
>
> if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
> -   *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
> +   *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT)
> +   | FEATURE_MASK(FEATURE_JPEG_PG_BIT);
>
> /* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
> if (is_asic_secure(smu)) {
> --
> 2.20.1
>
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[PATCH] drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recover

[Andrey Grodzovsky]

This should be checked at all places job is accessed.

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 02b3e7d..190d9a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3790,14 +3790,14 @@ int amdgpu_device_gpu_recover(struct amdgpu_device 
*adev,
 
if (hive && !mutex_trylock(>reset_lock)) {
DRM_INFO("Bailing on TDR for s_job:%llx, hive: %llx as another 
already in progress",
-job->base.id, hive->hive_id);
+ job ? job->base.id : -1, hive->hive_id);
return 0;
}
 
/* Start with adev pre asic reset first for soft reset check.*/
if (!amdgpu_device_lock_adev(adev, !hive)) {
DRM_INFO("Bailing on TDR for s_job:%llx, as another already in 
progress",
-job->base.id);
+ job ? job->base.id : -1);
return 0;
}
 
@@ -3838,7 +3838,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
if (!ring || !ring->sched.thread)
continue;
 
-   drm_sched_stop(>sched, >base);
+   drm_sched_stop(>sched, job ? >base : NULL);
}
}
 
@@ -3864,7 +3864,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
 
/* Guilty job will be freed after this*/
r = amdgpu_device_pre_asic_reset(adev,
-job,
+job ? job : NULL,
 _full_reset);
if (r) {
/*TODO Should we stop ?*/
-- 
2.7.4

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Re: [PATCH] drm/amd/display: fix struct init in update_bounding_box

[Alex Deucher]

On Tue, Aug 27, 2019 at 1:33 PM Raul E Rangel  wrote:
>
> dcn20_resource.c:2636:9: error: missing braces around initializer 
> [-Werror=missing-braces]
>   struct _vcs_dpi_voltage_scaling_st 
> calculated_states[MAX_CLOCK_LIMIT_STATES] = {0};
>  ^
>
> Fixes: 7ed4e6352c16f ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
>
> Signed-off-by: Raul E Rangel 
> ---
>
>  drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> index b949e202d6cb..d8dd99bfa275 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> @@ -2633,7 +2633,7 @@ static void cap_soc_clocks(
>  static void update_bounding_box(struct dc *dc, struct 
> _vcs_dpi_soc_bounding_box_st *bb,
> struct pp_smu_nv_clock_table *max_clocks, unsigned int 
> *uclk_states, unsigned int num_states)
>  {
> -   struct _vcs_dpi_voltage_scaling_st 
> calculated_states[MAX_CLOCK_LIMIT_STATES] = {0};
> +   struct _vcs_dpi_voltage_scaling_st 
> calculated_states[MAX_CLOCK_LIMIT_STATES] = {};

I think it would be better to just use a memset.  Different compilers
seems to do the wrong thing with these sort of initializations.

Alex

> int i;
> int num_calculated_states = 0;
> int min_dcfclk = 0;
> --
> 2.23.0.187.g17f5b7556c-goog
>
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RE: [PATCH] drm/amdgpu: fix commit 4ef9d7d

[Huang, Ray]

Reviewed-by: Huang Rui 

-Original Message-
From: amd-gfx  On Behalf Of Aaron Liu
Sent: Tuesday, August 27, 2019 12:33 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Aaron 
Subject: [PATCH] drm/amdgpu: fix commit 4ef9d7d

For picasso(adev->pdev->device == 0x15d8)(adev->rev_id >= 0x8), firmware 
is sufficient to support gfxoff.
In commit 4ef9d7dc2db166cbe83fe4621385f034c9347fd2, for picasso, return 
directly and cause gfxoff disabled.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 2762ae4..fd7947e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1027,14 +1027,14 @@ static void gfx_v9_0_check_if_need_gfxoff(struct 
amdgpu_device *adev)
case CHIP_VEGA20:
break;
case CHIP_RAVEN:
-   if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
-   break;
-   if ((adev->gfx.rlc_fw_version != 106 &&
-adev->gfx.rlc_fw_version < 531) ||
-   (adev->gfx.rlc_fw_version == 53815) ||
-   (adev->gfx.rlc_feature_version < 1) ||
-   !adev->gfx.rlc.is_rlc_v2_1)
+   if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
+   &&((adev->gfx.rlc_fw_version != 106 &&
+adev->gfx.rlc_fw_version < 531) ||
+   (adev->gfx.rlc_fw_version == 53815) ||
+   (adev->gfx.rlc_feature_version < 1) ||
+   !adev->gfx.rlc.is_rlc_v2_1))
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
+
if (adev->pm.pp_feature & PP_GFXOFF_MASK)
adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
AMD_PG_SUPPORT_CP |
--
2.7.4

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Re: [PATCH] drm/amdgpu: fix commit 4ef9d7d

[Alex Deucher]

On Tue, Aug 27, 2019 at 11:34 AM Aaron Liu  wrote:
>
> For picasso(adev->pdev->device == 0x15d8)(adev->rev_id >= 0x8),
> firmware is sufficient to support gfxoff.
> In commit 4ef9d7dc2db166cbe83fe4621385f034c9347fd2, for picasso,
> return directly and cause gfxoff disabled.
>
> Signed-off-by: Aaron Liu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 2762ae4..fd7947e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1027,14 +1027,14 @@ static void gfx_v9_0_check_if_need_gfxoff(struct 
> amdgpu_device *adev)
> case CHIP_VEGA20:
> break;
> case CHIP_RAVEN:
> -   if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
> -   break;
> -   if ((adev->gfx.rlc_fw_version != 106 &&
> -adev->gfx.rlc_fw_version < 531) ||
> -   (adev->gfx.rlc_fw_version == 53815) ||
> -   (adev->gfx.rlc_feature_version < 1) ||
> -   !adev->gfx.rlc.is_rlc_v2_1)
> +   if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
> +   &&((adev->gfx.rlc_fw_version != 106 &&
> +adev->gfx.rlc_fw_version < 531) ||
> +   (adev->gfx.rlc_fw_version == 53815) ||
> +   (adev->gfx.rlc_feature_version < 1) ||
> +   !adev->gfx.rlc.is_rlc_v2_1))
> adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
> +
> if (adev->pm.pp_feature & PP_GFXOFF_MASK)
> adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
> AMD_PG_SUPPORT_CP |
> --
> 2.7.4
>
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Re: linux-next: Tree for Aug 27 (amdgpu)

[Alex Deucher]

On Tue, Aug 27, 2019 at 11:31 AM Randy Dunlap  wrote:
>
> On 8/27/19 2:05 AM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20190826:
> >
>
> on i386:
>
> ../drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function 
> ‘dcn20_hw_sequencer_construct’:
> ../drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2127:28: 
> error: ‘dcn20_dsc_pg_control’ undeclared (first use in this function); did 
> you mean ‘dcn20_dpp_pg_control’?
>   dc->hwss.dsc_pg_control = dcn20_dsc_pg_control;
> ^~~~
> dcn20_dpp_pg_control
>
>
> Full randconfig file is attached.

Fixed:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next=da26ded3b2fff646d28559004195abe353bce49b

Alex

>
> --
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[PATCH] drm/amdgpu: fix commit 4ef9d7d

[Aaron Liu]

For picasso(adev->pdev->device == 0x15d8)(adev->rev_id >= 0x8),
firmware is sufficient to support gfxoff.
In commit 4ef9d7dc2db166cbe83fe4621385f034c9347fd2, for picasso,
return directly and cause gfxoff disabled.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 2762ae4..fd7947e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1027,14 +1027,14 @@ static void gfx_v9_0_check_if_need_gfxoff(struct 
amdgpu_device *adev)
case CHIP_VEGA20:
break;
case CHIP_RAVEN:
-   if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
-   break;
-   if ((adev->gfx.rlc_fw_version != 106 &&
-adev->gfx.rlc_fw_version < 531) ||
-   (adev->gfx.rlc_fw_version == 53815) ||
-   (adev->gfx.rlc_feature_version < 1) ||
-   !adev->gfx.rlc.is_rlc_v2_1)
+   if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
+   &&((adev->gfx.rlc_fw_version != 106 &&
+adev->gfx.rlc_fw_version < 531) ||
+   (adev->gfx.rlc_fw_version == 53815) ||
+   (adev->gfx.rlc_feature_version < 1) ||
+   !adev->gfx.rlc.is_rlc_v2_1))
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
+
if (adev->pm.pp_feature & PP_GFXOFF_MASK)
adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
AMD_PG_SUPPORT_CP |
-- 
2.7.4

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Re: [PATCH] drm/amd: remove meaningless descending into amd/amdkfd/

[Alex Deucher]

On Tue, Aug 27, 2019 at 3:29 AM Masahiro Yamada
 wrote:
>
> Since commit 04d5e2765802 ("drm/amdgpu: Merge amdkfd into amdgpu"),
> drivers/gpu/drm/amd/amdkfd/Makefile does not contain any syntax that
> is understood by the build system.
>
> Signed-off-by: Masahiro Yamada 

Applied.  thanks!

Alex

> ---
>
>  drivers/gpu/drm/Makefile | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
> index 9f0d2ee35794..3f9195b7ad13 100644
> --- a/drivers/gpu/drm/Makefile
> +++ b/drivers/gpu/drm/Makefile
> @@ -62,7 +62,6 @@ obj-$(CONFIG_DRM_TTM) += ttm/
>  obj-$(CONFIG_DRM_SCHED)+= scheduler/
>  obj-$(CONFIG_DRM_TDFX) += tdfx/
>  obj-$(CONFIG_DRM_R128) += r128/
> -obj-$(CONFIG_HSA_AMD) += amd/amdkfd/
>  obj-$(CONFIG_DRM_RADEON)+= radeon/
>  obj-$(CONFIG_DRM_AMDGPU)+= amd/amdgpu/
>  obj-$(CONFIG_DRM_MGA)  += mga/
> --
> 2.17.1
>
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RE: [PATCH 2/3] drm/amd/display: remove unused function setFieldWithMask

[Othman, Ahmad]

Hi Alex,

There are callers in the same file "info_packet.c" 

-Original Message-
From: Alex Deucher  
Sent: August 27, 2019 10:20
To: Wentland, Harry 
Cc: YueHaibing ; Wentland, Harry 
; Li, Sun peng (Leo) ; Deucher, 
Alexander ; Koenig, Christian 
; Zhou, David(ChunMing) ; 
airl...@linux.ie; dan...@ffwll.ch; Lakha, Bhawanpreet 
; Koo, Anthony ; Othman, Ahmad 
; Bernstein, Eric ; Cyr, Aric 
; alvin.l...@amd.com; Tatla, Harmanprit 
; dri-de...@lists.freedesktop.org; 
amd-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH 2/3] drm/amd/display: remove unused function 
setFieldWithMask

On Tue, Aug 27, 2019 at 10:01 AM Harry Wentland  wrote:
>
> On 2019-08-27 3:09 a.m., YueHaibing wrote:
> > After commit a9f54ce3c603 ("drm/amd/display: Refactoring VTEM"), 
> > there is no caller in tree.
> >
> > Reported-by: Hulk Robot  Signed-off-by: 
> > YueHaibing 
>
> Reviewed-by: Harry Wentland 
>

Applied.  Thanks!

Alex

> Harry
>
> > ---
> >  .../drm/amd/display/modules/info_packet/info_packet.c | 19 
> > ---
> >  1 file changed, 19 deletions(-)
> >
> > diff --git 
> > a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c 
> > b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > index 5f4b98d..d885d64 100644
> > --- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > +++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > @@ -114,25 +114,6 @@ enum ColorimetryYCCDP {
> >   ColorimetryYCC_DP_ITU2020YCbCr  = 7,  };
> >
> > -void setFieldWithMask(unsigned char *dest, unsigned int mask, 
> > unsigned int value) -{
> > - unsigned int shift = 0;
> > -
> > - if (!mask || !dest)
> > - return;
> > -
> > - while (!((mask >> shift) & 1))
> > - shift++;
> > -
> > - //reset
> > - *dest = *dest & ~mask;
> > - //set
> > - //dont let value span past mask
> > - value = value & (mask >> shift);
> > - //insert value
> > - *dest = *dest | (value << shift);
> > -}
> > -
> >  void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
> >   struct dc_info_packet *info_packet)  {
> >
> ___
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Re: [PATCH] drm/amdgpu: Add APTX quirk for Dell Latitude 5495

[Alex Deucher]

On Tue, Aug 27, 2019 at 9:07 AM Kai-Heng Feng
 wrote:
>
> Needs ATPX rather than _PR3 to really turn off the dGPU. This can save
> ~5W when dGPU is runtime-suspended.
>
> Signed-off-by: Kai-Heng Feng 

Applied.  thanks!

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> index 92b11de19581..354c8b6106dc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> @@ -575,6 +575,7 @@ static const struct amdgpu_px_quirk 
> amdgpu_px_quirk_list[] = {
> { 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
> { 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
> { 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
> +   { 0x1002, 0x699f, 0x1028, 0x0814, AMDGPU_PX_QUIRK_FORCE_ATPX },
> { 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },
> { 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX },
> { 0, 0, 0, 0, 0 },
> --
> 2.17.1
>
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Re: [PATCH 2/3] drm/amd/display: remove unused function setFieldWithMask

[Alex Deucher]

On Tue, Aug 27, 2019 at 10:01 AM Harry Wentland  wrote:
>
> On 2019-08-27 3:09 a.m., YueHaibing wrote:
> > After commit a9f54ce3c603 ("drm/amd/display: Refactoring VTEM"),
> > there is no caller in tree.
> >
> > Reported-by: Hulk Robot  Signed-off-by: YueHaibing 
> > 
>
> Reviewed-by: Harry Wentland 
>

Applied.  Thanks!

Alex

> Harry
>
> > ---
> >  .../drm/amd/display/modules/info_packet/info_packet.c | 19 
> > ---
> >  1 file changed, 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c 
> > b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > index 5f4b98d..d885d64 100644
> > --- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > +++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> > @@ -114,25 +114,6 @@ enum ColorimetryYCCDP {
> >   ColorimetryYCC_DP_ITU2020YCbCr  = 7,
> >  };
> >
> > -void setFieldWithMask(unsigned char *dest, unsigned int mask, unsigned int 
> > value)
> > -{
> > - unsigned int shift = 0;
> > -
> > - if (!mask || !dest)
> > - return;
> > -
> > - while (!((mask >> shift) & 1))
> > - shift++;
> > -
> > - //reset
> > - *dest = *dest & ~mask;
> > - //set
> > - //dont let value span past mask
> > - value = value & (mask >> shift);
> > - //insert value
> > - *dest = *dest | (value << shift);
> > -}
> > -
> >  void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
> >   struct dc_info_packet *info_packet)
> >  {
> >
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[PATCH v9 1/6] drm/dp_mst: Add PBN calculation for DSC modes

[David Francis]

With DSC, bpp can be fractional in multiples of 1/16.

Change drm_dp_calc_pbn_mode to reflect this, adding a new
parameter bool dsc. When this parameter is true, treat the
bpp parameter as having units not of bits per pixel, but
1/16 of a bit per pixel

v2: Don't add separate function for this

Cc: amd-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare 
Reviewed-by: Lyude Paul 
Reviewed-by: Harry Wentland 
Signed-off-by: David Francis 
---
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c|  2 +-
 drivers/gpu/drm/drm_dp_mst_topology.c| 16 
 drivers/gpu/drm/i915/display/intel_dp_mst.c  |  2 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c  |  2 +-
 drivers/gpu/drm/radeon/radeon_dp_mst.c   |  2 +-
 include/drm/drm_dp_mst_helper.h  |  3 +--
 6 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index a0ed0154a9f0..abafb5221b44 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -235,7 +235,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
 
/* TODO need to know link rate */
 
-   pbn = drm_dp_calc_pbn_mode(clock, bpp);
+   pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 
slots = drm_dp_find_vcpi_slots(mst_mgr, pbn);
ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 82add736e17d..3e7b7553cf4d 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3534,10 +3534,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status);
  * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
  * @clock: dot clock for the mode
  * @bpp: bpp for the mode.
+ * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
  *
  * This uses the formula in the spec to calculate the PBN value for a mode.
  */
-int drm_dp_calc_pbn_mode(int clock, int bpp)
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
 {
u64 kbps;
s64 peak_kbps;
@@ -3555,11 +3556,18 @@ int drm_dp_calc_pbn_mode(int clock, int bpp)
 * peak_kbps *= (1006/1000)
 * peak_kbps *= (64/54)
 * peak_kbps *= 8convert to bytes
+*
+* If the bpp is in units of 1/16, further divide by 16. Put this
+* factor in the numerator rather than the denominator to avoid
+* integer overflow
 */
 
numerator = 64 * 1006;
denominator = 54 * 8 * 1000 * 1000;
 
+   if (dsc)
+   numerator /= 16;
+
kbps *= numerator;
peak_kbps = drm_fixp_from_fraction(kbps, denominator);
 
@@ -3570,19 +3578,19 @@ EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
 static int test_calc_pbn_mode(void)
 {
int ret;
-   ret = drm_dp_calc_pbn_mode(154000, 30);
+   ret = drm_dp_calc_pbn_mode(154000, 30, false);
if (ret != 689) {
DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, 
expected PBN %d, actual PBN %d.\n",
154000, 30, 689, ret);
return -EINVAL;
}
-   ret = drm_dp_calc_pbn_mode(234000, 30);
+   ret = drm_dp_calc_pbn_mode(234000, 30, false);
if (ret != 1047) {
DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, 
expected PBN %d, actual PBN %d.\n",
234000, 30, 1047, ret);
return -EINVAL;
}
-   ret = drm_dp_calc_pbn_mode(297000, 24);
+   ret = drm_dp_calc_pbn_mode(297000, 24, false);
if (ret != 1063) {
DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, 
expected PBN %d, actual PBN %d.\n",
297000, 24, 1063, ret);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 2c5ac3dd647f..4f17f61f4453 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -61,7 +61,7 @@ static int intel_dp_mst_compute_link_config(struct 
intel_encoder *encoder,
crtc_state->pipe_bpp = bpp;
 
crtc_state->pbn = 
drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-  crtc_state->pipe_bpp);
+  crtc_state->pipe_bpp, 
false);
 
slots = drm_dp_atomic_find_vcpi_slots(state, _dp->mst_mgr,
  port, crtc_state->pbn);
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 5c36c75232e6..c68783c1f3fa 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c

Re: [PATCH RESEND 02/14] drm/radeon: Provide ddc symlink in connector sysfs directory

[Alex Deucher]

On Mon, Aug 26, 2019 at 3:26 PM Andrzej Pietrasiewicz
 wrote:
>
> Use the ddc pointer provided by the generic connector.
>
> Signed-off-by: Andrzej Pietrasiewicz 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/radeon/radeon_connectors.c | 143 +++--
>  1 file changed, 107 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c 
> b/drivers/gpu/drm/radeon/radeon_connectors.c
> index c60d1a44d22a..62d37eddf99c 100644
> --- a/drivers/gpu/drm/radeon/radeon_connectors.c
> +++ b/drivers/gpu/drm/radeon/radeon_connectors.c
> @@ -1870,6 +1870,7 @@ radeon_add_atom_connector(struct drm_device *dev,
> struct radeon_connector_atom_dig *radeon_dig_connector;
> struct drm_encoder *encoder;
> struct radeon_encoder *radeon_encoder;
> +   struct i2c_adapter *ddc = NULL;
> uint32_t subpixel_order = SubPixelNone;
> bool shared_ddc = false;
> bool is_dp_bridge = false;
> @@ -1947,17 +1948,21 @@ radeon_add_atom_connector(struct drm_device *dev,
> radeon_connector->con_priv = radeon_dig_connector;
> if (i2c_bus->valid) {
> radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, 
> i2c_bus);
> -   if (radeon_connector->ddc_bus)
> +   if (radeon_connector->ddc_bus) {
> has_aux = true;
> -   else
> +   ddc = _connector->ddc_bus->adapter;
> +   } else {
> DRM_ERROR("DP: Failed to assign ddc bus! 
> Check dmesg for i2c errors.\n");
> +   }
> }
> switch (connector_type) {
> case DRM_MODE_CONNECTOR_VGA:
> case DRM_MODE_CONNECTOR_DVIA:
> default:
> -   drm_connector_init(dev, _connector->base,
> -  _dp_connector_funcs, 
> connector_type);
> +   drm_connector_init_with_ddc(dev, 
> _connector->base,
> +   
> _dp_connector_funcs,
> +   connector_type,
> +   ddc);
> drm_connector_helper_add(_connector->base,
>  
> _dp_connector_helper_funcs);
> connector->interlace_allowed = true;
> @@ -1979,8 +1984,10 @@ radeon_add_atom_connector(struct drm_device *dev,
> case DRM_MODE_CONNECTOR_HDMIA:
> case DRM_MODE_CONNECTOR_HDMIB:
> case DRM_MODE_CONNECTOR_DisplayPort:
> -   drm_connector_init(dev, _connector->base,
> -  _dp_connector_funcs, 
> connector_type);
> +   drm_connector_init_with_ddc(dev, 
> _connector->base,
> +   
> _dp_connector_funcs,
> +   connector_type,
> +   ddc);
> drm_connector_helper_add(_connector->base,
>  
> _dp_connector_helper_funcs);
> 
> drm_object_attach_property(_connector->base.base,
> @@ -2027,8 +2034,10 @@ radeon_add_atom_connector(struct drm_device *dev,
> break;
> case DRM_MODE_CONNECTOR_LVDS:
> case DRM_MODE_CONNECTOR_eDP:
> -   drm_connector_init(dev, _connector->base,
> -  
> _lvds_bridge_connector_funcs, connector_type);
> +   drm_connector_init_with_ddc(dev, 
> _connector->base,
> +   
> _lvds_bridge_connector_funcs,
> +   connector_type,
> +   ddc);
> drm_connector_helper_add(_connector->base,
>  
> _dp_connector_helper_funcs);
> 
> drm_object_attach_property(_connector->base.base,
> @@ -2042,13 +2051,18 @@ radeon_add_atom_connector(struct drm_device *dev,
> } else {
> switch (connector_type) {
> case DRM_MODE_CONNECTOR_VGA:
> -   drm_connector_init(dev, _connector->base, 
> _vga_connector_funcs, connector_type);
> -   drm_connector_helper_add(_connector->base, 
> _vga_connector_helper_funcs);
> if (i2c_bus->valid) {
> radeon_connector->ddc_bus = 
> radeon_i2c_lookup(rdev, i2c_bus);
> if (!radeon_connector->ddc_bus)
> DRM_ERROR("VGA: Failed 

Re: [PATCH RESEND 03/14] drm/amdgpu: Provide ddc symlink in dm connector's sysfs directory

[Harry Wentland]

On 2019-08-26 3:25 p.m., Andrzej Pietrasiewicz wrote:
> Use the ddc pointer provided by the generic connector.
> 
> Signed-off-by: Andrzej Pietrasiewicz 

Reviewed-by: Harry Wentland 

Harry

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index cb7cfa9b34f2..e872a415b409 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -5144,11 +5144,12 @@ static int amdgpu_dm_connector_init(struct 
> amdgpu_display_manager *dm,
>  
>   connector_type = to_drm_connector_type(link->connector_signal);
>  
> - res = drm_connector_init(
> + res = drm_connector_init_with_ddc(
>   dm->ddev,
>   >base,
>   _dm_connector_funcs,
> - connector_type);
> + connector_type,
> + >base);
>  
>   if (res) {
>   DRM_ERROR("connector_init failed\n");
> 
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Re: [PATCH 2/3] drm/amd/display: remove unused function setFieldWithMask

[Harry Wentland]

On 2019-08-27 3:09 a.m., YueHaibing wrote:
> After commit a9f54ce3c603 ("drm/amd/display: Refactoring VTEM"),
> there is no caller in tree.
> 
> Reported-by: Hulk Robot  Signed-off-by: YueHaibing 
> 

Reviewed-by: Harry Wentland 

Harry

> ---
>  .../drm/amd/display/modules/info_packet/info_packet.c | 19 
> ---
>  1 file changed, 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c 
> b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> index 5f4b98d..d885d64 100644
> --- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> +++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
> @@ -114,25 +114,6 @@ enum ColorimetryYCCDP {
>   ColorimetryYCC_DP_ITU2020YCbCr  = 7,
>  };
>  
> -void setFieldWithMask(unsigned char *dest, unsigned int mask, unsigned int 
> value)
> -{
> - unsigned int shift = 0;
> -
> - if (!mask || !dest)
> - return;
> -
> - while (!((mask >> shift) & 1))
> - shift++;
> -
> - //reset
> - *dest = *dest & ~mask;
> - //set
> - //dont let value span past mask
> - value = value & (mask >> shift);
> - //insert value
> - *dest = *dest | (value << shift);
> -}
> -
>  void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
>   struct dc_info_packet *info_packet)
>  {
> 
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Re: [PATCH] drm/amdgpu: correct in_suspend setting for navi series

[Deucher, Alexander]

Reviewed-by: Alex Deucher 

From: amd-gfx  on behalf of Hawking 
Zhang 
Sent: Tuesday, August 27, 2019 5:19 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Zhang, Hawking 
Subject: [PATCH] drm/amdgpu: correct in_suspend setting for navi series

in_suspend flag should be set in amdgpu_device_suspend/resume in pairs,
instead of gfx10 ip suspend/resume function.

Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 12 ++--
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index f708912..a2f4ff1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3768,20 +3768,12 @@ static int gfx_v10_0_hw_fini(void *handle)

 static int gfx_v10_0_suspend(void *handle)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-   adev->in_suspend = true;
-   return gfx_v10_0_hw_fini(adev);
+   return gfx_v10_0_hw_fini(handle);
 }

 static int gfx_v10_0_resume(void *handle)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-   int r;
-
-   r = gfx_v10_0_hw_init(adev);
-   adev->in_suspend = false;
-   return r;
+   return gfx_v10_0_hw_init(handle);
 }

 static bool gfx_v10_0_is_idle(void *handle)
--
2.7.4

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Re: [PATCH] drm/amdgpu: introduce vram lost for reset

[Deucher, Alexander]

Can you update nv.c as well?  With that fixed,
Reviewed-by: Alex Deucher 


From: amd-gfx  on behalf of Monk Liu 

Sent: Tuesday, August 27, 2019 4:34 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Liu, Monk 
Subject: [PATCH] drm/amdgpu: introduce vram lost for reset

for SOC15/vega10 the BACO reset & mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer

Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f6ae565..11e0fc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1155,6 +1155,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) 
((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1)))
 #define amdgpu_asic_need_reset_on_init(adev) 
(adev)->asic_funcs->need_reset_on_init((adev))
 #define amdgpu_asic_get_pcie_replay_count(adev) 
((adev)->asic_funcs->get_pcie_replay_count((adev)))
+#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));

 /* Common functions */
 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 02b3e7d..31690e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3482,7 +3482,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device 
*adev,
 amdgpu_virt_init_data_exchange(adev);
 amdgpu_virt_release_full_gpu(adev, true);
 if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
-   atomic_inc(>vram_lost_counter);
+   amdgpu_inc_vram_lost(adev);
 r = amdgpu_device_recover_vram(adev);
 }

@@ -3648,7 +3648,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info 
*hive,
 vram_lost = 
amdgpu_device_check_vram_lost(tmp_adev);
 if (vram_lost) {
 DRM_INFO("VRAM is lost due to GPU 
reset!\n");
-   
atomic_inc(_adev->vram_lost_counter);
+   amdgpu_inc_vram_lost(tmp_adev);
 }

 r = amdgpu_gtt_mgr_recover(
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index fe2212df..8af7501 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -557,10 +557,12 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
 {
 switch (soc15_asic_reset_method(adev)) {
 case AMD_RESET_METHOD_BACO:
+   amdgpu_inc_vram_lost(adev);
 return soc15_asic_baco_reset(adev);
 case AMD_RESET_METHOD_MODE2:
 return soc15_mode2_reset(adev);
 default:
+   amdgpu_inc_vram_lost(adev);
 return soc15_asic_mode1_reset(adev);
 }
 }
--
2.7.4

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[PATCH] drm/amdgpu: Add APTX quirk for Dell Latitude 5495

[Kai-Heng Feng]

Needs ATPX rather than _PR3 to really turn off the dGPU. This can save
~5W when dGPU is runtime-suspended.

Signed-off-by: Kai-Heng Feng 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 92b11de19581..354c8b6106dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
@@ -575,6 +575,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] 
= {
{ 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
{ 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
+   { 0x1002, 0x699f, 0x1028, 0x0814, AMDGPU_PX_QUIRK_FORCE_ATPX },
{ 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },
{ 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX },
{ 0, 0, 0, 0, 0 },
-- 
2.17.1

[PATCH] drm/amdgpu: correct in_suspend setting for navi series

[Hawking Zhang]

in_suspend flag should be set in amdgpu_device_suspend/resume in pairs,
instead of gfx10 ip suspend/resume function.

Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 12 ++--
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index f708912..a2f4ff1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3768,20 +3768,12 @@ static int gfx_v10_0_hw_fini(void *handle)
 
 static int gfx_v10_0_suspend(void *handle)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-   adev->in_suspend = true;
-   return gfx_v10_0_hw_fini(adev);
+   return gfx_v10_0_hw_fini(handle);
 }
 
 static int gfx_v10_0_resume(void *handle)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-   int r;
-
-   r = gfx_v10_0_hw_init(adev);
-   adev->in_suspend = false;
-   return r;
+   return gfx_v10_0_hw_init(handle);
 }
 
 static bool gfx_v10_0_is_idle(void *handle)
-- 
2.7.4

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Re: [PATCH 3/4] drm/amdgpu: Determing PTE flags separately for each mapping (v2)

[Koenig, Christian]

Am 27.08.19 um 01:07 schrieb Kuehling, Felix:
> The same BO can be mapped with different PTE flags by different GPUs.
> Therefore determine the PTE flags separately for each mapping instead
> of storing them in the KFD buffer object.
>
> Add a helper function to determine the PTE flags to be extended with
> ASIC and memory-type-specific logic in subsequent commits.
>
> v2: Split Arcturus-specific MTYPE changes into separate commit
>
> Signed-off-by: Felix Kuehling 

Acked-by: Christian König 

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h|  2 +-
>   .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  | 39 +++
>   2 files changed, 24 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> index e519df3fd2b6..1af8f83f7e02 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> @@ -57,7 +57,7 @@ struct kgd_mem {
>   unsigned int mapped_to_gpu_memory;
>   uint64_t va;
>   
> - uint32_t mapping_flags;
> + uint32_t alloc_flags;
>   
>   atomic_t invalid;
>   struct amdkfd_process_info *process_info;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index 44a52b09cc58..1b7340a18f67 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -355,6 +355,23 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct 
> amdgpu_sync *sync)
>   return amdgpu_sync_fence(NULL, sync, vm->last_update, false);
>   }
>   
> +static uint32_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem 
> *mem)
> +{
> + bool coherent = mem->alloc_flags & ALLOC_MEM_FLAGS_COHERENT;
> + uint32_t mapping_flags;
> +
> + mapping_flags = AMDGPU_VM_PAGE_READABLE;
> + if (mem->alloc_flags & ALLOC_MEM_FLAGS_WRITABLE)
> + mapping_flags |= AMDGPU_VM_PAGE_WRITEABLE;
> + if (mem->alloc_flags & ALLOC_MEM_FLAGS_EXECUTABLE)
> + mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
> +
> + mapping_flags |= coherent ?
> + AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
> +
> + return amdgpu_gmc_get_pte_flags(adev, mapping_flags);
> +}
> +
>   /* add_bo_to_vm - Add a BO to a VM
>*
>* Everything that needs to bo done only once when a BO is first added
> @@ -403,8 +420,7 @@ static int add_bo_to_vm(struct amdgpu_device *adev, 
> struct kgd_mem *mem,
>   }
>   
>   bo_va_entry->va = va;
> - bo_va_entry->pte_flags = amdgpu_gmc_get_pte_flags(adev,
> -  mem->mapping_flags);
> + bo_va_entry->pte_flags = get_pte_flags(adev, mem);
>   bo_va_entry->kgd_dev = (void *)adev;
>   list_add(_va_entry->bo_list, list_bo_va);
>   
> @@ -1081,7 +1097,6 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
>   int byte_align;
>   u32 domain, alloc_domain;
>   u64 alloc_flags;
> - uint32_t mapping_flags;
>   int ret;
>   
>   /*
> @@ -1143,16 +1158,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
>   adev->asic_type != CHIP_VEGAM) ?
>   VI_BO_SIZE_ALIGN : 1;
>   
> - mapping_flags = AMDGPU_VM_PAGE_READABLE;
> - if (flags & ALLOC_MEM_FLAGS_WRITABLE)
> - mapping_flags |= AMDGPU_VM_PAGE_WRITEABLE;
> - if (flags & ALLOC_MEM_FLAGS_EXECUTABLE)
> - mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
> - if (flags & ALLOC_MEM_FLAGS_COHERENT)
> - mapping_flags |= AMDGPU_VM_MTYPE_UC;
> - else
> - mapping_flags |= AMDGPU_VM_MTYPE_NC;
> - (*mem)->mapping_flags = mapping_flags;
> + (*mem)->alloc_flags = flags;
>   
>   amdgpu_sync_create(&(*mem)->sync);
>   
> @@ -1625,9 +1631,10 @@ int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev 
> *kgd,
>   
>   INIT_LIST_HEAD(&(*mem)->bo_va_list);
>   mutex_init(&(*mem)->lock);
> - (*mem)->mapping_flags =
> - AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |
> - AMDGPU_VM_PAGE_EXECUTABLE | AMDGPU_VM_MTYPE_NC;
> + (*mem)->alloc_flags =
> + ((bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) ?
> +  ALLOC_MEM_FLAGS_VRAM : ALLOC_MEM_FLAGS_GTT) |
> + ALLOC_MEM_FLAGS_WRITABLE | ALLOC_MEM_FLAGS_EXECUTABLE;
>   
>   (*mem)->bo = amdgpu_bo_ref(bo);
>   (*mem)->va = va;

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Re: [PATCH 4/4] drm/amdgpu: Use optimal mtypes and PTE bits for Arcturus

[Koenig, Christian]

Am 27.08.19 um 01:07 schrieb Kuehling, Felix:
> For compute VRAM allocations on Arturus use the new RW mtype
> for non-coherent local memory, CC mtype for coherent local
> memory and PTE_SNOOPED bit for invalidating non-dirty cache
> lines on remote XGMI mappings.
>
> Signed-off-by: Felix Kuehling 

I would give an rb on the part in amdgpu_vm_bo_split_mapping(), but 
can't fully judge the KFD part for correctness.

So only Acked-by: Christian König 

> ---
>   .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  | 20 +--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c|  4 
>   2 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index 1b7340a18f67..c5c18e292ae3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -357,6 +357,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct 
> amdgpu_sync *sync)
>   
>   static uint32_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem 
> *mem)
>   {
> + struct amdgpu_device *bo_adev = amdgpu_ttm_adev(mem->bo->tbo.bdev);
>   bool coherent = mem->alloc_flags & ALLOC_MEM_FLAGS_COHERENT;
>   uint32_t mapping_flags;
>   
> @@ -366,8 +367,23 @@ static uint32_t get_pte_flags(struct amdgpu_device 
> *adev, struct kgd_mem *mem)
>   if (mem->alloc_flags & ALLOC_MEM_FLAGS_EXECUTABLE)
>   mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
>   
> - mapping_flags |= coherent ?
> - AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
> + switch (adev->asic_type) {
> + case CHIP_ARCTURUS:
> + if (mem->alloc_flags & ALLOC_MEM_FLAGS_VRAM) {
> + if (bo_adev == adev)
> + mapping_flags |= coherent ?
> + AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
> + else
> + mapping_flags |= AMDGPU_VM_MTYPE_UC;
> + } else {
> + mapping_flags |= coherent ?
> + AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
> + }
> + break;
> + default:
> + mapping_flags |= coherent ?
> + AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
> + }
>   
>   return amdgpu_gmc_get_pte_flags(adev, mapping_flags);
>   }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 7ddca3eeb6cf..189ad5699946 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1592,6 +1592,10 @@ static int amdgpu_vm_bo_split_mapping(struct 
> amdgpu_device *adev,
>   }
>   flags &= ~AMDGPU_PTE_VALID;
>   }
> + if (adev->asic_type == CHIP_ARCTURUS &&
> + !(flags & AMDGPU_PTE_SYSTEM) &&
> + mapping->bo_va->is_xgmi)
> + flags |= AMDGPU_PTE_SNOOPED;
>   
>   trace_amdgpu_vm_bo_update(mapping);
>   

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Re: [PATCH 1/4] drm/amdgpu: Extends amdgpu vm definitions (v2)

[Koenig, Christian]

Am 27.08.19 um 01:07 schrieb Kuehling, Felix:
> From: Oak Zeng 
>
> Add RW mtype introduced for arcturus.
>
> v2:
> * Don't add probe-invalidation bit from UAPI
> * Don't add unused AMDGPU_MTYPE_ definitions
>
> Signed-off-by: Oak Zeng 
> Signed-off-by: Felix Kuehling 

We should have used the hardware value here in the first place (e.g. a 
mask and a shift), but now it is probably to late to actually fix that.

Reviewed-by: Christian König 

> ---
>   include/uapi/drm/amdgpu_drm.h | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index ca97b6802275..f3ad429173e3 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -503,6 +503,8 @@ struct drm_amdgpu_gem_op {
>   #define AMDGPU_VM_MTYPE_CC  (3 << 5)
>   /* Use UC MTYPE instead of default MTYPE */
>   #define AMDGPU_VM_MTYPE_UC  (4 << 5)
> +/* Use RW MTYPE instead of default MTYPE */
> +#define AMDGPU_VM_MTYPE_RW   (5 << 5)
>   
>   struct drm_amdgpu_gem_va {
>   /** GEM object handle */

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Re: [PATCH 2/4] drm/amdgpu: Support new arcturus mtype

[Koenig, Christian]

Am 27.08.19 um 01:07 schrieb Kuehling, Felix:
> From: Oak Zeng 
>
> Arcturus repurposed mtype WC to RW. Modify gmc functions
> to support the new mtype
>
> Change-Id: Idc338e5386a57020f45262025e2664ab4ba9f291
> Signed-off-by: Oak Zeng 

Reviewed-by: Christian König 

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
>   drivers/gpu/drm/amd/include/vega10_enum.h | 1 +
>   2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index f77138ba41f6..7aa365cd8d1d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -603,6 +603,9 @@ static uint64_t gmc_v9_0_get_vm_pte_flags(struct 
> amdgpu_device *adev,
>   case AMDGPU_VM_MTYPE_WC:
>   pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_WC);
>   break;
> + case AMDGPU_VM_MTYPE_RW:
> + pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_RW);
> + break;
>   case AMDGPU_VM_MTYPE_CC:
>   pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_CC);
>   break;
> diff --git a/drivers/gpu/drm/amd/include/vega10_enum.h 
> b/drivers/gpu/drm/amd/include/vega10_enum.h
> index c14ba65a2415..adf1b754666e 100644
> --- a/drivers/gpu/drm/amd/include/vega10_enum.h
> +++ b/drivers/gpu/drm/amd/include/vega10_enum.h
> @@ -1037,6 +1037,7 @@ TCC_CACHE_POLICY_STREAM  = 0x0001,
>   typedef enum MTYPE {
>   MTYPE_NC = 0x,
>   MTYPE_WC = 0x0001,
> +MTYPE_RW = 0x0001,
>   MTYPE_CC = 0x0002,
>   MTYPE_UC = 0x0003,
>   } MTYPE;

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[PATCH] drm/amdgpu: introduce vram lost for reset

[Monk Liu]

for SOC15/vega10 the BACO reset & mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer

Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f6ae565..11e0fc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1155,6 +1155,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) 
((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1)))
 #define amdgpu_asic_need_reset_on_init(adev) 
(adev)->asic_funcs->need_reset_on_init((adev))
 #define amdgpu_asic_get_pcie_replay_count(adev) 
((adev)->asic_funcs->get_pcie_replay_count((adev)))
+#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
 
 /* Common functions */
 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 02b3e7d..31690e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3482,7 +3482,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device 
*adev,
amdgpu_virt_init_data_exchange(adev);
amdgpu_virt_release_full_gpu(adev, true);
if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
-   atomic_inc(>vram_lost_counter);
+   amdgpu_inc_vram_lost(adev);
r = amdgpu_device_recover_vram(adev);
}
 
@@ -3648,7 +3648,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info 
*hive,
vram_lost = 
amdgpu_device_check_vram_lost(tmp_adev);
if (vram_lost) {
DRM_INFO("VRAM is lost due to GPU 
reset!\n");
-   
atomic_inc(_adev->vram_lost_counter);
+   amdgpu_inc_vram_lost(tmp_adev);
}
 
r = amdgpu_gtt_mgr_recover(
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c 
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index fe2212df..8af7501 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -557,10 +557,12 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
 {
switch (soc15_asic_reset_method(adev)) {
case AMD_RESET_METHOD_BACO:
+   amdgpu_inc_vram_lost(adev);
return soc15_asic_baco_reset(adev);
case AMD_RESET_METHOD_MODE2:
return soc15_mode2_reset(adev);
default:
+   amdgpu_inc_vram_lost(adev);
return soc15_asic_mode1_reset(adev);
}
 }
-- 
2.7.4

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Re: [PATCH V2] drm: Add LTTPR defines for DP 1.4a

[Jani Nikula]

On Mon, 26 Aug 2019, "Siqueira, Rodrigo"  wrote:
> DP 1.4a specification defines Link Training Tunable PHY Repeater (LTTPR)
> which is required to add support for systems with Thunderbolt or other
> repeater devices.
>
> Changes since V1:
> - Adjusts registers names to be aligned with spec and the rest of the
>   file
> - Update spec comment from 1.4 to 1.4a
>
> Cc: Abdoulaye Berthe 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Signed-off-by: Rodrigo Siqueira 
> Signed-off-by: Abdoulaye Berthe 
> ---
>  include/drm/drm_dp_helper.h | 25 +
>  1 file changed, 25 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 8364502f92cf..e8beb4e7e5da 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -134,6 +134,31 @@
>  #define DP_SUPPORTED_LINK_RATES  0x010 /* eDP 1.4 */
>  # define DP_MAX_SUPPORTED_RATES   8  /* 16-bit 
> little-endian */
>  
> +/** Link Training (LT)-tunable Physical Repeaters - DP 1.4a **/

This is not a kernel-doc comment, so please drop the double ** and use
regular comments.

All the DPCD register definitions are ordered according to register
offset. Why add 0xf and friends between 0x10 and 0x20...?

BR,
Jani.

> +#define DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV 0xf
> +#define DP_MAX_LINK_RATE_PHY_REPEATER   0xf0001
> +#define DP_PHY_REPEATER_CNT 0xf0002
> +#define DP_PHY_REPEATER_MODE0xf0003
> +#define DP_MAX_LANE_COUNT_PHY_REPEATER  0xf0004
> +#define DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT   0xf0005
> +#define DP_TRAINING_PATTERN_SET_PHY_REPEATER1   0xf0010
> +#define DP_TRAINING_LANE0_SET_PHY_REPEATER1 0xf0011
> +#define DP_TRAINING_LANE1_SET_PHY_REPEATER1 0xf0012
> +#define DP_TRAINING_LANE2_SET_PHY_REPEATER1 0xf0013
> +#define DP_TRAINING_LANE3_SET_PHY_REPEATER1 0xf0014
> +#define DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1   0xf0020
> +#define DP_TRANSMITTER_CAPABILITY_PHY_REPEATER1 0xf0021
> +#define DP_LANE0_1_STATUS_PHY_REPEATER1 0xf0030
> +#define DP_LANE2_3_STATUS_PHY_REPEATER1 0xf0031
> +#define DP_LANE_ALIGN_STATUS_UPDATED_PHY_REPEATER1  0xf0032
> +#define DP_ADJUST_REQUEST_LANE0_1_PHY_REPEATER1 0xf0033
> +#define DP_ADJUST_REQUEST_LANE2_3_PHY_REPEATER1 0xf0034
> +#define DP_SYMBOL_ERROR_COUNT_LANE0_PHY_REPEATER1   0xf0035
> +#define DP_SYMBOL_ERROR_COUNT_LANE1_PHY_REPEATER1   0xf0037
> +#define DP_SYMBOL_ERROR_COUNT_LANE2_PHY_REPEATER1   0xf0039
> +#define DP_SYMBOL_ERROR_COUNT_LANE3_PHY_REPEATER1   0xf003b
> +#define DP_FEC_STATUS_PHY_REPEATER1 0xf0290
> +
>  /* Multiple stream transport */
>  #define DP_FAUX_CAP  0x020   /* 1.2 */
>  # define DP_FAUX_CAP_1   (1 << 0)

-- 
Jani Nikula, Intel Open Source Graphics Center
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[RFC] AMD polaris MEM_AP_SIZE location (PCI BAR aperture size)

[Petr Cvek]

Hello,

I'm trying to run AMD GPUs in unusual configurations. I was able to decrease 
the PCI BAR size in HD4550 by its BIOS strap configuration and change it to 
64MB (and I was able to run it on MIPS vocore2 board :-D ). Is there a similar 
configuration location for AMD polaris 11/RX 460 BIOS? 

Petr Cvek
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[PATCH 2/3] drm/amdgpu: enable athub powergating for navi12

[Yuan, Xiaojie]

Signed-off-by: Xiaojie Yuan 
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 9eda82d4430e..384f8f512fc4 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -650,7 +650,8 @@ static int nv_common_early_init(void *handle)
AMD_CG_SUPPORT_ATHUB_LS |
AMD_CG_SUPPORT_VCN_MGCG;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
-   AMD_PG_SUPPORT_VCN_DPG;
+   AMD_PG_SUPPORT_VCN_DPG |
+   AMD_PG_SUPPORT_ATHUB;
adev->external_rev_id = adev->rev_id + 0xa;
break;
default:
-- 
2.20.1

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[PATCH 1/3] drm/amdgpu: enable vcn powergating for navi12

[Yuan, Xiaojie]

Signed-off-by: Xiaojie Yuan 
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index a3d99f2ddf6b..9eda82d4430e 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -649,7 +649,8 @@ static int nv_common_early_init(void *handle)
AMD_CG_SUPPORT_ATHUB_MGCG |
AMD_CG_SUPPORT_ATHUB_LS |
AMD_CG_SUPPORT_VCN_MGCG;
-   adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
+   adev->pg_flags = AMD_PG_SUPPORT_VCN |
+   AMD_PG_SUPPORT_VCN_DPG;
adev->external_rev_id = adev->rev_id + 0xa;
break;
default:
-- 
2.20.1

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[PATCH 3/3] drm/amd/powerplay: enable jpeg powergating for navi1x

[Yuan, Xiaojie]

jpeg pg depends on vcn pg

Signed-off-by: Xiaojie Yuan 
---
 drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c 
b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 2d908afbf525..1970843f225f 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -368,7 +368,8 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
 
if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
-   *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
+   *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT)
+   | FEATURE_MASK(FEATURE_JPEG_PG_BIT);
 
/* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
if (is_asic_secure(smu)) {
-- 
2.20.1

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[PATCH 2/3] drm/amd/display: remove unused function setFieldWithMask

[YueHaibing]

After commit a9f54ce3c603 ("drm/amd/display: Refactoring VTEM"),
there is no caller in tree.

Reported-by: Hulk Robot 
Signed-off-by: YueHaibing 
---
 .../drm/amd/display/modules/info_packet/info_packet.c | 19 ---
 1 file changed, 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c 
b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
index 5f4b98d..d885d64 100644
--- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
+++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
@@ -114,25 +114,6 @@ enum ColorimetryYCCDP {
ColorimetryYCC_DP_ITU2020YCbCr  = 7,
 };
 
-void setFieldWithMask(unsigned char *dest, unsigned int mask, unsigned int 
value)
-{
-   unsigned int shift = 0;
-
-   if (!mask || !dest)
-   return;
-
-   while (!((mask >> shift) & 1))
-   shift++;
-
-   //reset
-   *dest = *dest & ~mask;
-   //set
-   //dont let value span past mask
-   value = value & (mask >> shift);
-   //insert value
-   *dest = *dest | (value << shift);
-}
-
 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
struct dc_info_packet *info_packet)
 {
-- 
2.7.4

[PATCH] drm/amd: remove meaningless descending into amd/amdkfd/

[Masahiro Yamada]

Since commit 04d5e2765802 ("drm/amdgpu: Merge amdkfd into amdgpu"),
drivers/gpu/drm/amd/amdkfd/Makefile does not contain any syntax that
is understood by the build system.

Signed-off-by: Masahiro Yamada 
---

 drivers/gpu/drm/Makefile | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 9f0d2ee35794..3f9195b7ad13 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -62,7 +62,6 @@ obj-$(CONFIG_DRM_TTM) += ttm/
 obj-$(CONFIG_DRM_SCHED)+= scheduler/
 obj-$(CONFIG_DRM_TDFX) += tdfx/
 obj-$(CONFIG_DRM_R128) += r128/
-obj-$(CONFIG_HSA_AMD) += amd/amdkfd/
 obj-$(CONFIG_DRM_RADEON)+= radeon/
 obj-$(CONFIG_DRM_AMDGPU)+= amd/amdgpu/
 obj-$(CONFIG_DRM_MGA)  += mga/
-- 
2.17.1