Except patch2, series is reviewed-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, October 10, 2019 11:26 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 5/5] drm/amdgpu/soc15: add support for baco reset with swSMU
IP Discovery data is TMR fenced by the latest PSP BL,
so we need to reserve this region.
Tested on navi10/12/14 with VBIOS integrated with latest PSP BL.
v2: use DISCOVERY_TMR_SIZE macro as bo size
use amdgpu_bo_create_kernel_at() to allocate bo
Signed-off-by: Xiaojie Yuan
Reviewed-by:
> There are cases were we don't want it.
Typo: were -> where?
-Original Message-
From: Quan, Evan
Sent: Friday, October 11, 2019 12:07 PM
To: Alex Deucher ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: RE: [PATCH 2/5] drm/amdgpu: move gpu reset out of
It seems amdgpu_pmops_runtime_suspend() needs to be updated accordingly also.
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, October 10, 2019 11:26 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 2/5] drm/amdgpu: move gpu reset out
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Dennis Li
Sent: 2019年10月11日 10:49
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Zhou1, Tao ; Zhang, Hawking
; Chen, Guchun
Cc: Li, Dennis
Subject: [PATCH 0/3] RAS Support for GFX blocks
1.
From: "Tianci.Yin"
add memory training implementation code to save resume time.
Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 ++
From: "Tianci.Yin"
add interface for memory training.
Change-Id: Ibb6d1d24eb651df796bc2bb3419a44937af60242
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 18
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 55 +
2
From: "Tianci.Yin"
memory training using specific fixed vram segment, reserve these
segments before anyone may allocate it.
Change-Id: I1436755813a565608a2857a683f535377620a637
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 96
From: "Tianci.Yin"
add new vram_reserve_block structure and atomfirmware_internal_constants
enumeration
Change-Id: I6ba642ecd7ad94250162ae5c322ed8d85de9c35a
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/include/atomfirmware.h | 28 +-
1 file
From: "Tianci.Yin"
parse firmware to get memory training capability and fb location.
Change-Id: I147c1d48e255e0191be4beb1ad6b637da607bf75
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +
From: "Tianci.Yin"
add a generic helper function for accessing framebuffer via MMIO
Change-Id: I4baa0aa53c93a94c2eff98c6211a61f369239982
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Reviewed-by: Kenneth Feng
-Original Message-
From: Wang, Kevin(Yang)
Sent: Friday, October 11, 2019 8:52 AM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Zhang, Hawking
; Hesik, Christopher ; Wang,
Kevin(Yang)
Subject: [PATCH] drm/amdgpu/swSMU: custom UMD pstate peak clock
From: "Tianci.Yin"
update amdgpu_discovery to get IP revision.
Change-Id: If8152103d03b58e1dc0f32db63625e290f5f08a0
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h | 2 +-
2 files
From: "Tianci.Yin"
introduce psp_v11_0_is_sos_alive func for common use.
Change-Id: Iee0a6dd924d6a4b164eb751c0bec49fcb7d79483
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 22 +-
1 file changed, 13 insertions(+), 9
Add codes to query the EDC count of VML2 & ATCL2
Change-Id: If2c251481ba0a1a34ce3405a85f86d65eecee461
Signed-off-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 167 ++
1 file changed, 167 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
For the potential request in the future, change to
query the actual EDC counter.
Change-Id: I783ccd76f4c65f9829f7a8967a539a23ae5484b5
Signed-off-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 819 --
drivers/gpu/drm/amd/amdgpu/soc15.h| 2 +
2 files
Add VML2 and ATCL2 ECC registers to support VEGA20 RAS
Change-Id: I8860f2e37fa7afd8d6123290fb7b9dcee56edd6e
Signed-off-by: Dennis Li
---
.../amd/include/asic_reg/gc/gc_9_0_offset.h| 18 --
.../amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 18 --
2 files
1. Add the EDC count from hardware.
2. Add RAS support for VML2 amd ATCL2 sub blocks.
Dennis Li (3):
drm/amdgpu: change to query the actual EDC counter
drm/amd/include: add register define for VML2 and ATCL2
drm/amdgpu: add RAS support for VML2 and ATCL2
We are able to power down the GPU and audio via the GPU driver
so flag these asics as supporting runtime pm.
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 35 ++-
1 file changed, 30 insertions(+), 5 deletions(-)
diff --git
Check the BACO capabilities from the powerplay table.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 46206a1a1f4d..68c18f5f4b41 100644
---
To better match what we are checking for and to align with
amdgpu_device_supports_baco.
BACO - Bus Active, Chip Off
BOCO - Bus Off, Chip Off
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8
So that we can power down the GPU and audio to save power.
Signed-off-by: Alex Deucher
---
sound/pci/hda/patch_hdmi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index bea7b0961080..26613733f109 100644
---
Everything is in place now. Not enabled by default yet. You
still have to specify runpm=1.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
We will take slightly different paths for boco and baco.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 46 ++---
1 file changed, 26 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
Originally we only supported runtime pm on PX/HG laptops
so vga_switcheroo and runtime pm are sort of entangled.
Attempt to logically separate them.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 ++
1 file changed, 14 insertions(+), 8
We originally only supported runtime pm on PX/HG
laptops so most of the runtime pm code looks for this.
Add a new flag to check for runtime pm enablement and
use this rather than checking for PX/HG.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
Will be used for runtime pm.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 61 ++
2 files changed, 63 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
Seems to work reliably on VI+.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 63ae8fd76e53..25cf4df4f781
Only enable the vga_switcheroo logic on systems with the
ATPX ACPI method. This logic is not needed for asics
that are not part of a PX (PowerXpress)/HG (Hybrid Graphics)
platform.
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 39 +++
1 file
To check if a device supports BACO or not. This will be
used in determining when to enable runtime pm.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15 +++
2 files changed, 16 insertions(+)
diff
Check the BACO capabilities from the powerplay table.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 78e5cdc0c058..871c0b8c6b0b
This patch set enables BACO (Bus Active Chip Off) for
power savings on VI+ asics. Similar to PowerXpress
and Hybrid Graphics (PX/HG) laptops, we can disable GPUs
at runtime when they are not in use is they support
BACO. The runtime pm code in amdgpu was originally
developed for PX/HG laptops, so
This adds the necessary support to the runtime suspend
and resume functions to handle boards that support
baco.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
Used to check whether the device supports BACO. This will
be used to enable runtime pm on devices which support BACO.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
Check the BACO capabilities from the powerplay table.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index
Check the BACO capabilities from the powerplay table.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index fc8b34480f66..423ff97ac7dc
Not supported.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/si.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 493af42152f2..401e43255a64 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++
This adds BACO support for Iceland asics.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/hwmgr/tonga_baco.c | 54 ---
1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c
This adds BACO support for CI asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 3 +-
drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c | 227 ++
drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h | 32 +++
3 files changed, 261 insertions(+), 1
Use BACO to reset the GPU if supported on SMU7 based
dGPUs.
v2: don't use baco on CI parts
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 48 --
drivers/gpu/drm/amd/amdgpu/cik.h | 3 ++
drivers/gpu/drm/amd/amdgpu/vi.c | 84 ++--
Several of the BACO functions are common across smu7-based
asics. Split the common code out.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c | 34 +--
drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h | 5 +-
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h | 1 +
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h | 1 +
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h
Wire up the powerplay callbacks for for BACO for smu7 devices.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
This patch set enables BACO CI and VI asics. BACO is
Bus Active Chip Off. It allows us to turn off the GPU
while still keeping the bus interface up, so the device
does not disappear from the system. PowerXpress and
Hybrid Graphics laptops support BOCO (Bus Off Chip Off)
which is controlled by
This adds core support for BACO on pre-vega asics.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/hwmgr/common_baco.c | 19 +++
.../gpu/drm/amd/powerplay/hwmgr/common_baco.h | 13 +
2 files changed, 32 insertions(+)
diff --git
This adds BACO support for Polaris asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
.../drm/amd/powerplay/hwmgr/polaris_baco.c| 218 ++
.../drm/amd/powerplay/hwmgr/polaris_baco.h| 32 +++
3 files changed, 251 insertions(+),
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h | 1 +
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h
This adds BACO support for VegaM asics.
Signed-off-by: Alex Deucher
---
.../drm/amd/powerplay/hwmgr/polaris_baco.c| 42 +--
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c
This adds BACO support for Fiji asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
.../gpu/drm/amd/powerplay/hwmgr/fiji_baco.c | 228 ++
.../gpu/drm/amd/powerplay/hwmgr/fiji_baco.h | 32 +++
3 files changed, 261 insertions(+), 1
This adds BACO support for Tonga.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +-
.../gpu/drm/amd/powerplay/hwmgr/tonga_baco.c | 221 ++
.../gpu/drm/amd/powerplay/hwmgr/tonga_baco.h | 32 +++
3 files changed, 254 insertions(+), 1
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h | 1 +
drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h | 1 +
drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h
add navi14 umd pstate peak clock support.
NAVI14_UMD_PSTATE_PEAK_XT_GFXCLK 1670 MHz
NAVI14_UMD_PSTATE_PEAK_XTM_GFXCLK 1448 MHz
NAVI14_UMD_PSTATE_PEAK_XLM_GFXCLK 1181 MHz
NAVI14_UMD_PSTATE_PEAK_XTX_GFXCLK 1717 MHz
NAVI14_UMD_PSTATE_PEAK_XL_GFXCLK 1448 MHz
Signed-off-by: Kevin Wang
---
Hello,
I've built recently a new box with a Ryzen3 2200G APU.
Each time I plug in an HDMI cable ( to a TV or Monitor ),
or boot with HDMI connected a lot ASSERT()'s from
write_i2c*retimer_setting() functions are triggered.
I see the same on a Laptop with a Ryzen7 3750H with
hybrid GPU
During kexec some adapters hit an EEH since they are not properly
shut down in the radeon_pci_shutdown() function. Adding
radeon_suspend_kms() fixes this issue.
Enabled only on PPC because this patch causes issues on some other
boards.
Signed-off-by: Kyle Mahlkuch
---
Bail from the pci_driver probe function instead of from the drm_driver
load function.
This avoid /dev/dri/card0 temporarily getting registered and then
unregistered again, sending unwanted add / remove udev events to
userspace.
Specifically this avoids triggering the (userspace) bug fixed by
On Thu, Oct 10, 2019 at 6:28 PM Hans de Goede wrote:
>
> Bail from the pci_driver probe function instead of from the drm_driver
> load function.
>
> This avoid /dev/dri/card0 temporarily getting registered and then
> unregistered again, sending unwanted add / remove udev events to
> userspace.
>
On 2019-10-09 7:09 p.m., Yuan, Xiaojie wrote:
sdma will hang once sequence number to be polled reaches 0x1000_
Signed-off-by: Xiaojie Yuan
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Thanks for looking at this Christian. Let me know if there's anything I
can do to help.
In the meantime, is there a workaround to avoid the memory leak other than
using a kernel from before the HMM change?
Thanks,
-Joe
On Fri, Oct 4, 2019 at 8:02 AM Koenig, Christian
wrote:
> Hi Philip,
>
>
for amdgpu_device_suspend. This follows the logic
in the resume path.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Move it into the caller. There are cases were we don't
want it. We need it for hibernation, but we don't need
it for runtime pm.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 7 ++-
2 files changed, 6
While cleaning up the runtime pm code in amdgpu,
I came across a few things. These patches fix
them up. Please review!
Alex Deucher (5):
drm/amdgpu: move pci_save_state into suspend path
drm/amdgpu: move gpu reset out of amdgpu_device_suspend
drm/amdgpu: simplify ATPX detection
Add support for vega20 when the swSMU path is used.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 53 +++---
1 file changed, 34 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
It was a vega20 specific hack. Check if we are in reset
and what reset method we are using.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 --
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 --
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c |
Use the base class rather than the specific class and drop
the second loop.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
Use the dcn21 functions in dcn21_resource.c and make the
dcn20 functions static since they are only used in
dcn20_resource now.
Cc: bhawanpreet.la...@amd.com
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 6 --
there are two paths for renoir dc access smu.
one dc access smu directly using bios smc
interface: set disply, dprefclk, etc.
another goes through pplib for get dpm clock
table and set watermmark.
Signed-off-by: Hersen Wu
---
.../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 16 +---
On Thu, Oct 10, 2019 at 4:37 PM Koenig, Christian
wrote:
> Am 10.10.19 um 16:34 schrieb Alex Deucher:
> > AOn Thu, Oct 10, 2019 at 5:54 AM Daniel Vetter
> > wrote:
> >> On Thu, Oct 10, 2019 at 6:17 AM Alex Deucher wrote:
> >>> [SNIP]
> >>> Christian König (22):
> >>>drm/amdgpu: use
Am 10.10.19 um 16:34 schrieb Alex Deucher:
> AOn Thu, Oct 10, 2019 at 5:54 AM Daniel Vetter wrote:
>> On Thu, Oct 10, 2019 at 6:17 AM Alex Deucher wrote:
>>> [SNIP]
>>> Christian König (22):
>>>drm/amdgpu: use moving fence instead of exclusive for VM updates
>>>drm/amdgpu:
AOn Thu, Oct 10, 2019 at 5:54 AM Daniel Vetter wrote:
>
> On Thu, Oct 10, 2019 at 6:17 AM Alex Deucher wrote:
> >
> > Hi Dave, Daniel,
> >
> > New stuff for 5.5. There's an export of a cgroup function that
> > Tejun acked for merging through the drm tree. kfd uses it to handle
> > permissions
On Thu, Oct 10, 2019 at 9:12 AM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> @swap@
> identifier TEMP;
> expression A,B;
> @@
> - TEMP = A;
> - A = B;
> - B = TEMP;
> + swap(A, B);
>
> @@
> type T;
> identifier swap.TEMP;
> @@
> (
> - T TEMP;
> |
> - T TEMP = {...};
> )
> ... when != TEMP
>
Applied. Thanks!
Alex
On Thu, Oct 10, 2019 at 9:48 AM Kazlauskas, Nicholas
wrote:
>
> On 2019-10-10 9:11 a.m., Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Mostly a cocci-job, but it flat out refused to remove the
> > declaration in drivers/gpu/drm/amd/display/dc/core/dc.c so
> > had
On 2019-10-10 9:11 a.m., Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Mostly a cocci-job, but it flat out refused to remove the
> declaration in drivers/gpu/drm/amd/display/dc/core/dc.c so
> had to do that part manually.
>
> @swap@
> identifier TEMP;
> expression A,B;
> @@
> - TEMP = A;
> - A
From: Ville Syrjälä
@swap@
identifier TEMP;
expression A,B;
@@
- TEMP = A;
- A = B;
- B = TEMP;
+ swap(A, B);
@@
type T;
identifier swap.TEMP;
@@
(
- T TEMP;
|
- T TEMP = {...};
)
... when != TEMP
Cc: Rex Zhu
Cc: Evan Quan
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
From: Ville Syrjälä
Mostly a cocci-job, but it flat out refused to remove the
declaration in drivers/gpu/drm/amd/display/dc/core/dc.c so
had to do that part manually.
@swap@
identifier TEMP;
expression A,B;
@@
- TEMP = A;
- A = B;
- B = TEMP;
+ swap(A, B);
@@
type T;
identifier swap.TEMP;
@@
(
Thanks Alex. I'll try to use the new api and send v2 patch.
BR,
Xiaojie
From: Alex Deucher
Sent: Thursday, October 10, 2019 8:57 PM
To: Yuan, Xiaojie
Cc: amd-gfx@lists.freedesktop.org ; Xiao, Jack
; Zhang, Hawking
Subject: Re: [PATCH] drm/amdgpu/discovery:
On Thu, Oct 10, 2019 at 8:48 AM Yuan, Xiaojie wrote:
>
> IP Discovery data is TMR fenced by the latest PSP BL,
> so we need to reserve this region.
>
> Signed-off-by: Xiaojie Yuan
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 15
Please add define on tmr memory size instead of hard-code. Other than that the
patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Yuan, Xiaojie
Sent: 2019年10月10日 20:48
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Xiao, Jack ;
Yuan, Xiaojie
IP Discovery data is TMR fenced by the latest PSP BL,
so we need to reserve this region.
Signed-off-by: Xiaojie Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 15 +++
2 files changed, 16 insertions(+)
diff --git
amdgpu_vm_handle_fault should return true on success
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index
Great. thanks!
Alex
From: Feng, Kenneth
Sent: Thursday, October 10, 2019 3:00 AM
To: Yuan, Xiaojie ; Deucher, Alexander
; amd-gfx@lists.freedesktop.org
Cc: Xiao, Jack ; Wang, Kevin(Yang) ;
Zhang, Hawking ; Quan, Evan
Subject: RE: [PATCH 2/2]
On 10/10/19 1:19 PM, Koenig, Christian wrote:
> Am 10.10.19 um 12:42 schrieb Nirmoy Das:
>> amdgpu_vm_handle_fault should return true on success
> NAK, that is intentional.
>
> There is a follow up patch which didn't made it into our server branch
> which implements faults handling.
In that case
Am 10.10.19 um 12:42 schrieb Nirmoy Das:
> amdgpu_vm_handle_fault should return true on success
NAK, that is intentional.
There is a follow up patch which didn't made it into our server branch
which implements faults handling.
We could actually change the return value to void until that one
On Thu, Oct 10, 2019 at 6:17 AM Alex Deucher wrote:
>
> Hi Dave, Daniel,
>
> New stuff for 5.5. There's an export of a cgroup function that
> Tejun acked for merging through the drm tree. kfd uses it to handle
> permissions in containers since there is only one /dev/kfd.
>
> The following
Hi Alex,
This issue was navi10 specific and was found in May, 2019.
It was early after the asic back, then since gfxoff was removed from navi10, we
didn't really verify which firmware version started to have a fix.
For navi14/navi12, there's no such issue at all.
Sorry for losing the track of it.
Hi Yizhuo,
Am 10.10.19 um 07:09 schrieb Yizhuo Zhai:
> Hi All:
> drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:
> The function to_amdgpu_fence() could return NULL, but callers
> in this file does not check the return value but directly dereference it,
> which seems potentially unsafe.
> Such callers
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Quan,
Evan
Sent: Thursday, October 10, 2019 11:45 AM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan
Subject: [PATCH 1/2] drm/amd/powerplay: enable df cstate control
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Quan,
Evan
Sent: Thursday, October 10, 2019 11:45 AM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan
Subject: [PATCH 2/2] drm/amd/powerplay: enable df cstate control
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