ping for a review of the i915 patches
Am 01.12.20 um 11:35 schrieb Thomas Zimmermann:
Using struct drm_device.pdev is deprecated. Convert i915 to struct
drm_device.dev. No functional changes.
v2:
* move gt/ and gvt/ changes into separate patches
Signed-off-by: Thomas Zimmermann
Cc:
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Jiansong Chen
-Original Message-
From: Zhou1, Tao
Sent: Monday, December 7, 2020 2:06 PM
To: Chen, Jiansong (Simon) ; Gui, Jack
; Zhang, Hawking ;
amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao
Subject: [PATCH]
Am 08.12.20 um 03:50 schrieb Chen Lei:
Add the AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag in amdgpu_gem_create_ioctl.
Signed-off-by: Chen Lei
NAK, that is not missing but intentionally blocked.
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 1 +
1 file changed, 1 insertion(+)
Liu, Aaron would like to recall the message, "[PATCH 6/8] drm/amd/pm: add
yellow_carp_ppt implementation(V3)".
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Liu, Aaron would like to recall the message, "[PATCH 5/8] drm/amd/pm: add smu13
ip support for moment(V3)".
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yellow_carp_ppt is swsmu layer 2 code for yellow carp.
V2: rename smu_v13_0 to smu_v13_0_1
V3: cleanup code.
Signed-off-by: Aaron Liu
Acked-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile | 2 +-
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 166
For supporting yellow carp, we need to add smu13 ip
support for the moment.
V2: add smu_v13_0_1.c|h dedicated for apu.
V3: cleanup code.
Signed-off-by: Aaron Liu
Acked-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/pm/Makefile | 1 +
[AMD Public Use]
Hi Hawking,
The process is to send request first, and then to poll and wait 6 seconds.
So the time delta between the 1-st request and the 11-th request is actually 60
seconds.
Jiange
From: Zhang, Hawking
Sent: Tuesday, December 8, 2020 12:16
Add the AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag in amdgpu_gem_create_ioctl.
Signed-off-by: Chen Lei
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index
[AMD Public Use]
Reviewed-by: Tao Zhou
> -Original Message-
> From: amd-gfx On Behalf Of
> Stanley.Yang
> Sent: Monday, December 7, 2020 2:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yang, Stanley
> Subject: [PATCH 1/1] drm/amdgpu: fix sdma instance fw version and feature
>
[AMD Public Use]
Hi Simon,
It looks to me I'm kinda late to the party to look at your questions under
https://lists.freedesktop.org/archives/amd-gfx/2020-November/056032.html...
Does the commit below and
https://lists.freedesktop.org/archives/amd-gfx/2020-December/057048.html mean
the above
After refactor our amdgpu_dm_atomic_commit, this function only invoke
drm_atomic_helper_commit. For this reason, this commit drops
amdgpu_dm_atomic_commit and add drm_atomic_helper_commit directly in the
atomic_commit hook.
Signed-off-by: Rodrigo Siqueira
---
On Mon, Dec 7, 2020 at 11:08 PM 'Nick Desaulniers' via Clang Built
Linux wrote:
>
> On Mon, Dec 7, 2020 at 1:57 PM Arnd Bergmann wrote:
> >
> > Right, looking at my latest randconfig logs, I see the same problem on x86
> > builds with clang as well, though I'm not entirely sure which other
> >
On Mon, Dec 7, 2020 at 9:50 PM Christian König wrote:
> Am 07.12.20 um 21:47 schrieb Alex Deucher:
> > On Fri, Dec 4, 2020 at 3:13 AM Arnd Bergmann wrote:
> >> From: Arnd Bergmann
> >>
> >> As the DRM_AMD_DC_DCN3_0 code was x86-only and fails to build on
> >> arm64, merging it into DRM_AMD_DC
On 2020-12-04 3:13 a.m., Christian König wrote:
> Thinking more about that I came to the conclusion that the whole
> approach here isn't correct.
>
> See even when the job has been completed or canceled we still want to
> restart the timer.
>
> The reason for this is that the timer is then not
Am 07.12.20 um 21:47 schrieb Alex Deucher:
On Fri, Dec 4, 2020 at 3:13 AM Arnd Bergmann wrote:
From: Arnd Bergmann
As the DRM_AMD_DC_DCN3_0 code was x86-only and fails to build on
arm64, merging it into DRM_AMD_DC means that the top-level symbol
is now x86-only as well.
Compilation fails on
On Fri, Dec 4, 2020 at 3:13 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> As the DRM_AMD_DC_DCN3_0 code was x86-only and fails to build on
> arm64, merging it into DRM_AMD_DC means that the top-level symbol
> is now x86-only as well.
>
> Compilation fails on arm64 with clang-12 with
>
>
On 2020-12-07 3:03 p.m., roman...@amd.com wrote:
From: Roman Li
[Why]
Scatter/gather feature is supported on Vangogh.
[How]
Add GTT domain support for Vangogh to enable
display buffers in system memory.
Signed-off-by: Roman Li
Series is:
Reviewed-by: Nicholas Kazlauskas
Regards,
From: Roman Li
[Why]
Scatter/gather feature is supported on Vangogh.
[How]
Add GTT domain support for Vangogh to enable
display buffers in system memory.
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Roman Li
[Why]
Scatter/gather is APU feature.
But in dm it is limited only to Renoir.
Now we need it for Vangogh.
[How]
Apply system context setup in dm_init to all APUs.
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1
On 2020-12-04 3:16 a.m., Christian König wrote:
> Am 04.12.20 um 04:17 schrieb Luben Tuikov:
>> The drm_sched_job_done() callback now moves done
>> jobs from the pending list to a "done" list.
>>
>> In drm_sched_job_timeout, make use of the status
>> returned by a GPU driver job timeout handler to
On 12/7/20 2:19 PM, Christian König wrote:
Am 07.12.20 um 20:09 schrieb Andrey Grodzovsky:
On 12/7/20 1:04 PM, Christian König wrote:
Am 07.12.20 um 17:00 schrieb Andrey Grodzovsky:
On 12/7/20 6:13 AM, Christian König wrote:
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20
Am 07.12.20 um 20:09 schrieb Andrey Grodzovsky:
On 12/7/20 1:04 PM, Christian König wrote:
Am 07.12.20 um 17:00 schrieb Andrey Grodzovsky:
On 12/7/20 6:13 AM, Christian König wrote:
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20 3:13 AM, Christian König wrote:
Thinking more
On 12/7/20 1:04 PM, Christian König wrote:
Am 07.12.20 um 17:00 schrieb Andrey Grodzovsky:
On 12/7/20 6:13 AM, Christian König wrote:
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20 3:13 AM, Christian König wrote:
Thinking more about that I came to the conclusion that the whole
Am 07.12.20 um 17:00 schrieb Andrey Grodzovsky:
On 12/7/20 6:13 AM, Christian König wrote:
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20 3:13 AM, Christian König wrote:
Thinking more about that I came to the conclusion that the whole
approach here isn't correct.
See even when
On Mon, Dec 07, 2020 at 02:53:28PM +, Simon Ser wrote:
> Hi,
>
> On Monday, December 7th, 2020 at 3:51 PM, Dan Carpenter
> wrote:
>
> > The patch adds some new unchecked dereferences.
>
> The `if (!position.enable)` check above should ensure the dereference
> isn't unchecked.
Yeah.
On Mon, Dec 7, 2020 at 1:07 AM Tao Zhou wrote:
>
> Per PMFW 59.16.0.
>
> Signed-off-by: Tao Zhou
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
>
On Mon, Dec 7, 2020 at 1:47 AM Stanley.Yang wrote:
>
> each sdma instance fw_version and feature_version
> should be set right value when asic type isn't
> between SIENNA_CICHILD and CHIP_DIMGREY_CAVEFISH
>
> Signed-off-by: Stanley.Yang
> Change-Id: I1edbf3e0557d771eb4c0b686fa5299a3b5f26e35
[AMD Public Use]
Re - Poll happens every 6 seconds and it will last for 60 seconds.
+ int ret, i = 0;
+ #define AI_MAILBOX_POLL_MSG_REP_MAX 11
The definition seems not match with your description that the polling will last
for 60s with that fixed, the patch is
Acked-by:
[AMD Official Use Only - Internal Distribution Only]
Thanks for pointing that out!
Eryk
From: Deucher, Alexander
Sent: Monday, December 7, 2020 9:40 AM
To: Brol, Eryk ; amd-gfx@lists.freedesktop.org
Cc: Liu, Charlene ; Li, Sun peng (Leo)
; Wentland, Harry ;
AMD\ramini (1):
drm/amd/display: Set FixRate bit in VSIF V3
Please ask Reza to configure his git with his real name.
Harry
On 2020-12-04 4:28 p.m., Eryk Brol wrote:
This DC patchset brings improvements in multiple areas.
In summary, we highlight:
* Fixes in MST, Compliance, HDCP, audio;
On 12/7/20 6:13 AM, Christian König wrote:
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20 3:13 AM, Christian König wrote:
Thinking more about that I came to the conclusion that the whole approach
here isn't correct.
See even when the job has been completed or canceled we still
Hi,
On Monday, December 7th, 2020 at 3:51 PM, Dan Carpenter
wrote:
> The patch adds some new unchecked dereferences.
The `if (!position.enable)` check above should ensure the dereference
isn't unchecked.
Simon
___
amd-gfx mailing list
Hello Simon Ser,
This is a semi-automatic email about new static checker warnings.
The patch 03a663673063: "drm/amd/display: use FB pitch to fill
dc_cursor_attributes" from Dec 2, 2020, leads to the following Smatch
complaint:
[AMD Official Use Only - Internal Distribution Only]
We've dropped the CONFIG_DRM_AMD_DC_DCN3* kconfig options recently.
Alex
From: amd-gfx on behalf of Eryk Brol
Sent: Friday, December 4, 2020 4:28 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Charlene ;
[AMD Public Use]
>* BIT 24-31: ControllerId (hardcoded as PPT0)
May be reworded as 'only PPT0 is supported'. Apart from that
Series is Reviewed-by: Lijo Lazar
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent: Monday, December 7, 2020 2:53 PM
To:
[AMD Public Use]
Reviewed-by: Lijo Lazar
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Monday, December 7, 2020 12:12 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Kevin(Yang)
Subject: [PATCH] drm/amdgpu/pm: add smc v2_1 printer in
amdgpu_ucode_print_smc_hdr()
Am 04.12.20 um 16:10 schrieb Andrey Grodzovsky:
On 12/4/20 3:13 AM, Christian König wrote:
Thinking more about that I came to the conclusion that the whole
approach here isn't correct.
See even when the job has been completed or canceled we still want to
restart the timer.
The reason for
From: Jiange Zhao
In Virtualization case, when one VF is sending too many
FLR requests, hypervisor would stop responding to this
VF's request for a long period of time. This is called
event guard. During this period of cooling time, guest
driver should wait instead of doing other things. After
Correct the power limit setting for SMU V11 asics.
Change-Id: Idedc590c35934397bd77b7ac825b063cd319dbbf
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git
Enable power source switch on Sienna Cichlid.
Change-Id: Ic48821c61f3f1f65f7f5d78bac28e11ce400b4b2
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
[AMD Public Use]
+ while (i < 11)
Please use macro to replace the magic number. No one want to play with the code
which need some sort of guess to figure out hack setting or experimental ones.
Regards,
Hawking
From: amd-gfx On Behalf Of Zhao, Jiange
Sent: Monday, December 7, 2020 16:15
[AMD Official Use Only - Internal Distribution Only]
From: Koenig, Christian
Sent: Monday, December 7, 2020 4:23 PM
To: Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: change trace event parameter name from
'driect' to
Am 07.12.20 um 07:56 schrieb Kevin Wang:
s/direct/immediate/g
amdgpu vm has renamed parameter name from 'direct' to 'immedate'.
however, the trace event is not updated yet.
Signed-off-by: Kevin Wang
There is a small typo in the subject line "driect", apart from that the
patch is Reviewed-by:
[AMD Official Use Only - Internal Distribution Only]
ping!
From: Zhao, Jiange
Sent: Wednesday, November 25, 2020 10:10 PM
To: amd-gfx@lists.freedesktop.org
Cc: Min, Frank ; Chen, Horace ; Zhang,
Andy ; Zhao, Jiange
Subject: [PATCH] drm/amdgpu/SRIOV: Extend VF
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