[AMD Official Use Only]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: Sider, Graham
Sent: Thursday, July 8, 2021 1:39 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish ; Sider, Graham
Subject: [PATCH] drm/amdkfd: Update SMI throttle event bitmask
On 2021-07-20 10:30 a.m., Anson Jacob wrote:
> Fix make htmldocs complaint:
> ./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:628: warning: Excess
> function parameter 'interrupt_params' description in 'DMUB_TRACE_MAX_READ'
>
> v2:
> Moved DMUB_TRACE_MAX_READ macro above function
On 2021-07-20 11:25 a.m., Anson Jacob wrote:
> link_rate is updated via debugfs using hex values, set it to output
> in hex as well.
>
> eg: Resolution: 1920x1080@144Hz
> cat /sys/kernel/debug/dri/0/DP-1/link_settings
> Current: 4 0x14 0 Verified: 4 0x1e 0 Reported: 4 0x1e 16
>
On 2021-07-20 11:45 a.m., Anson Jacob wrote:
> Add new line to phy_settings output
>
> Signed-off-by: Anson Jacob
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
This information is useful for root causing issues with S0ix.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
This information is useful for root causing issues with S0ix.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
From: Lang Yu
Enable SMU support for cyan_skilfish.
v2: Squash in fix (Alex)
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 17 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4
2 files changed,
Add new line to phy_settings output
Signed-off-by: Anson Jacob
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
From: Lang Yu
Asic cyan_skilfish2 won't support RLC autoload when using
front door loading. We just use PSP to load firmware like
gfx9 here.
So add autoload_supported flag check instead of just
checking firmware load type for RLC autoload.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
From: Lang Yu
Add check_fw_version function support for cyan_skillfish.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 1 +
From: Tao Zhou
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index
From: Lang Yu
Add smu11_driver_if_cyan_skillfish.h for cyan_skilfish.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
.../pm/inc/smu11_driver_if_cyan_skillfish.h | 95 +++
1 file changed, 95 insertions(+)
create mode 100644
From: Tao Zhou
Set cg/pg flags and rev id for cyan_skillfish.
Signed-off-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index
From: Tao Zhou
Add gmc support for cyan_skillfish.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
From: Lang Yu
Introduce the psp v11.0.8 driver for cyan_skillfish.
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 1 +
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c | 208 +++
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.h | 30
From: Lang Yu
Add basic ppt funcs support or cyan_skilfish.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/Makefile | 1 +
.../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 75 +++
From: Lang Yu
Add psp v11.0.8 function into psp driver.
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
From: Tao Zhou
v2: squash in updates from Ray
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 47 ++
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Lang Yu
Add psp v11.0.8 to ip block initialization.
v2: use APU flags (Alex)
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c | 4
3
From: Lang Yu
Will switch to front door loading by default after this function is
stable.
v2: use APU flags (Alex)
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Lang Yu
Add smu_v11_8_pmfw.h for cyan_skilfish.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/inc/smu_v11_8_pmfw.h | 152
1 file changed, 152 insertions(+)
create mode 100644
From: Tao Zhou
nbio version is 2.3.
v2: Make it more explicit (Alex)
Signed-off-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Tao Zhou
Add KFD support for cyan_skillfish.
Signed-off-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 20 +++
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 1 +
From: Lang Yu
Add smu_v11_8_ppsmc.h for cyan_skilfish.
Signed-off-by: Lang Yu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/inc/smu_v11_8_ppsmc.h | 70
1 file changed, 70 insertions(+)
create mode 100644
From: Tao Zhou
Add ip offset definition for cyan_skillfish and initialize it.
v2: squash in ip_offset updates (Alex)
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
From: Tao Zhou
Same as Navi10.
v2: squash in updates (Alex)
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
From: Tao Zhou
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 36 ++
1 file changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
From: Lang Yu
The cyan_skillfish will use the mp 11.0.8.
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
.../include/asic_reg/mp/mp_11_0_8_offset.h| 352 ++
1 file changed, 352 insertions(+)
create mode 100644
From: Tao Zhou
Add cp/rlc fw loading support and gfx golden setting.
v2: squash in updates (Alex)
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 39 ++
1 file changed, 39 insertions(+)
From: Tao Zhou
Use FAMILY_NV for cyan_skillfish.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: Lang Yu
Adjust toc fw_name string length to PSP_FW_NAME_LEN.
Signed-off-by: Lang Yu
Reviewed-by: Tao Zhou
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Tao Zhou
Use backdoor loading.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
From: Tao Zhou
Add gfx support for cyan_skillfish.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Tao Zhou
Add cyan_skillfish asic family.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +
drivers/gpu/drm/amd/include/amd_shared.h | 1 +
include/drm/amd_asic_type.h| 17
From: Tao Zhou
Longer firmware name needs more space.
Signed-off-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
From: Tao Zhou
Add ip blocks for cyan_skillfish.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
This patch set adds support for Cyan Skillfish,
a new GPU from AMD.
Lang Yu (13):
drm/amdgpu: adjust fw_name string length for toc
drm/amdgpu: add mp 11.0.8 header for cyan_skillfish
drm/amdgpu: add psp v11.0.8 driver for cyan_skillfish
drm/amdgpu: init psp v11.0.8 function for
link_rate is updated via debugfs using hex values, set it to output
in hex as well.
eg: Resolution: 1920x1080@144Hz
cat /sys/kernel/debug/dri/0/DP-1/link_settings
Current: 4 0x14 0 Verified: 4 0x1e 0 Reported: 4 0x1e 16 Preferred:
0 0x0 0
echo "4 0x1e" >
Yeah, looks fine.
A few nitpicks:
The title seems too long. You can just say "Sienna Cichlid", as
opposed to using the macro name in the title.
Perhaps you can add Sienna Cichlid in the description of the
commit as well.
On
It looks good to me for the non-sriov part.
Regards,
Leo
On 2021-07-15 10:14 p.m., Zhou, Peng Ju wrote:
[AMD Official Use Only]
Hi @Liu, Leo
Can you help to review this patch?
Monk and Alex have reviewed it.
--
BW
Pengju
Fix make htmldocs complaint:
./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:628: warning: Excess
function parameter 'interrupt_params' description in 'DMUB_TRACE_MAX_READ'
v2:
Moved DMUB_TRACE_MAX_READ macro above function documentation
Signed-off-by: Anson Jacob
CC: Harry Wentland
---
Am 20.07.21 um 15:50 schrieb Daniel Vetter:
On Fri, Jul 16, 2021 at 09:14:02AM +0200, Christian König wrote:
Am 16.07.21 um 08:16 schrieb Christoph Hellwig:
The define is entirely unused.
Signed-off-by: Christoph Hellwig
I'm not an expert for this particular code, but at least of hand
Devices created by mfd_add_hotplug_devices() don't really increase the
index of its name, so get_mfd_cell_dev() cannot find any device, hence a
NULL dev is passed to pm_genpd_add_device():
[ 56.974926] (NULL device *): amdgpu: device acp_audio_dma.0.auto added to pm
domain
[ 56.974933] (NULL
[Why]
Currently all timedout job will be considered to be guilty. In SRIOV
multi-vf use case, the vf flr happens first and then job time out is
found. There can be several jobs timeout during a very small time slice.
And if the innocent sdma job time out is found before the real bad
job, then the
On Tue, Jul 20, 2021 at 10:30 AM Anson Jacob wrote:
>
> Fix make htmldocs complaint:
> ./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:628: warning: Excess
> function parameter 'interrupt_params' description in 'DMUB_TRACE_MAX_READ'
>
> v2:
> Moved DMUB_TRACE_MAX_READ macro above function
On Tue, Jul 20, 2021 at 9:34 AM Alex Deucher wrote:
>
> On Mon, Jul 19, 2021 at 11:34 PM Stylon Wang wrote:
> >
> > [Why]
> > Regression found in some embedded panels traces back to the earliest
> > upstreamed ASSR patch. The changed code flow are causing problems
> > with some panels.
> >
> >
[AMD Official Use Only]
Update inline
> -Original Message-
> From: amd-gfx On Behalf Of Roy Sun
> Sent: Tuesday, July 20, 2021 1:58 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Sun, Roy
> Subject: [PATCH] drm/amdgpu: Add error message when programing registers
> fails
>
>
On Fri, Jul 16, 2021 at 09:14:02AM +0200, Christian König wrote:
> Am 16.07.21 um 08:16 schrieb Christoph Hellwig:
> > The define is entirely unused.
> >
> > Signed-off-by: Christoph Hellwig
>
> I'm not an expert for this particular code, but at least of hand everything
> you do here makes
On Mon, Jul 19, 2021 at 11:34 PM Stylon Wang wrote:
>
> [Why]
> Regression found in some embedded panels traces back to the earliest
> upstreamed ASSR patch. The changed code flow are causing problems
> with some panels.
>
> [How]
> - Change ASSR enabling code while preserving original code flow
[AMD Official Use Only]
Hi Christian,
I agree that changing the priority is not the right way.
So to not consider paging job guilty, do you think it's OK to not
increase_karma for it(if (job->vmid == 0))?
Best Regards,
JingWen Chen
-Original Message-
From: Christian König
Sent:
Am 20.07.21 um 02:49 schrieb Rodrigo Siqueira:
DC invokes DC_FPU_START/END in multiple parts of the code; this can
create a situation where we invoke this FPU operation in a nested way or
exit too early. For avoiding this situation, this commit adds a
mechanism where dc_fpu_begin/end manages the
Am 20.07.21 um 02:49 schrieb Rodrigo Siqueira:
To fully isolate FPU operations in a single place, we must avoid
situations where compilers spill FP values to registers due to FP enable
in a specific C file. Note that even if we isolate all FPU functions in
a single file and call its interface
Am 20.07.21 um 13:02 schrieb Jingwen Chen:
[Why]
Currently all timedout job will be considered to be guilty. In SRIOV
multi-vf use case, the vf flr happens first and then job time out is
found. There can be several jobs timeout during a very small time slice.
And if the innocent sdma job time
Am 20.07.21 um 02:49 schrieb Rodrigo Siqueira:
We don't have any mechanism for tracing FPU operations inside the
display core, making the debug work a little bit tricky. This commit
introduces a trace mechanism inside our DC_FP_START/END macros for
trying to alleviate this problem.
Changes
Am 20.07.21 um 02:49 schrieb Rodrigo Siqueira:
The display core files rely on FPU, which requires to be compiled with
special flags. Ideally, we don't want these FPU operations spread around
the DC code; nevertheless, it happens in the current source. This commit
introduces a new directory named
In passthrough mode, if we unloaded driver in BACO mode(RTPM). Kernel would
receive thousands of unhandled interrupts. That's because there was
doorbell moniter interrupt on BIF, so KVM would keep injecting
interrupt to guest VM. So we should clear door bell interrupt status
after BACO exit.
[AMD Official Use Only]
Hi Christian,
Even if this is a userspace mapping, it's still packaged by the kernel, so it's
always assumed to be correct. In which case modifying the priority should have
no side effects. May I know the detailed reason for your concern?
And if we eventually decide
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..67a6fffd528b 100644
---
I would check (job->vm == NULL) instead, but yes something like that
should work.
Regards,
Christian.
Am 20.07.21 um 11:14 schrieb Chen, JingWen:
[AMD Official Use Only]
Hi Christian,
I agree that changing the priority is not the right way.
So to not consider paging job guilty, do you think
Hi JingWen,
you can look at the job->vm pointer to distinct an userspace submission
from a kernel submission.
The priority is not really related to the submission type, we just
happen to treat paging jobs with the highest priority since they are
important for the system as a whole.
On Mon, Jul 19, 2021 at 03:52:10PM -0400, Anson Jacob wrote:
> - Add kernel_fpu_begin & kernel_fpu_end API as x86
> - Add logic similar to x86 to ensure fpu
> begin/end call correctness
> - Add kernel_fpu_enabled to know if FPU is enabled
>
> Signed-off-by: Anson Jacob
All the x86 FPU support
no need to get error code when IS_ERR is false
Signed-off-by: Cai Huoqing
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index
> #define DC_FP_END() kernel_fpu_end()
> #elif defined(CONFIG_PPC64)
> #include
> +#define DC_FP_START() kernel_fpu_begin()
> +#define DC_FP_END() kernel_fpu_end()
> #endif
Please use the same header as x86 in your first patch and then kill
this ifdefered and the DC_FP_START/DC_FP_END
[Why]
Regression found in some embedded panels traces back to the earliest
upstreamed ASSR patch. The changed code flow are causing problems
with some panels.
[How]
- Change ASSR enabling code while preserving original code flow
as much as possible
- Simplify the code on guarding with internal
[Why]
A new change that simplifies the ASSR enabling and guarding is found
that also fixes regression on some embedded panels.
[How]
Revert the ASSR changes in preparation for upcoming patch.
Signed-off-by: Stylon Wang
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 54 ++-
Previous ASSR-enabling patches cause blank screen on some embedded
panels. This patch set minimize the changes made to code logic prior to
the ASSR change and also improve on code readability.
Stylon Wang (2):
drm/amd/display: Revert "Re-enable 'Guard ASSR with internal display
flag'"
While you already CCed a bunch of people stuff like that needs to go to
the appropriate mailing list and not just amd-gfx.
Especially LKML so that other core devs can take a look as well.
Regards,
Christian.
Am 19.07.21 um 21:52 schrieb Anson Jacob:
This is an attempt to have generic FPU
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