We have merged such DRM definition dependencies previously through a topic
branch in order to avoid redefining inside the driver.
But yes guarding this with ifdef is good.
Reviewed-by: Manasi Navare
Manasi
-Original Message-
From: Zuo, Jerry
Sent: Tuesday, September 28, 2021 11:11
On Tue, Sep 28, 2021 at 2:29 AM Christian König
wrote:
>
> Am 28.09.21 um 02:49 schrieb huangyizhi:
> > The current mechanism for obtaining RPM is to read tach_period from
> > the register, and then calculate the RPM together with the frequency.
> > But we found that on specific GPUs, such as RX
On Tue, Sep 28, 2021 at 02:01:57PM -0700, Kuppuswamy, Sathyanarayanan wrote:
> Yes. But, since the check is related to TDX, I just want to confirm whether
> you are fine with naming the function as intel_*().
Why is this such a big of a deal?!
There's amd_cc_platform_has() and
On Tue, Sep 28, 2021 at 8:36 PM Jason Gunthorpe wrote:
>
> On Sun, Sep 12, 2021 at 07:53:09PM +0300, Oded Gabbay wrote:
> > From: Tomer Tayar
> >
> > Implement the calls to the dma-buf kernel api to create a dma-buf
> > object backed by FD.
> >
> > We block the option to mmap the DMA-BUF object
On Tue, Sep 28, 2021 at 01:48:46PM -0700, Kuppuswamy, Sathyanarayanan wrote:
> Just read it. If you want to use cpuid_has_tdx_guest() directly in
> cc_platform_has(), then you want to rename intel_cc_platform_has() to
> tdx_cc_platform_has()?
Why?
You simply do:
if
On 9/28/21 1:58 PM, Borislav Petkov wrote:
On Tue, Sep 28, 2021 at 01:48:46PM -0700, Kuppuswamy, Sathyanarayanan wrote:
Just read it. If you want to use cpuid_has_tdx_guest() directly in
cc_platform_has(), then you want to rename intel_cc_platform_has() to
tdx_cc_platform_has()?
Why?
You
On 9/28/21 1:31 PM, Borislav Petkov wrote:
On Tue, Sep 28, 2021 at 12:19:49PM -0700, Kuppuswamy, Sathyanarayanan wrote:
Intel CC support patch is not included in this series. You want me
to address the issue raised by Joerg before merging it?
Did you not see my email to you today:
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from
On Tue, Sep 28, 2021 at 12:19:49PM -0700, Kuppuswamy, Sathyanarayanan wrote:
> Intel CC support patch is not included in this series. You want me
> to address the issue raised by Joerg before merging it?
Did you not see my email to you today:
https://lkml.kernel.org/r/yvl4zughfsh1q...@zn.tnic
?
From: Tom Lendacky
Replace uses of mem_encrypt_active() with calls to cc_platform_has() with
the CC_ATTR_MEM_ENCRYPT attribute.
Remove the implementation of mem_encrypt_active() across all arches.
For s390, since the default implementation of the cc_platform_has()
matches the s390
From: Borislav Petkov
Hi all,
here's v4 of the cc_platform_has() patchset with feedback incorporated.
I'm going to route this through tip if there are no objections.
Thx.
Tom Lendacky (8):
x86/ioremap: Selectively build arch override encryption functions
arch/cc: Introduce a function to
From: Tom Lendacky
Introduce a powerpc version of the cc_platform_has() function. This will
be used to replace the powerpc mem_encrypt_active() implementation, so
the implementation will initially only support the CC_ATTR_MEM_ENCRYPT
attribute.
Signed-off-by: Tom Lendacky
Signed-off-by:
From: Tom Lendacky
Replace uses of sme_active() with the more generic cc_platform_has()
using CC_ATTR_HOST_MEM_ENCRYPT. If future support is added for other
memory encryption technologies, the use of CC_ATTR_HOST_MEM_ENCRYPT
can be updated, as required.
This also replaces two usages of
On 9/28/21 12:10 PM, Borislav Petkov wrote:
From: Borislav Petkov
Hi all,
here's v4 of the cc_platform_has() patchset with feedback incorporated.
I'm going to route this through tip if there are no objections.
Intel CC support patch is not included in this series. You want me
to address
From: Tom Lendacky
In preparation for other uses of the cc_platform_has() function
besides AMD's memory encryption support, selectively build the
AMD memory encryption architecture override functions only when
CONFIG_AMD_MEM_ENCRYPT=y. These functions are:
- early_memremap_pgprot_adjust()
-
From: Tom Lendacky
Introduce an x86 version of the cc_platform_has() function. This will be
used to replace vendor specific calls like sme_active(), sev_active(),
etc.
Signed-off-by: Tom Lendacky
Signed-off-by: Borislav Petkov
---
arch/x86/Kconfig | 1 +
From: Tom Lendacky
Replace uses of sev_active() with the more generic cc_platform_has()
using CC_ATTR_GUEST_MEM_ENCRYPT. If future support is added for other
memory encryption technologies, the use of CC_ATTR_GUEST_MEM_ENCRYPT
can be updated, as required.
Signed-off-by: Tom Lendacky
From: Tom Lendacky
In preparation for other confidential computing technologies, introduce
a generic helper function, cc_platform_has(), that can be used to
check for specific active confidential computing attributes, like
memory encryption. This is intended to eliminate having to add multiple
From: Tom Lendacky
Replace uses of sev_es_active() with the more generic cc_platform_has()
using CC_ATTR_GUEST_STATE_ENCRYPT. If future support is added for other
memory encyrption techonologies, the use of CC_ATTR_GUEST_STATE_ENCRYPT
can be updated, as required.
Signed-off-by: Tom Lendacky
On Tue, Sep 28, 2021 at 8:13 PM Jason Gunthorpe wrote:
>
> On Sun, Sep 12, 2021 at 07:53:08PM +0300, Oded Gabbay wrote:
> > /* HL_MEM_OP_* */
> > __u32 op;
> > - /* HL_MEM_* flags */
> > + /* HL_MEM_* flags.
> > + * For the HL_MEM_OP_EXPORT_DMABUF_FD opcode, this field
On Sun, Sep 12, 2021 at 07:53:08PM +0300, Oded Gabbay wrote:
> /* HL_MEM_OP_* */
> __u32 op;
> - /* HL_MEM_* flags */
> + /* HL_MEM_* flags.
> + * For the HL_MEM_OP_EXPORT_DMABUF_FD opcode, this field holds the
> + * DMA-BUF file/FD flags.
> + */
> __u32
On Sun, Sep 12, 2021 at 07:53:09PM +0300, Oded Gabbay wrote:
> From: Tomer Tayar
>
> Implement the calls to the dma-buf kernel api to create a dma-buf
> object backed by FD.
>
> We block the option to mmap the DMA-BUF object because we don't support
> DIRECT_IO and implicit P2P.
This
[AMD Official Use Only]
> -Original Message-
> From: Harry Wentland
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander ; amd-
> g...@lists.freedesktop.org; Zuo, Jerry
> Cc: jani.nik...@intel.com; Li, Sun peng (Leo) ;
> nat...@kernel.org; intel-...@lists.freedesktop.org; dri-
>
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from
If you set amdgpu.discovery=2 you can force the the driver to
fetch the IP discovery table from a file rather than from the
table shipped on the device. This is useful for debugging and
for device bring up and emulation when the tables may be in flux.
Reviewed-by: Christian König
Signed-off-by:
rather than asic type.
v2: fix up CZ case
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 254 +---
1 file changed, 178 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
We can get the pdev and asic type from the adev. No need
to pass them explicitly.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 3 +--
drivers/gpu/drm/amd/amdkfd/kfd_device.c| 7
Handle SRIOV requirements when adding IP blocks.
v2: add comment about UVD/VCE support on vega20 SR-IOV
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 34 ++-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git
Split into several smaller per IP functions to make it
easier to handle ordering issues for things like
SR-IOV in a follow up patch.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1028 +
1 file changed, 540
Allow us to query instances versions more cleanly.
Instancing support is not consistent unfortunately. SDMA is a
good example. Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8
total SDMA instances, but they are enumerated as multiple
For new chips with no explicit entry in the PCI ID list.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
Default to PSP ucode loading unless the user specifies
direct.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
Add a new asic type for asics where we don't have an
explicit entry in the PCI ID list. We don't need
an asic type for these asics, other than something higher
than the existing ones, so just use this for all new
asics.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
Handled by IP discovery now.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 +---
4 files changed, 2
Use the table rather than asic specific harvest registers.
v2: remove harvesting register checking
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 19 ---
2 files changed, 8 insertions(+),
Rather than hardcoding it. We already have the number of VCN
instances from a previous patch, so just update the VCN
instances for chips with static tables.
v2: squash in checks for SDMA3,4 (Guchun)
v3: clarify VCN changes
Signed-off-by: Alex Deucher
---
Handled by IP discovery now.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 17 -
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 --
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 17 -
3 files changed, 36 deletions(-)
From: Guchun Chen
They are missed.
Acked-by: Christian König
Signed-off-by: Guchun Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/soc15_hw_ip.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/soc15_hw_ip.h
So we can store the VCN IP revision for each instance of VCN.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 815db33190ca..b153c3740307
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 159 -
1 file changed, 88 insertions(+), 71 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: squash in fix for navy flounder and sienna cichlid
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 47 +++--
1 file changed, 21
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: switch if statement to a switch statement
Acked-by: Christian König (v1)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 46 +++
1 file changed, 23
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 22 +++
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 24 +--
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 44 +-
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 101 ++--
1 file changed, 58 insertions(+), 43 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 227 ++
1 file changed, 120 insertions(+), 107 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 +--
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 107 ++---
1 file changed, 60 insertions(+), 47 deletions(-)
diff --git
We are not going to support any new chips with the old
non-DC code so make it the default.
Reviewed-by: Harry Wentland
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16
1 file changed, 16 deletions(-)
diff --git
for consistency with other SoCs.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c
index
Hardcode the IP versions for asics without IP discovery tables
and then enumerate the asics based on the IP versions.
TODO: fix SR-IOV support
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 417 --
1 file changed, 387
So they can be driven by IP discovery table.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
drivers/gpu/drm/amd/amdgpu/soc15.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
So we can track grab the appropriate DCE info out of the
IP discovery table. This is a separare IP from DCN.
Acked-by: Harry Wentland
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: drop unrelated change
Acked-by: Christian König (v1)
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 192 ++
1 file changed, 108 insertions(+), 84
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
v2: rebase
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20
1 file changed, 20 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 75 +
1 file changed, 38 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 24 +--
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 50 +--
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 88 ++-
1 file changed, 46 insertions(+), 42 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
v3: switch some if statements to switch statements
v4: add yellow carp fix (Yifan)
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 124
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 73 +++--
1 file changed, 32 insertions(+), 41 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
Only tested on Navi10 so far.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 -
1 file changed, 1 deletion(-)
diff --git
Drive the asic setup from the IP discovery table rather than
hardcoded settings based on asic type.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: squash in gmc fixes
v3: rebase
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 91 +-
1 file changed, 30 insertions(+), 61
Bind to all 0x1002 GPU devices.
For now we explicitly return -ENODEV for generic bindings.
Remove this check once IP discovery based checking is in place.
v2: rebase (Alex)
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 15
Once we claim all 0x1002 PCI display class devices, we will
need to filter out devices owned by radeon.
v2: rename radeon id array to make it more clear that
the devices are not supported by amdgpu.
add r128, mach64 pci ids as well
Acked-by: Christian König (v1)
Signed-off-by: Alex Deucher
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase, squash in navi10 fixes (Alex)
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 380 -
1 file changed, 190 insertions(+),
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 48 +-
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 30 +-
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git
Add initial support for all navi based parts.
v2: rebase
Acked-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 333 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h | 1 +
2 files changed, 334 insertions(+)
diff --git
So they can be driven by IP dicovery table.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
drivers/gpu/drm/amd/amdgpu/nv.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
So we can track grab the appropriate XGMI info out of the
IP discovery table.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
2 files changed, 2 insertions(+)
diff --git
Prerequisite for using IP versions in the driver rather
than asic type.
v2: Use IP_VERSION() macro instead of new function
Reviewed-by: Christian König (v1)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Useful for debugging and new asic validation.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 +
2 files changed, 6 insertions(+)
diff --git
So we can check the IP versions directly rather than using
asic type.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
diff
Consolidate harvesting information.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 7 +++
drivers/gpu/drm/amd/amdgpu/nv.c | 14 --
2 files changed, 7 insertions(+), 14 deletions(-)
diff --git
This patch set moves the driver to an IP driven discovery model
rather than one tied to PCI device ids. This allows the
GPU driver to claim all ATI PCI display class devices. The
driver will then either load or not based on the IPs (GC, SDMA,
DCN, VCN, etc.) that are enumerated on the device.
[+James]
This basically undoes James's change "drm/amdgpu: move iommu_resume
before ip init/resume". I assume James made his change for a reason. Can
you please discuss the issue with him and determine a solution that
solves both your problem and his?
If James' patch series was a mistake, I'd
On 2021-09-25 09:38, Fangzhi Zuo wrote:
> Two DP2 headers are available in drm that local ones should be removed.
> Will submit a separate drm patch for all other DP2 required headers.
>
> Signed-off-by: Fangzhi Zuo
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 10 +-
>
On 2021-09-27 15:23, Fangzhi Zuo wrote:
> Include FEC, DSC, Link Training related headers.
>
> Change since v2
> - Align with the spec for DP_DSC_SUPPORT_AND_DSC_DECODER_COUNT
>
> Signed-off-by: Fangzhi Zuo
Reviewed-by: Harry Wentland
Harry
> ---
> This patch is based on top of the other
On 2021-09-27 14:19, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> clang-14 points out that comparing an 'unsigned int' against a large
> 64-bit constantn is pointless:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:1206:18: error: result of
> comparison of constant 4294967296 with expression
This patch is to fix clinfo failure in Raven/Picasso:
Number of platforms: 1
Platform Profile: FULL_PROFILE
Platform Version: OpenCL 2.2 AMD-APP (3364.0)
Platform Name: AMD Accelerated Parallel Processing
Platform Vendor: Advanced Micro Devices, Inc.
Platform Extensions: cl_khr_icd
kfd_resume doesn't involve iommu operation, remove
redundant iommu cleanup code.
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, September 28, 2021 15:08
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking ;
Joshi, Mukul ; Kuehling, Felix ;
Yang, Stanley
Cc: Zhou1, Tao
Subject: [PATCH]
In ras poison mode, page retirement will be handled by the irq handler of the
module which consumes corrupted data.
v2: rename ras_process_cb to ras_poison_consumption_handler.
move the handler's implementation from ASIC specific file to common
file.
v3: call gpu reset for xGMI connected
On Thu, Sep 23, 2021 at 12:22 PM Oded Gabbay wrote:
>
> On Sat, Sep 18, 2021 at 11:38 AM Oded Gabbay wrote:
> >
> > On Fri, Sep 17, 2021 at 3:30 PM Daniel Vetter wrote:
> > >
> > > On Thu, Sep 16, 2021 at 10:10:14AM -0300, Jason Gunthorpe wrote:
> > > > On Thu, Sep 16, 2021 at 02:31:34PM +0200,
Am 28.09.21 um 02:49 schrieb huangyizhi:
The current mechanism for obtaining RPM is to read tach_period from
the register, and then calculate the RPM together with the frequency.
But we found that on specific GPUs, such as RX 550 and RX 560D,
tach_period always reads as 0 and
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