Rather than examining the suspend target, examine what the system is
configured to use. This should be no functional change, just improves
readability by taking the helper instead.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++--
1 file changed, 2
Drop the direct check from the FADT and use the helper instead.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
Some variables from the struct vba_vars_st are not referenced in any
other place on the codebase. As they are not used, this commit removes
those variables.
Signed-off-by: Maíra Canal
---
Unused variables from structs are not warned by compilers, so they are a bit
harder to find. In order to
Hi--
On 6/30/22 11:58, Alex Deucher wrote:
> On Thu, Jun 30, 2022 at 2:46 PM Rodrigo Siqueira
> wrote:
>>
>> Fix compilation issues when using i386
>>
>> We recently got feedback from Randy about issues in the x86-32
>> compilation.I was able to reproduce a very similar issue by using:
>>
>> -
On 2022-06-30 15:03, Eric Huang wrote:
To improve performance on queue preemption, allocate ctx s/r
area in VRAM instead of system memory, and migrate it back
to system memory when VRAM is full.
Signed-off-by: Eric Huang
Change-Id: If775782027188dbe84b6868260e429373675434c
---
On 6/30/22 14:01, Rodrigo Siqueira Jordao wrote:
On 2022-06-18 19:27, Guenter Roeck wrote:
ppc:allmodconfig builds fail with the following error.
powerpc64-linux-ld:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
uses hard float,
On 2022-06-14 05:03, Lang Yu wrote:
We don't need to validate and map root PD specially here,
it would be validated and mapped by amdgpu_vm_validate_pt_bos
if it is evicted.
The special case is when turning a GFX VM to a compute VM,
if vm_update_mode changed, we should make sure root PD gets
On 2022-06-18 19:27, Guenter Roeck wrote:
ppc:allmodconfig builds fail with the following error.
powerpc64-linux-ld:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
uses hard float,
On 30.06.22 13:44, Alistair Popple wrote:
>
> David Hildenbrand writes:
>
>> On 29.06.22 05:54, Alex Sierra wrote:
>>> This case is used to migrate pages from device memory, back to system
>>> memory. Device coherent type memory is cache coherent from device and CPU
>>> point of view.
>>>
>>>
On 2022-06-27 17:04, Alex Deucher wrote:
Properly handle FP code in dcn32_clk_mgr.c.
Fixes: 265280b99822 ("drm/amd/display: add CLKMGR changes for DCN32/321")
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 4
1 file changed, 4
The function CalculateBytePerPixelAnd256BBlockSizes was defined four
times: on display_mode_vba_30.c, display_rq_dlg_calc_30.c,
display_mode_vba_31.c and display_rq_dlg_calc_31.c. In order to avoid
code duplication, the CalculateBytePerPixelAnd256BBlockSizes is defined
on display_mode_vba_30.h and
On Thu, Jun 30, 2022 at 3:28 PM Aurabindo Pillai
wrote:
>
>
>
> On 2022-06-30 14:28, Alex Deucher wrote:
> > On Tue, Jun 28, 2022 at 5:26 PM Aurabindo Pillai
> > wrote:
> >>
> >> [Why]
> >> Expose a new debugfs enum to force a subviewport memory clock switch
> >> to facilitate easy testing.
> >>
On 2022-06-30 14:28, Alex Deucher wrote:
On Tue, Jun 28, 2022 at 5:26 PM Aurabindo Pillai
wrote:
[Why]
Expose a new debugfs enum to force a subviewport memory clock switch
to facilitate easy testing.
Is the debugfs support already plumbed in and this just enables you to
use it? If it's
From: Aric Cyr
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- Program ACP-related registers
- Fixes for DMUB, DPIA, PSR, and others
- Improvements in the pipe split
- Add SubVP code
- Add basic setup for FAMS support
- Improve BB capabilities
Acked-by:
From: Chris Park
[Why]
Integrate OVT timing from DM to DC logic to update info frame
and mode management to report the resolution to the OS.
[How]
Reflect RID and Frame Rate to AVI InfoFrame Version 5.
Define new Timing Standard for OVT timing.
Reviewed-by: Charlene Liu
Acked-by: Alan Liu
From: Alvin Lee
[Description]
Program audio DTO before wall dto for audio
Reviewed-by: Martin Leung
Acked-by: Qingqing Zhuo
Signed-off-by: Alvin Lee
---
.../gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git
From: Michael Strauss
[WHY]
lt_settings' pointers remain uninitialized but nonzero if display fails
to light up with no DPCD/EDID info populated, leading to a hang on access
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alan Liu
Signed-off-by: Michael Strauss
---
From: Hamza Mahfooz
Generic PCON SST support already exists and works for newer ASICs. So,
enable it by default.
Acked-by: Rodrigo Siqueira
Signed-off-by: Hamza Mahfooz
---
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
From: Hamza Mahfooz
hdmi_frl_pcon_support has been the source of confusion. So, rename it to
dp_hdmi21_pcon_support.
Signed-off-by: Hamza Mahfooz
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c| 2 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
From: Jimmy Kizito
[Why]
Some TBT3 docks have DPOAs which report USB4 capability and are expected
to support USB4 DPOA features such as FEC/DSC.
[How]
By default, do not override FEC/DSC capabilities reported by TBT3 docks.
Reviewed-by: Meenakshikumar Somasundaram
Acked-by: Rodrigo Siqueira
From: Alvin Lee
[Description]
In general cases we want to keep the dram clock change requirement (we
prefer configs that support MCLK switch). Only override to false for
SubVP.
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
From: Nicholas Kazlauskas
[Why & How]
Check lenc is not NULL since dynamic link encoder assignment could
end up assigning a NULL link encoder.
Reviewed-by: Michael Strauss
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
From: Meenakshikumar Somasundaram
[Why]
DC debug option to configure dpia hpd processing delay is not required.
[How]
Remove dc debug option for dpia hpd delay and also added log for
querying dpia hpd state.
Reviewed-by: Mustapha Ghaddar
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
From: Alan Liu
- Setup the shift and mask of HDMI_ACP_SEND register
- Program the register in hdmi stream encoder
- Also update ACP register in azalia configuration
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
Signed-off-by: Alan Liu
---
From: Eric Bernstein
[Why]
For some customer blending transition cases, the
available pipe for second stream is a pipe index that is
greater than the number of timing generators, which
can cause a problem in acquire_first_free_pipe since it
assumes same index for pipe and timing generator
[How]
From: Fangzhi Zuo
[Why]
Unexpected change of aux hw mapping causes dmub soft hang when
initiate aux transation at wrong aux channel.
ddc_channel stands for hw dp aux index which is from vbios,
but link_index is pure software concept for link count depending on which link
is probed first. They
From: Duncan Ma
[Why]
Some panels may require more MST delay on discovery
[How]
Add panel patch and debug mst delay flag
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Duncan Ma
---
drivers/gpu/drm/amd/display/dc/dc.h | 3 ++-
From: Chris Park
[Why]
With ODM policy 2 to 1, there exists a new use case
scenario where stream content is unchanged, but ODM
may be used. When this happens, the stream needs
to be committed with a new pipe setting.
This did not happen due to stream change
detection logic not accounting for
From: Jimmy Kizito
[Why]
Uninitialized variable causes diag compilation build failure.
[How]
- Ensure that variable in question is always initialized before being
used.
- The variable in question is the USB4 DP training pattern. In case an
unsupported training pattern has been requested, update
From: Evgenii Krasnikov
[HOW/WHY]
Add an option to skip edp_wait_for_hpd_ready when necessary
Reviewed-by: Jayendran Ramani
Acked-by: Rodrigo Siqueira
Signed-off-by: Evgenii Krasnikov
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 5 +++--
Recently we introduced a patch for fixing an MST issue, but it caused a
regression on Club 3D since we could not set a refresh rate higher than
60Hz. This commit fixes this issue by adding a proper check after
validating the stream.
Fixes: 1bd038dc60e3 ("drm/amd/display: add mst port output bw
From: Dmytro Laktyushkin
This w/a has a bad interaction with seamless boot toggling an
active stream. Most panels recover, however some fail leading
to display corruption.
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Dmytro Laktyushkin
---
From: Nicholas Kazlauskas
[Why]
In the case where we don't support DMUB aux but we have DPIA links
in the configuration we might try to message AUX using the legacy
path - where DDC pin is NULL. This causes a NULL pointer dereference.
[How]
Guard against NULL DDC pin, return a failure for aux
From: Harry Wentland
Move all linux includes into OS types.
Acked-by: Alan Liu
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/basics/vector.c | 2 --
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 --
drivers/gpu/drm/amd/display/dc/core/dc.c
From: Jun Lei
[why]
Some parts are consuming dangerously close to maximum number of states
supported when updating the BB (i.e. 8).
[how]
Change maximum stages from 9 to 20.
Acked-by: Rodrigo Siqueira
Signed-off-by: Jun Lei
---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 508
From: Dmytro Laktyushkin
Fix for a bug where we would try to timing sync 2 odm halves.
Acked-by: Rodrigo Siqueira
Signed-off-by: Dmytro Laktyushkin
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
From: Martin Leung
[Why]:
On power down, virtual dal may try to delete link_encoders by
referencing uninitialized res_pool.
[How]:
Added guard against empty res_pool.
Acked-by: Rodrigo Siqueira
Signed-off-by: Martin Leung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 --
1 file
From: Nicholas Kazlauskas
[Why]
It's possible that we don't have a link encoder assignment if the
context is NULL but we're calling dc_add_stream_to_ctx from DM directly.
Link encoder assignment will happen later after global validation
runs with fast_validate = false.
[How]
Remove the
[WHY?]
When adding/removing a plane to some configurations, unsupported pipe
programming can occur when moving to a new plane. Such cases include pipe
split on multi-display, with MPO, and/or ODM.
[HOW?]
Add a safe transistion state that minimizes pipe usage before programming
new configuration.
From: Jimmy Kizito
[Why]
While applying a state to hardware, there is a transition period where
the back-end is reset using the old state; then enabled using the new
state.
Generally, the link encoder configuration module queries
stream-to-encoder assignments in either the new or old state
We want to enable Firmware Assisted Memory (FAMS) Switching, but first,
we need to add the required code infrastructure in DC before allowing it
in amdgpu_dm.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +
drivers/gpu/drm/amd/display/dc/dc.h
From: Eric Bernstein
After some experimental tests, we noticed that we need to set
gpuvm_max_page_table_levels to '4' to meet the hardware requirements.
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c | 2 +-
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index db02f071c949..05c2e178ca99 100644
---
From: Chris Park
[Why]
For Pixel Rate control, when on HDMI, HDMI DTO should be selected
instead of DP DTO.
[How]
Pass HDMI parameter for HDMI stream, and select correct DTO.
Signed-off-by: Chris Park
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 ++
From: Alvin Lee
[Why]
Newer DCN should use optc3
[How]
Declare optc3 vmin/vmax function in header.
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 5 +
From: Alvin Lee
For MPO we want to allocate less than maximum DET for MPO pipes because
we need enogh buffer to move DET back to toher pipes when removing an
MPO plane. Also update regular DET allocation to use DET override (DCN32
has an internal policy which driver does not want to use)
From: Nicholas Kazlauskas
[Why]
Found when running igt@kms_atomic.
Userspace attempts to do a TEST_COMMIT when 0 streams which calls
dc_remove_stream_from_ctx. This in turn calls link_enc_unassign which
ends up modifying stream->link = NULL directly, causing the global
link_enc to be removed
From: Martin Leung
[WHY]:
Lut pipeline will be hooked up differently in some asics
need to add new interfaces and missing registers.
[HOW]:
Add missing registers and hook up programming from DPP for pre-blend
lut.
Acked-by: Rodrigo Siqueira
Signed-off-by: Martin Leung
---
From: Eric Bernstein
Add function to set pixels per cycle in DIG stream encoder
Acked-by: Rodrigo Siqueira
Signed-off-by: Eric Bernstein
---
.../amd/display/dc/dcn10/dcn10_stream_encoder.h | 1 +
.../gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 5 ++---
Currently, we check if pixel_encoding is equal to
PIXEL_ENCODING_YCBCR422 to get the k1/k2 div parameters. This commit
changes this logic slightly by checking if two pixels per container are
used.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8
From: Samson Tam
[Why]
Most of the time, a single display uses the ODM combine. When using
multi-display, we use ODM combine only if it is necessary. These cases
are not flexible enough for us, and we can improve them to take
advantage of our hardware. We want to have more control over the ODM
We are missing some ACP registers/mask value for some specific ASICs.
This commit includes it to those ASICs that support it.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h | 2 ++
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_sh_mask.h | 2
This DC patchset is a large one that brings improvements in multiple
areas. In summary, we highlight:
- Program ACP-related registers
- Fixes for DMUB, DPIA, PSR, and others
- Improvements in the pipe split
- Add SubVP code
- Add basic setup for FAMS support
- Improve BB capabilities
Cc: Daniel
To improve performance on queue preemption, allocate ctx s/r
area in VRAM instead of system memory, and migrate it back
to system memory when VRAM is full.
Signed-off-by: Eric Huang
Change-Id: If775782027188dbe84b6868260e429373675434c
---
include/hsakmttypes.h | 1 +
src/queues.c |
It is to add new option for always keeping gpu mapping.
Signed-off-by: Eric Huang
Change-Id: Iebee35e6de4d52fa29f82dd19f6bbf5640249492
---
include/linux/kfd_ioctl.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/kfd_ioctl.h b/include/linux/kfd_ioctl.h
index 8a0ed49..5c45f58
It is to add new option for always keeping gpu mapping.
Signed-off-by: Eric Huang
---
include/uapi/linux/kfd_ioctl.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/linux/kfd_ioctl.h b/include/uapi/linux/kfd_ioctl.h
index fd49dde4d5f4..eba04ebfd9a8 100644
---
It is to avoid unnecessary queue eviction when range
is not mapped to gpu.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index
Adding always evict queues when flag is set to
KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED as if XNACK off.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
amdkfd changes:
Eric Huang (3):
drm/amdkfd: add new flag for svm
drm/amdkfd: change svm range evict
drm/amdkfd: optimize svm range evict
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 13 +++--
include/uapi/linux/kfd_ioctl.h | 2 ++
2 files changed, 13 insertions(+), 2 deletions(-)
On Thu, Jun 30, 2022 at 2:46 PM Rodrigo Siqueira
wrote:
>
> Fix compilation issues when using i386
>
> We recently got feedback from Randy about issues in the x86-32
> compilation.I was able to reproduce a very similar issue by using:
>
> - gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> - make -j16
The function Calculate256BBlockSizes always returns true, regardless of
the parameters. As any file checks the return of the function, this
commit changes the return value to void.
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 3 +--
When we tried to compile DCN32/321 for 32-bit architecture, we got this
error message:
ERROR: modpost: "__floatunsidf" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko]
undefined!
This was caused because we were trying to assign an unsigned int to a
double value which causes issues for 32-bit
When we tried to compile DCN32/321 for 32-bit architecture, we got this
error message:
ERROR: modpost: "__nedf2" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
This commit fixes this issue by rewriting a small part of the
dcn32_build_wm_range_table.
Cc: Aurabindo Pillai
Cc: Harry Wentland
Sometimes when trying to enable some feature, we have to define some
values with educated guesses, but we mark those values as TBD, which
means "To Be Determined". However, the correct way to approach it is by
loading that information from the firmware. Anyway, some of the values
that we were
Fix compilation issues when using i386
We recently got feedback from Randy about issues in the x86-32
compilation.I was able to reproduce a very similar issue by using:
- gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
- make -j16 ARCH=i386
- amd-staging-drm-next
I'm able to see these issues:
ERROR:
While we tried to build amdgpu on i386, we got this error:
ERROR: modpost: "__umoddi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
This commit fixes this issue by replacing the standard module operator
with div_u64_rem.
Cc: Aurabindo Pillai
Cc: Harry Wentland
Cc: Alex Deucher
Cc: Randy
On 6/30/22 4:40 PM, Mark Brown wrote:
> On Thu, Jun 30, 2022 at 08:47:54AM +0530, Vijendar Mukunda wrote:
>
>> +static int st_es8336_hw_params(struct snd_pcm_substream *substream,
>> + struct snd_pcm_hw_params *params)
>> +{
>> +int ret = 0;
>> +struct
On 6/30/22 4:41 PM, Mark Brown wrote:
> On Thu, Jun 30, 2022 at 08:47:55AM +0530, Vijendar Mukunda wrote:
>
>> +depends on SND_SOC_AMD_ACP && I2C && ACPI
>
> The code treated ACPI as optional so you could relax the ACPI dependency
> ot be "ACPI || COMPILE_TEST" (I think the same applies to
On Tue, Jun 28, 2022 at 5:26 PM Aurabindo Pillai
wrote:
>
> [Why]
> Expose a new debugfs enum to force a subviewport memory clock switch
> to facilitate easy testing.
>
Is the debugfs support already plumbed in and this just enables you to
use it? If it's in debugfs, do we really need a module
Ping
On 2022-06-28 17:26, Aurabindo Pillai wrote:
[Why]
Expose a new debugfs enum to force a subviewport memory clock switch
to facilitate easy testing.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
drivers/gpu/drm/amd/include/amd_shared.h
On 2022-06-30 11:19, Eric Huang wrote:
On 2022-06-29 19:29, Felix Kuehling wrote:
On 2022-06-29 18:53, Eric Huang wrote:
On 2022-06-29 18:20, Felix Kuehling wrote:
On 2022-06-28 17:43, Eric Huang wrote:
Two changes:
1. reducing unnecessary evict/unmap when range is not mapped to gpu.
2.
On 2022-06-29 19:29, Felix Kuehling wrote:
On 2022-06-29 18:53, Eric Huang wrote:
On 2022-06-29 18:20, Felix Kuehling wrote:
On 2022-06-28 17:43, Eric Huang wrote:
Two changes:
1. reducing unnecessary evict/unmap when range is not mapped to gpu.
2. adding always evict when flags is set to
On 2022-06-30 10:19, Felix Kuehling
wrote:
Am 2022-06-28 um 10:50 schrieb Philip Yang:
Use ktime_get_boottime_ns() as timestamp
to correlate with other
APIs. Output timestamp when GPU recoverable fault starts and
Am 2022-06-28 um 10:50 schrieb Philip Yang:
Define new system management interface event IDs for migration, GPU
recoverable page fault, user queues eviction, restore and unmap from
GPU events and corresponding event triggers, those will be implemented
in the following patches.
Signed-off-by:
Am 2022-06-28 um 10:50 schrieb Philip Yang:
Indicate SMI profiling events available.
Signed-off-by: Philip Yang
Reviewed-by: Felix Kuehling
---
include/uapi/linux/kfd_ioctl.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/kfd_ioctl.h
Am 2022-06-28 um 10:50 schrieb Philip Yang:
The synchronize_rcu may take several ms, which noticeably slows down
applications close SMI event handle. Use call_rcu to free client->fifo
and client asynchronously and eliminate the synchronize_rcu call in the
user thread.
Signed-off-by: Philip Yang
Am 2022-06-28 um 10:50 schrieb Philip Yang:
SVM range unmapped from GPUs when range is unmapped from CPU, or with
xnack on from MMU notifier when range is evicted or migrated.
Signed-off-by: Philip Yang
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 9
Am 2022-06-28 um 10:50 schrieb Philip Yang:
Output user queue eviction and restore event. User queue eviction may be
triggered by svm or userptr MMU notifier, TTM eviction, device suspend
and CRIU checkpoint and restore.
User queue restore may be rescheduled if eviction happens again while
Am 2022-06-28 um 10:50 schrieb Philip Yang:
For migration start and end event, output timestamp when migration
starts, ends, svm range address and size, GPU id of migration source and
destination and svm range attributes,
Migration trigger could be prefetch, CPU or GPU page fault and TTM
Am 2022-06-28 um 10:50 schrieb Philip Yang:
Use ktime_get_boottime_ns() as timestamp to correlate with other
APIs. Output timestamp when GPU recoverable fault starts and ends to
recover the fault, if migration happened or only GPU page table is
updated to recover, fault address, if read or
[AMD Official Use Only - General]
Ping!
Hi Felix, what do you think? Thanks!
Regards,
Lang
>-Original Message-
>From: Koenig, Christian
>Sent: Tuesday, June 14, 2022 5:08 PM
>To: Yu, Lang ; amd-gfx@lists.freedesktop.org
>Cc: Kuehling, Felix ; Deucher, Alexander
>; Huang, Ray
[Public]
Acked-by: Alex Deucher
From: Quan, Evan
Sent: Thursday, June 30, 2022 4:26 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Gao, Likun ;
Deucher, Alexander ; Quan, Evan
Subject: [PATCH] drm/amd/pm: update SMU 13.0.0 driver_if header
And
David Hildenbrand writes:
> On 29.06.22 05:54, Alex Sierra wrote:
>> This case is used to migrate pages from device memory, back to system
>> memory. Device coherent type memory is cache coherent from device and CPU
>> point of view.
>>
>> Signed-off-by: Alex Sierra
>> Acked-by: Felix
On 29.06.22 05:54, Alex Sierra wrote:
> This case is used to migrate pages from device memory, back to system
> memory. Device coherent type memory is cache coherent from device and CPU
> point of view.
>
> Signed-off-by: Alex Sierra
> Acked-by: Felix Kuehling
> Reviewed-by: Alistair Poppple
>
On Thu, Jun 30, 2022 at 08:47:55AM +0530, Vijendar Mukunda wrote:
> + depends on SND_SOC_AMD_ACP && I2C && ACPI
The code treated ACPI as optional so you could relax the ACPI dependency
ot be "ACPI || COMPILE_TEST" (I think the same applies to I2C).
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On Thu, Jun 30, 2022 at 08:47:54AM +0530, Vijendar Mukunda wrote:
> +static int st_es8336_hw_params(struct snd_pcm_substream *substream,
> +struct snd_pcm_hw_params *params)
> +{
> + int ret = 0;
> + struct snd_soc_pcm_runtime *rtd =
And bump the version to 0x2A.
Signed-off-by: Evan Quan
Change-Id: I2b66b9a289177a979201fca2056ff11e0b81f2bb
---
.../gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 3 ++-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 2 +-
2 files changed, 3 insertions(+), 2
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