Currently, if we encounter unimplemented functions, it is difficult to
tell what caused them just by looking at dmesg and that is compounded by
the fact that it is often hard to reproduce said issues. So, to have
access to more detailed debugging information, add a WARN() to
dal_irq_service_ack()
After commit 8799c0be89eb ("drm/amd/display: Fix vblank refcount in vrr
transition"), a build with CONFIG_DEBUG_FS=n is broken due to a
misplaced brace, along the lines of:
In file included from
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_trace.h:39,
from
[AMD Official Use Only - General]
> This patch results in a large number of compile errors if CONFIG_DEBUG_FS=n.
> Reverting it fixes the problem.
>
> This is an architecture independent problem.
>
> Guenter
Oops, seem to be because at amdgpu_dm.c:8328 the } should be inside the #endif
not
This was buggy because when we had to wait for entities which were
killed as well we would just deadlock.
Instead move all the dependency handling into the callbacks so that
will all happen asynchronously.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_entity.c | 197
This now matches much better what this is doing.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 4 ++--
drivers/gpu/drm/scheduler/sched_entity.c | 4 ++--
include/drm/gpu_scheduler.h | 13 ++---
3 files changed, 10 insertions(+), 11
Entirely remove the sync obj in the job.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 21 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 1 -
Not used any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 26 --
include/drm/gpu_scheduler.h| 2 --
2 files changed, 28 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
Instead of putting that into the job sync object.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index
Instead of putting that into the job sync object.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c| 56 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 10 +++-
3 files changed, 52
This moves the memory allocation out of the critical code path.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 13 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 12 +++-
Instead return the fence directly. Avoids memory allocation to store the
fence.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 42 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 12 +++
3
Use the new common scheduler functions to figure out what to wait for.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
This is always the job anyway.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 20
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 4 +---
3 files changed, 10 insertions(+), 17 deletions(-)
diff
Init the DRM scheduler base class while allocating the job.
This makes the whole handling much more cleaner.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
We leaked dependency fences when processes were beeing killed.
Additional to that grab a reference to the last scheduled fence.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_entity.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Add a new function to update job dependencies from a resv obj.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 49 ++
include/drm/gpu_scheduler.h| 5 +++
2 files changed, 39 insertions(+), 15 deletions(-)
diff --git
Hi guys,
rebased those patches on top of amd-staging-drm-next since the
amdgpu changes are quite substencial.
Please review and comment,
Christian.
Make sure that we always have a CPU round trip to let the submission
code correctly decide if a TLB flush is necessary or not.
Signed-off-by: Christian König
CC: sta...@vger.kernel.org # 5.19+
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 9 -
1 file changed, 8 insertions(+), 1
Setting this flag on a scheduler fence prevents pipelining of jobs
depending on this fence. In other words we always insert a full CPU
round trip before dependen jobs are pushed to the pipeline.
Signed-off-by: Christian König
CC: sta...@vger.kernel.org # 5.19+
---
[AMD Official Use Only - General]
+ if (ret) {
+ dev_err(adev->dev, "Failed to enable thermal alert!\n");
+ return ret;
It seems code alignment issue here, please double check before the commit
Other than that, series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
enable thermal alart on smu_v13_0_10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index
update driver-if header for smu_v13_0_10 and merge with smu_v13_0_0
Signed-off-by: Kenneth Feng
---
.../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 87 +++
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 +-
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c| 6 +-
3 files
RAS error address translation algorithm is common
across dGPU and A + A platform as along as the SOC
integrates the same generation of UMC IP.
UMC RAS is managed by x86 MCA on A + A platform,
umc_ras in GPU driver is not initialized at all on
A + A platform. In such case, any umc_ras callback
Am 14.10.22 um 05:34 schrieb YuBiao Wang:
Update: Remove redundant comments as Christian suggests.
[Why]
If mes is not dequeued during fini, mes will be in an uncleaned state
during reload, then mes couldn't receive some commands which leads to
reload failure.
[How]
Perform MES dequeue via
Am 13.10.22 um 23:07 schrieb Fabio M. De Francesco:
The use of kmap() is being deprecated in favor of kmap_local_page().
There are two main problems with kmap(): (1) It comes with an overhead as
the mapping space is restricted and protected by a global lock for
synchronization and (2) it also
default:
+ dev_warn(adev->dev,
+"UMC address to Physical address translation is not
supported\n");
+ return NOTIFY_DONE;
Before returning, maybe it's necessary to free err_data.err_addr?
Regards,
Guchun
-Original Message-
From:
[AMD Official Use Only - General]
Reviewed-by: Stanley.Yang
Regards,
Stanley
> -Original Message-
> From: amd-gfx On Behalf Of
> Hawking Zhang
> Sent: Friday, October 14, 2022 2:19 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao ;
> Yang, Stanley
> Cc: Russell, Kent ; Zhang,
RAS error address translation algorithm is common
across dGPU and A + A platform as along as the SOC
integrates the same generation of UMC IP.
UMC RAS is managed by x86 MCA on A + A platform,
umc_ras in GPU driver is not initialized at all on
A + A platform. In such case, any umc_ras callback
[AMD Official Use Only - General]
V2:
Add sriov vf ras support in amdgpu_ras_asic_supported.
Signed-off-by: YiPeng Chai
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git
[AMD Official Use Only - General]
V1:
Enable ras support for CHIP_IP_DISCOVERY asic type.
V2:
1. Change commit comment.
2. Enable ras support for mp0 v13_0_0 and v13_0_10.
Signed-off-by: YiPeng Chai
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 10 ++
1
[AMD Official Use Only - General]
Enable gmc soft reset on gmc_v11_0_3.
Signed-off-by: YiPeng Chai
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
[AMD Official Use Only - General]
Temporary disable mes self teset for gc 11.0.3.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
[AMD Official Use Only - General]
skip loading pptable from driver on secure board since it's loaded from psp.
Signed-off-by: Kenneth Feng
Reviewed-by: Guan Yu
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
[AMD Official Use Only - General]
enable gfx clock gating features on smu_v13_0_10
Signed-off-by: Kenneth Feng
Reviewed-by: Jack Gui
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/soc21.c | 6 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git
[AMD Official Use Only - General]
remove the pptable id override on smu_v13_0_10, and the id is fetched from
vbios now.
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
[AMD Official Use Only - General]
temporarily disable thermal alert on smu_v13_0_10 due to kfd test fail.
will enable it again after confirming the thermal hardware setting.
Signed-off-by: Kenneth Feng
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
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