Re: [PATCH v2] drm/amdgpu: Increase IH soft ring size for GFX v9.4.3 dGPU

Am 19.09.23 um 16:17 schrieb Philip Yang: On GFX v9.4.3 dGPU, applications have random timeout failure when XNACK on, dmesg log has "amdgpu: IH soft ring buffer overflow 0x900, 0x900", because dGPU mode has 272 cam entries. After increasing IH soft ring to 512 entries, no more IH soft ring

Re: [PATCH] drm/amdkfd: Don't use sw fault filter if retry cam enabled

Am 19.09.23 um 16:09 schrieb Philip Yang: If retry cam enabled, we don't use sw retry fault filter and add fault into sw filter ring, so we shouldn't remove fault from sw filter. Signed-off-by: Philip Yang Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5

[PATCH 18/19] drm/amd/display: fix incorrect odm change detection logic

From: Wenjing Liu [why] The current ODM change detection only compares first two ODM slices. If there are 4 ODM slices and the change is within the last two slices, the logic fails to detect ODM change and cause us to skip ODM programming unexpectedly. [how] Add a is ODM topology changed

[PATCH 19/19] drm/amd/display: 3.2.253

From: Aric Cyr This version brings along the following: - Fix incorrect odm change detection logic - Add primary pipe check when building slice table for dcn3x - Add get primary dpp pipe resource interface - Add missing function pointer for DCN321 resource - Rename DisableMinDispClkODM in

[PATCH 17/19] drm/amd/display: add primary pipe check when building slice table for dcn3x

From: Wenjing Liu [why] There is a corner use case where the same plane pointer can be added into dc state twice. In addition to plane state pointer check we also need to match primary pipe before identifying the same plane. Reviewed-by: Dillon Varone Acked-by: Wayne Lin Signed-off-by:

[PATCH 16/19] drm/amd/display: add get primary dpp pipe resource interface

From: Wenjing Liu [why] Need to have a helper function to find the primary dp pipe of the plane associated with a dpp pipe Reviewed-by: Dillon Varone Acked-by: Wayne Lin Signed-off-by: Wenjing Liu --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 14 ++

[PATCH 13/19] drm/amd/display: Break after finding supported vlevel for repopulate

From: Alvin Lee [Description] After repopulating pipes for a split / merge, we want to find the lowest vlevel that supports the desired mpc combine level. Reviewed-by: Nevenko Stupar Reviewed-by: Dillon Varone Reviewed-by: Aric Cyr Acked-by: Wayne Lin Signed-off-by: Alvin Lee ---

[PATCH 15/19] drm/amd/display: add missing function pointer for DCN321 resource

From: Wenjing Liu [why] acquire_free_pipe_as_secondary_opp_head function pointer is not assigned. This causes ODM mode to be disabled after enabling windowed MPO ODM capability on DCN321. [how] assign the correct function to the function pointer. Reviewed-by: Dillon Varone Acked-by: Wayne Lin

[PATCH 14/19] drm/amd/display: Rename DisableMinDispClkODM in dc_config

From: Gabe Teeger [what and why] The logic for DisableMinDispClkODM is reversed now that odm is disabled by default. Renaming to EnableMinDispClkODM. Reviewed-by: Charlene Liu Acked-by: Wayne Lin Signed-off-by: Gabe Teeger --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1

[PATCH 11/19] drm/amd/display: augment display clock in dc_cap structure

From: Max Tseng [Why] Allow dc report maximum display clock possible at vmin Reviewed-by: Wayne Lin Acked-by: Wayne Lin Signed-off-by: Max Tseng --- drivers/gpu/drm/amd/display/dc/dc.h | 1 + drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 ++

[PATCH 12/19] drm/amd/display: Update OPP counter from new interface

From: Hong-lu Cheng [Description] Change to new interface for notifying OS of cursor support changes Reviewed-by: Gang Chu Reviewed-by: Jaina Han Reviewed-by: Jun Lei Acked-by: Wayne Lin Signed-off-by: Hong-lu Cheng --- drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +- 1 file changed, 1

[PATCH 10/19] drm/amd/display: Improve code style on bios_parser2

From: Rodrigo Siqueira bios_parser2 uses space instead of tabs in multiple areas; this commit converts those spaces into tabs. It also removes some other small details. Reviewed-by: Aurabindo Pillai Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira ---

[PATCH 09/19] drm/amd/display: skip audio config for virtual signal

From: Alex Hung [WHY & HOW] IGT's kms_hdmi_inject (subtest inject_audio) triggers a warning message from dce_aud_az_configure. This can be fixed by checking Virtual signal that does not need to configure AZ audio since it does not have any. Reviewed-by: Rodrigo Siqueira Acked-by: Wayne Lin

[PATCH 08/19] drm/amd/display: block MPO if it prevents pstate support

From: Dmytro Laktyushkin This change adds a method to block mpo when it would cause us to exit pstate support. We should block mpo by default where MPO causes issues by preventing pstate change. Reviewed-by: Jun Lei Reviewed-by: Aric Cyr Acked-by: Wayne Lin Signed-off-by: Dmytro Laktyushkin

[PATCH 06/19] drm/amd/display: Improve x86 and dmub ips handshake

From: Duncan Ma [Why] There is a race condition between x86 and dmcub fw when attempting to exit IPS2. Scenarios including exiting IPS2 before IPS2 has been entered. This can cause unexpected hang when DMCUB attempt to exit while PMFW still tries to enter IPS2. [How] A new design has been

[PATCH 07/19] drm/amd/display: Fix DP2.0 timing sync

From: Ilya Bakoulin [Why] Triggering OTG sync before all OTG/HPO clock programming is complete causes timing sync to fail and a subsequent P-state hang. [How] Move DTB clock programming earlier in the sequence to enable_stream_timing. Reviewed-by: Ariel Bernstein Acked-by: Wayne Lin

[PATCH 05/19] drm/amd/display: remove guaranteed viewports limitation for odm

From: Wenjing Liu [why] With the more generic hw minimal state transition sequence, this limitation has been overcome. Reviewed-by: Aric Cyr Acked-by: Wayne Lin Signed-off-by: Wenjing Liu --- drivers/gpu/drm/amd/display/dc/core/dc.c | 34 ---

[PATCH 04/19] drm/amd/display: add new windowed mpo odm minimal transition sequence

From: Wenjing Liu [why] We do not have a programming sequence to support seamless transition between MPC combine to ODM combine when plane count remains the same. This can happen with windowed MPO ODM use cases when plane scaling is changed over ODM Combine's capability. [How] We are adding a

[PATCH 03/19] drm/amd/display: reset stream slice count for new ODM policy

From: Wenjing Liu [why] ODM combine could prevent us from supporting more planes we will reset ODM slice count back to 1 when all planes have been removed to maximize the amount of planes supported when new planes are added. [how] reset ODM slice count when all planes are removed. Reviewed-by:

[PATCH 02/19] drm/amd/display: determine fast update only before commit minimal transition state

From: Wenjing Liu [why] commit minimal transition state would update current state to new state with surface and stream update applied. If we determine fast update only after we have committed the minimal transition state based on new state, we will skip committing the full new state. [how]

[PATCH 01/19] drm/amd/display: remove unused mmhub_reg_offsets

From: Qingqing Zhuo [Why & How] mmhub_reg_offsets never used in code. Remove it. Reviewed-by: Rodrigo Siqueira Acked-by: Wayne Lin Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 10 -- 1 file changed, 10 deletions(-) diff --git

[PATCH 00/19] DC Patches September 22, 2023

This DC patchset brings improvements in multiple areas. In summary, we highlight: - fix incorrect odm change detection logic - add primary pipe check when building slice table for dcn3x - add get primary dpp pipe resource interface - add missing function pointer for DCN321 resource - Rename

Re: [PATCH] drm/amd/pm: Add reset option for fan_curve on smu13_0_0

Hi Alex, On 9/18/2023 10:05 PM, Alex Deucher wrote: > On Mon, Sep 11, 2023 at 2:00 AM Ma Jun wrote: >> >> Add reset option for fan_curve. >> User can use command "echo r > fan_cure" to reset the fan_curve >> to boot value >> >> Signed-off-by: Ma Jun >> --- >> drivers/gpu/drm/amd/pm/amdgpu_pm.c

Re: [PATCH 0/5] Add the pci_get_base_class() helper and use it

Hi, On 2023/8/25 21:18, Deucher, Alexander wrote: [Public] -Original Message- From: amd-gfx On Behalf Of Sui Jingfeng Sent: Friday, August 25, 2023 2:27 AM To: Bjorn Helgaas Cc: alsa-de...@alsa-project.org; Sui Jingfeng ; nouv...@lists.freedesktop.org; linux-ker...@vger.kernel.org;

RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update

[AMD Official Use Only - General] Thanks for catch it, will update the patch. Tao > -Original Message- > From: Wang, Yang(Kevin) > Sent: Tuesday, September 19, 2023 11:34 PM > To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org; Zhang, > Hawking ; Yang, Stanley ; > Li, Candice ; Chai,

Re: [PATCH] drm/amdkfd: Seperate dma unmap and free of dma address array operations

On 2023-09-15 18:13, Xiaogang.Chen wrote: From: Xiaogang Chen We do not need free dma address array of svm_range each time we do dma unmap for pages in svm_range as we can reuse the same array. Only free it when free svm_range. Seperate these two operations and use them accordinly.

Re: [PATCH v3] drm/amdkfd: Handle errors from svm validate and map

On 2023-09-19 10:21, Philip Yang wrote: If new range is splited to multiple pranges with max_svm_range_pages alignment and added to update_list, svm validate and map should keep going after error to make sure prange->mapped_to_gpu flag is up to date for the whole range. svm validate and map

Re: [PATCH 01/11] drm/amdgpu: fix and cleanup gmc_v9_0_flush_gpu_tlb

On Tue, Sep 19, 2023 at 8:08 AM Christian König wrote: > > The KIQ code path was ignoring the second flush. Also avoid long lines and > re-calculating the register offsets over and over again. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- >

[PATCH] MAINTAINERS: drm/ci: add entries for xfail files

DRM CI keeps track of which tests are failing, flaking or being skipped by the ci in the expectations files. Add entries for those files to the corresponding driver maintainer, so they can be notified when they change. Signed-off-by: Helen Koike --- For reference:

Re: [PATCH v2] drm/amdgpu: Increase IH soft ring size for GFX v9.4.3 dGPU

On 2023-09-19 10:17, Philip Yang wrote: On GFX v9.4.3 dGPU, applications have random timeout failure when XNACK on, dmesg log has "amdgpu: IH soft ring buffer overflow 0x900, 0x900", because dGPU mode has 272 cam entries. After increasing IH soft ring to 512 entries, no more IH soft ring

RE: [PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update

[AMD Official Use Only - General] Hi Tao, Based on your description, I think you should use BITS_PER_TYPE() instead of sizeof(), right? Best Regards, Kevin -Original Message- From: Zhou1, Tao Sent: Tuesday, September 19, 2023 6:10 PM To: amd-gfx@lists.freedesktop.org; Zhang, Hawking

[PATCH] drm/amdgpu/gmc11: disable AGP on GC 11.5

AGP aperture is deprecated and no longer functional. v2: fix typo (Alex) v3: just skip the agp setup call Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

[PATCH v3] drm/amdkfd: Handle errors from svm validate and map

If new range is splited to multiple pranges with max_svm_range_pages alignment and added to update_list, svm validate and map should keep going after error to make sure prange->mapped_to_gpu flag is up to date for the whole range. svm validate and map update set prange->mapped_to_gpu after

[PATCH v2] drm/amdgpu: Increase IH soft ring size for GFX v9.4.3 dGPU

On GFX v9.4.3 dGPU, applications have random timeout failure when XNACK on, dmesg log has "amdgpu: IH soft ring buffer overflow 0x900, 0x900", because dGPU mode has 272 cam entries. After increasing IH soft ring to 512 entries, no more IH soft ring overflow message and application passed. Fixes:

[PATCH] drm/amdkfd: Don't use sw fault filter if retry cam enabled

If retry cam enabled, we don't use sw retry fault filter and add fault into sw filter ring, so we shouldn't remove fault from sw filter. Signed-off-by: Philip Yang --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

Re: [PATCH][V3] drm/amd/display: Remove unwanted drm edid references

On Mon, 18 Sep 2023, Alex Hung wrote: > [WHY] > edid_override and drm_edid_override_connector_update, according to drm > documentation, should not be referred outside drm_edid. > > [HOW] > Remove and replace them accordingly. This can tested by IGT's > kms_hdmi_inject test. > > Signed-off-by:

[PATCH] gpu: drm: amd: display: fix kernel-doc warnings

Fix kernel-doc warnings discovered in AMD gpu display driver. Fixes these warnings: ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:110: warning: Function parameter or member 'overlap_only' not described in 'mpcc_blnd_cfg'. ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:110: warning: Function

[PATCH 11/11] drm/amdgpu: further move TLB hw workarounds a layer up

For the PASID flushing we already handled that at a higher layer, apply those workarounds to the standard flush as well. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 19 +++

[PATCH 10/11] drm/amdgpu: rework lock handling fro flush_tlb v2

Instead of each implementation doing this more or less correctly move taking the reset lock at a higher level. v2: fix typo Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +

[PATCH 08/11] drm/amdgpu: fix and cleanup gmc_v11_0_flush_gpu_tlb_pasid

The same PASID can be used by more than one VMID, reset each of them. Use the common KIQ handling. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 63 -- 1 file changed, 19

[PATCH 05/11] drm/amdgpu: fix and cleanup gmc_v8_0_flush_gpu_tlb_pasid

Testing for reset is pointless since the reset can start right after the test. Grab the reset semaphore instead. The same PASID can be used by more than once VMID, build a mask of VMIDs to invalidate instead of just restting the first one. Signed-off-by: Christian König Reviewed-by: Alex

[PATCH 07/11] drm/amdgpu: cleanup gmc_v10_0_flush_gpu_tlb_pasid

The same PASID can be used by more than one VMID, reset each of them. Use the common KIQ handling. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 66 -- 1 file changed, 19

[PATCH 06/11] drm/amdgpu: fix and cleanup gmc_v9_0_flush_gpu_tlb_pasid

Testing for reset is pointless since the reset can start right after the test. The same PASID can be used by more than one VMID, invalidate each of them. Move the KIQ and all the workaround handling into common GMC code. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by:

[PATCH 09/11] drm/amdgpu: drop error return from flush_gpu_tlb_pasid

That function never fails, drop the error return. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 7 --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 6 +++--- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7

[PATCH 02/11] drm/amdgpu: rework gmc_v10_0_flush_gpu_tlb v2

Move the SDMA workaround necessary for Navi 1x into a higher layer. v2: use dev_err Signed-off-by: Christian König Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 48 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 5 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

[PATCH 03/11] drm/amdgpu: cleanup gmc_v11_0_flush_gpu_tlb

Remove leftovers from copying this from the gmc v10 code. Signed-off-by: Christian König Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 108 ++--- 1 file changed, 41 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

[PATCH 04/11] drm/amdgpu: fix and cleanup gmc_v7_0_flush_gpu_tlb_pasid

Testing for reset is pointless since the reset can start right after the test. Grab the reset semaphore instead. The same PASID can be used by more than once VMID, build a mask of VMIDs to invalidate instead of just restting the first one. Signed-off-by: Christian König Reviewed-by: Alex

[PATCH 01/11] drm/amdgpu: fix and cleanup gmc_v9_0_flush_gpu_tlb

The KIQ code path was ignoring the second flush. Also avoid long lines and re-calculating the register offsets over and over again. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 29 +-- 1 file changed, 18 insertions(+), 11 deletions(-) diff

[PATCH 2/3] drm/amdgpu: fix value of some UMC parameters for UMC v12

Prepare for bad page retirement. Signed-off-by: Tao Zhou --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 +++- drivers/gpu/drm/amd/amdgpu/umc_v12_0.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

[PATCH 3/3] drm/amdgpu: change if condition for bad channel bitmap update

The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the channel index could be larger than 32. For the ASICs whose channel number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag interface is not supported, so we simply bypass channel bitmap update under this condition.

[PATCH 1/3] drm/amdgpu: print channel index for UMC bad page

Print channel index for UMC v12. Signed-off-by: Tao Zhou --- drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c index c6742dd863d4..7714c2ef2cdc

Re: [PATCH 01/11] drm/amdgpu: fix and cleanup gmc_v9_0_flush_gpu_tlb

Am 08.09.23 um 20:58 schrieb Felix Kuehling: On 2023-09-05 02:04, Christian König wrote: The KIQ code path was ignoring the second flush. Also avoid long lines and re-calculating the register offsets over and over again. Signed-off-by: Christian König ---  

Re: [PATCH 1/4] drm/amdgpu/gmc: add a way to force a particular placement for GART

Am 14.09.23 um 20:21 schrieb Alex Deucher: We normally place GART based on the location of VRAM and the available address space around that, but provide an option to force a particular location for hardware that needs it. Ah, somehow that patch arrived delayed in my inbox. Signed-off-by: