On 10/10/2023 9:56 PM, Mario Limonciello wrote:
> On 10/10/2023 07:59, Shyam Sundar S K wrote:
>> PMF Policy binary is a encrypted and signed binary that will be part
>> of the BIOS. PMF driver via the ACPI interface checks the existence
>> of Smart PC bit. If the advertised bit is found, PMF
On 10/10/2023 9:33 PM, Mario Limonciello wrote:
> On 10/10/2023 07:59, Shyam Sundar S K wrote:
>> PMF driver based on the output actions from the TA can request to
>> update
>> the system states like entering s0i3, lock screen etc. by generating
>> an uevent. Based on the udev rules set in the
On 10/10/ , Alex Deucher wrote:
> On Tue, Oct 10, 2023 at 9:42 AM Lang Yu wrote:
> >
> > On 10/10/ , Deucher, Alexander wrote:
> > > [Public]
> > >
> > > > -Original Message-
> > > > From: Yu, Lang
> > > > Sent: Saturday, October 7, 2023 4:54 AM
> > > > To: amd-gfx@lists.freedesktop.org
[AMD Official Use Only - General]
Reviewed-by: Kenneth Feng
-Original Message-
From: Zhang, Yifan
Sent: Tuesday, October 10, 2023 10:52 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Ma, Li ; Feng, Kenneth
; Zhang, Yifan
Subject: [PATCH]
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: c0a6edb636cba9c0d1db966a54d910a02e52e4be Add linux-next specific
files for 20231010
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202309122047.cri9yjrq-...@intel.com
https
Applied. Thanks!
Alex
On Tue, Oct 10, 2023 at 2:32 AM Wang, Yang(Kevin)
wrote:
>
> [AMD Official Use Only - General]
>
> Reviewed-by: Yang Wang
>
> Best Regards,
> Kevin
>
> -Original Message-
> From: Kunwu.Chan
> Sent: Tuesday, October 10, 2023 2:11 PM
> To: Wang, Yang(Kevin)
> Cc:
On 10/10/2023 07:59, Shyam Sundar S K wrote:
PMF Policy binary is a encrypted and signed binary that will be part
of the BIOS. PMF driver via the ACPI interface checks the existence
of Smart PC bit. If the advertised bit is found, PMF driver walks
the acpi namespace to find out the policy binary
On 10/10/2023 07:59, Shyam Sundar S K wrote:
PMF driver based on the output actions from the TA can request to update
the system states like entering s0i3, lock screen etc. by generating
an uevent. Based on the udev rules set in the userspace the event id
matching the uevent shall get updated
On 10/10/2023 07:59, Shyam Sundar S K wrote:
Sometimes policy binary retrieved from the BIOS maybe incorrect that can
end up in failing to enable the Smart PC solution feature.
Use print_hex_dump_debug() to dump the policy binary in hex, so that we
debug the issues related to the binary even
On 10/10/2023 07:59, Shyam Sundar S K wrote:
From: Basavaraj Natikar
AMDSFH has information about the Ambient light via the Ambient
Light Sensor (ALS) which is part of the AMD sensor fusion hub.
Add PMF and AMDSFH interface to get this information.
make amd_sfh_float_to_int() as non-static
On 2023-10-10 10:32, Francis, David
wrote:
[AMD Official Use Only - General]
[AMD Official Use Only - General]
By the
intended
[Public]
> -Original Message-
> From: Ma, Li
> Sent: Tuesday, October 10, 2023 9:48 AM
> To: amd-gfx@lists.freedesktop.org; Feng, Kenneth
>
> Cc: Deucher, Alexander ; Zhang, Yifan
> ; Ma, Li
> Subject: [PATCH] drm/amd/swsmu: update smu v14_0_0 header files and
> metrics table
>
>
smu_check_fw_version is called in smu hw init, thus smu if version
and version are garenteed to be stored in smu context. No need to
call smu_cmn_get_smc_version again after system boot up.
Signed-off-by: Yifan Zhang
---
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 66 ---
When migrating the range to unmap the range from GPUs, align unmap start
and last address to the range granularity boundary. Skip unmap from
GPU if range is already unmapped from GPUs based on bitmap_mapped flag.
This optimizes the TLB flush and also solve the rocgdb CWSR migration
related issue.
Refactor svm_range_validate_and_map to add and use the helper function
to get all GPUs bitmap that need access the svm range. No functional
change. This helper will be used in the following patch.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 55
Remove prange validate_timestamp which is not accurate for multiple
GPUs.
Use the bitmap_mapped flag to skip the retry fault from different pages
of the same range if the range is already mapped on the specific GPU.
Signed-off-by: Philip Yang
Reviewed-by: Felix Kuehling
---
When changing the svm range granularity, update the svm range
bitmap_mapped accordingly.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 49 +++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
Unmap the svm range from cpu will unmap and remove ranges, this cannot
align the start and last address to range granularity. If we unmap
from GPUs first, the bitmap_mapped flag is updated, split may get
incorrect bitmap_mapped for the remaining ranges.
We should split the range and bitmap_mapped
Replace prange->mapped_to_gpu with prange->bitmap_mapped[], which is per
GPU flag and based on prange granularity, updated when map to GPUS or
unmap from GPUs, to optimize multiple GPU map, unmap and retry fault
recover.
svm_range_partial_mapped is false only if no part of the range mapping
on
If using sdma update GPU page table, kfd flush tlb does nothing if vm
update fence callback doesn't update vm->tlb_seq. This works now because
retry fault keep coming and will be handled to update page table again
after AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING timeout and flush tlb.
With the
On 10/9/2023 6:36 PM, Mario Limonciello wrote:
On 10/7/2023 00:41, Tianci Yin wrote:
From: tiancyin
[why]
When cursor moves across screen boarder, lag cursor observed,
since subvp settings need to sync up with vblank, that cause
cursor updates being delayed.
[how]
Enable fast plane
[AMD Official Use Only - General]
By the intended semantics of the EXT_COHERENT parameter,
it should cause the driver to use MTYPE_UC instead of
MTYPE_NC on non-local gfx9.4.3 APU memory.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 2 +-
1 file changed, 1
On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> On 10/10/2023 6:38 PM, Ilpo Järvinen wrote:
> > On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> >
> >> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
> >> end up in failing to enable the Smart PC solution feature.
> >>
> >>
On Tue, Oct 10, 2023 at 9:42 AM Lang Yu wrote:
>
> On 10/10/ , Deucher, Alexander wrote:
> > [Public]
> >
> > > -Original Message-
> > > From: Yu, Lang
> > > Sent: Saturday, October 7, 2023 4:54 AM
> > > To: amd-gfx@lists.freedesktop.org
> > > Cc: Deucher, Alexander ; Zhang, Yifan
> > >
Update driver if, pmfw and ppsmc header files.
Add new gpu_metrics_v3_0 for metrics table updated in driver if
and reserve legacy metrics table to maintain backward compatibility.
Signed-off-by: Li Ma
Reviewed-by: Yifan Zhang
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 68
On 10/10/2023 6:38 PM, Ilpo Järvinen wrote:
> On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
>
>> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
>> end up in failing to enable the Smart PC solution feature.
>>
>> Use print_hex_dump_debug() to dump the policy binary in
On Tue, Oct 10, 2023 at 2:07 AM Bob Zhou wrote:
>
> Recently, the driver introduce DML2 for future ASIC support.
> But, some ASIC's hubbub pointer is null before calling.
> It cause the below null pointer issue, so add null check to fix it.
>
> BUG: kernel NULL pointer dereference, address:
On Tue, Oct 10, 2023 at 6:17 AM Ma Jun wrote:
>
> Add reset option for fan_ctrl interfaces on the smu v13.0.7
> User can use command "echo r > interface_name" to reset the
> interface to boot value
>
> Signed-off-by: Ma Jun
Series is:
Acked-by: Alex Deucher
> ---
>
On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
> end up in failing to enable the Smart PC solution feature.
>
> Use print_hex_dump_debug() to dump the policy binary in hex, so that we
> debug the issues related to the
From: Basavaraj Natikar
AMDSFH has information about the Ambient light via the Ambient
Light Sensor (ALS) which is part of the AMD sensor fusion hub.
Add PMF and AMDSFH interface to get this information.
make amd_sfh_float_to_int() as non-static function so that this can
be called outside of
From: Basavaraj Natikar
AMDSFH has information about the User presence information via the Human
Presence Detection (HPD) sensor which is part of the AMD sensor fusion hub.
Add PMF and AMDSFH interface to get this information.
Co-developed-by: Shyam Sundar S K
Signed-off-by: Shyam Sundar S K
From: Basavaraj Natikar
Current amd_sfh driver has float_to_int() to convert units from
float to int. This is fine until this function gets called outside of
the current scope of file.
Add a prefix "amd_sfh" to float_to_int() so that function represents
the driver name. This function will be
For the Smart PC Solution to fully work, it has to enact to the actions
coming from TA. Add the initial code path for set interface to AMDGPU.
Change amd_pmf_apply_policies() return type, so that it can return
errors when the call to retrieve information from amdgpu fails.
Co-developed-by: Mario
A policy binary is OS agnostic, and the same policies are expected to work
across the OSes. At times it becomes difficult to debug when the policies
inside the policy binaries starts to misbehave. Add a way to sideload such
policies independently to debug them via a debugfs entry.
Reviewed-by:
In order to provide GPU inputs to TA for the Smart PC solution to work, we
need to have interface between the PMF driver and the AMDGPU driver.
Add the initial code path for get interface from AMDGPU.
Co-developed-by: Mario Limonciello
Signed-off-by: Mario Limonciello
Signed-off-by: Shyam
Sometimes policy binary retrieved from the BIOS maybe incorrect that can
end up in failing to enable the Smart PC solution feature.
Use print_hex_dump_debug() to dump the policy binary in hex, so that we
debug the issues related to the binary even before sending that to TA.
Signed-off-by: Shyam
PMF driver based on the output actions from the TA can request to update
the system states like entering s0i3, lock screen etc. by generating
an uevent. Based on the udev rules set in the userspace the event id
matching the uevent shall get updated accordingly using the systemctl.
Sample udev
PMF driver sends constant inputs to TA which its gets via the other
subsystems in the kernel. To debug certain TA issues knowing what inputs
being sent to TA becomes critical. Add debug facility to the driver which
can isolate Smart PC and TA related issues.
Also, make source_as_str() as
P3T (Peak Package Power Limit) is a metric within the SMU controller
that can influence the power limits. Add support from the driver
to update P3T limits accordingly.
Reviewed-by: Mario Limonciello
Signed-off-by: Shyam Sundar S K
---
drivers/platform/x86/amd/pmf/pmf.h| 3 +++
PMF driver sends changing inputs from each subystem to TA for evaluating
the conditions in the policy binary.
Add initial support of plumbing in the PMF driver for Smart PC to get
information from other subsystems in the kernel.
Signed-off-by: Shyam Sundar S K
---
To sideload pmf policy binaries, the Smart PC Solution Builder provides a
debugfs file called "update_policy"; that gets created under a new debugfs
directory called "pb" and this new directory has to be associated with
existing parent directory for PMF driver called "amd_pmf".
In the current
PMF Policy binary is a encrypted and signed binary that will be part
of the BIOS. PMF driver via the ACPI interface checks the existence
of Smart PC bit. If the advertised bit is found, PMF driver walks
the acpi namespace to find out the policy binary size and the address
which has to be passed to
In the current code, the metrics table information was required only
for auto-mode or CnQF at a given time. Hence keeping the return type
of amd_pmf_set_dram_addr() as static made sense.
But with the addition of Smart PC builder feature, the metrics table
information has to be shared by the Smart
PMF TA (Trusted Application) loads via the TEE environment into the
AMD ASP.
PMF-TA supports two commands:
1) Init: Initialize the TA with the PMF Smart PC policy binary and
start the policy engine. A policy is a combination of inputs and
outputs, where;
- the inputs are the changing dynamics of
AMD PMF driver loads the PMF TA (Trusted Application) into the AMD
ASP's (AMD Security Processor) TEE (Trusted Execution Environment).
PMF Trusted Application is a secured firmware placed under
/lib/firmware/amdtee gets loaded only when the TEE environment is
initialized. Add the initial code
Smart PC Solutions Builder allows for OEM to define a large number of
custom system states to dynamically switch to. The system states are
referred to as policies, and multiple policies can be loaded onto the
system at any given time, however only one policy can be active at a
given time.
Policy
This patch adds support for userqueue eviction fences. In general, when
a process wants to map VRAM memory but TTM can't find enough space, it
attempts to evict BOs from its LRU list. This fence will prevent the TTM
manager from evicting the process's BOs from VRAM.
The general idea behind this
This patch blocks the amdgpu usermode queue IOCTL function until
a valid userspace client gets merged upstream. This patch must be
reverted as soon as we have the mesa-3D consumer stack available.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
The userspace sends us the doorbell object and the relative doobell
index in the object to be used for the usermode queue, but the FW
expects the absolute doorbell index on the PCI BAR in the MQD. This
patch adds a function to convert this relative doorbell index to
absolute doorbell index.
This
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds a function for the same.
V4: fix the wptr value before mapping lookup (Bas, Christian).
V5: Addressed review comments from Christian:
- Either pin object
This patch adds code to cleanup any leftover userqueues which
a user might have missed to destroy due to a crash or any other
programming error.
V7: Added Alex's R-B
Cc: Alex Deucher
Cc: Christian Koenig
Reviewed-by: Alex Deucher
Suggested-by: Bas Nieuwenhuizen
Signed-off-by: Bas
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soon as this mapping is done, the
queue would be considered ready to accept the workload.
V1: Addressed review comments from Alex on the RFC patch series
- Map/Unmap should be IP specific.
V2:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space offsets of these spaces.
V1: Addressed review comments on RFC patch:
Alex: Make this function IP
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Introduces MQD handler functions for the usermode queues.
- Adds new functions to create and
This patch introduces amdgpu_userqueue_object and its helper
functions to creates and destroy this object. The helper
functions creates/destroys a base amdgpu_bo, kmap/unmap it and
save the respective GPU and CPU addresses in the encapsulating
userqueue object.
These helpers will be used to
This patch adds:
- A new IOCTL function to create and destroy
- A new structure to keep all the user queue data in one place.
- A function to generate unique index for the queue.
V1: Worked on review comments from RFC patch series:
- Alex: Keep a list of queues, instead of single queue per
This patch adds skeleton code for amdgpu usermode queue.
It contains:
- A new files with init functions of usermode queues.
- A queue context manager in driver private data.
V1: Worked on design review comments from RFC patch series:
(https://patchwork.freedesktop.org/series/112214/)
- Alex: Keep
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queue for it. The
output of this UAPI is a queue id.
This UAPI maps the queue into GPU, so the graphics app can
This patch series introduces AMDGPU usermode queues for gfx workloads.
Usermode queues is a method of GPU workload submission into the graphics
hardware without any interaction with kernel/DRM schedulers. In this
method, a userspace graphics application can create its own workqueue
and submit it
[AMD Official Use Only - General]
If the behavior is correct, this patch looks like workaround HW reset not
flushed the TLB or something can be workaround by adding a gpu TLB flush.
Thanks,
Feifei
-Original Message-
From: Koenig, Christian
Sent: Tuesday, October 10, 2023 5:07 PM
To:
[AMD Official Use Only - General]
For the unlocking, I have tested on both nv21 and nv31, the unlock/lock paring
looks not break.
On asic gfx.is_poweron) always true, this parameter is
introduced from GFX11.
On gfx11, in the reset (suspend then resume) process, after suspend, gfx
poweron
Add reset option for fan_ctrl interfaces on the smu v13.0.7
User can use command "echo r > interface_name" to reset the
interface to boot value
Signed-off-by: Ma Jun
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 69 +--
1 file changed, 64 insertions(+), 5 deletions(-)
Add reset option for fan_ctrl interfaces.
For example:
User can use the "echo r > acoustic_limit_rpm_threshold" command
to reset acoustic_limit_rpm_threshold to boot value
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c| 12 ++
[AMD Official Use Only - General]
>> Then a TLB flush shouldn't be necessary on reset. A reset implies that the
>> TLB is cleared as well.
Hmm, in current implementation, when we say a reset implied that the TLB is
cleared, assume that the TLB clear is purely hardware action. There's no gpu
Xu, Feifei would like to recall the message, "[PATCH] drm/amdgpu:Check gfx
poweron when skip flush_gpu_tlb".
[AMD Official Use Only - General]
>> Then a TLB flush shouldn't be necessary on reset. A reset implies that the
>> TLB is cleared as well.
Hmm, in current implementation, when we say a reset implied that the TLB is
cleared, assume that the TLB clear is purely hardware action. There's no gpu
[AMD Official Use Only - General]
If gfx is not power on, both check will return ahead. The logic will not change.
If gfx is power on early in resume, tlb flush in the IP specific (gmc v11)
callback will never be called because it returned ahead in the higher level
check in
Hi Feifei,
yeah, that is correct behavior. The GMC callback should *not* get called
during resume in a reset, because the reset needs to take care of
invalidating the TLB anyway.
If the later doesn't work any more we need to re-iterate the reset
procedure and not mess with this here.
Add missing free on an error path.
Signed-off-by: Kunwu.Chan
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
Add missing free on an error path.
Fixes: 511a95552ec8 ("drm/amd/pm: Add SMU 13.0.6 support")
Signed-off-by: Kunwu.Chan
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Reviewed-by: Jingwen Chen
Best Regards,
JingWen Chen
On 2023/10/10 14:27, Lin.Cao wrote:
JPEG init header will overwirte vcn init header info which will
loss some debug information
Signed-off-by: Lin.Cao
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 4
1 file changed, 4 insertions(+)
[Public]
Thanks for clarification. This patch is
Reviewed-by: Yifan Zhang
-Original Message-
From: Huang, Tim
Sent: Tuesday, October 10, 2023 2:38 PM
To: Zhang, Yifan ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: RE: [PATCH] drm/amd/pm: wait for completion of the
[AMD Official Use Only - General]
Hi Yifan,
-Original Message-
From: Zhang, Yifan
Sent: Tuesday, October 10, 2023 1:31 PM
To: Huang, Tim ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: RE: [PATCH] drm/amd/pm: wait for completion of the EnableGfxImu command
[AMD
JPEG init header will overwirte vcn init header info which will
loss some debug information
Signed-off-by: Lin.Cao
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Kunwu.Chan
Sent: Tuesday, October 10, 2023 2:11 PM
To: Wang, Yang(Kevin)
Cc: Deucher, Alexander ; Kamal, Asad
; Koenig, Christian ; Zhang,
Hawking ; Ma, Le ; Lazar, Lijo
; Pan,
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