From: Christian König <christian.koe...@amd.com>
Printing a warning into the logs that we will certainly run into a BUG() is
completely nonsense, the BUG() is more than noisy enough.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amd
From: Christian König <christian.koe...@amd.com>
We don't have any update fence in that case, so the need
for flushing isn't detected atomatically.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++---
1 file changed, 3 inse
From: Christian König <christian.koe...@amd.com>
No need to try to map them very time.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 87 --
1 file changed, 51 insertions(+), 36 deletions(-)
From: Christian König <christian.koe...@amd.com>
No need to do this after every single update.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a
From: Christian König <christian.koe...@amd.com>
When a BO is moved or destroyed it shouldn't be kmapped any more.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers
From: Christian König <christian.koe...@amd.com>
Handy for debugging.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/dr
From: Christian König <christian.koe...@amd.com>
We need to wait with the correct owner on unmap operations or otherwise can run
into VM faults.
Also always wait for the page directory since this is where the reservation
object comes from. So rename the function to amdgpu_vm_wait_pd i
Am 12.07.2017 um 07:06 schrieb Felix Kuehling:
On 17-07-03 10:55 PM, Alex Deucher wrote:
On Mon, Jul 3, 2017 at 5:11 PM, Felix Kuehling <felix.kuehl...@amd.com> wrote:
From: Christian König <christian.koe...@amd.com>
They don't support VM mode yet.
Signed-off-by: Chr
: Alex Deucher <alexander.deuc...@amd.com>
ping? this fixes looking up the reference clocks on vega10 and raven.
The both two are Acked-by: Chunming Zhou <david1.z...@amd.com>
Acked-by: Christian König <christian.koe...@amd.com> as well.
I think somebody else should dig into t
Am 11.07.2017 um 17:43 schrieb Jason Ekstrand:
On Tue, Jul 11, 2017 at 12:17 AM, Christian König
<deathsim...@vodafone.de <mailto:deathsim...@vodafone.de>> wrote:
[SNIP]
If we ever want to share fences across processes
Am 12.07.2017 um 21:38 schrieb Felix Kuehling:
On 17-07-12 03:50 AM, Christian König wrote:
That optimization is unnecessary.
I have a patch in the pipeline that makes the VM BO permanently CPU
mapped and also fixes a couple of bugs in those code path.
You mean just for the CPU-update path
flush comes after the VM flush.
I think we could change that, but I'm not 100% sure what the
interactions with SRVIO are.
Christian.
Either way, this is Reviewed-by: Felix Kuehling <felix.kuehl...@amd.com>
Regards,
Felix
On 17-07-12 04:31 AM, Christian König wrote:
From: Chr
From: Christian König <christian.koe...@amd.com>
This should save us a bunch of command submission overhead.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 15 +++--
drivers/gpu/drm/amd/amdgpu/amdg
From: Christian König <christian.koe...@amd.com>
That should reduce our command submission overhead quite a bit.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 1 +
2 file
From: Christian König <christian.koe...@amd.com>
No need to do this on every CS.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/dr
Am 17.07.2017 um 19:22 schrieb Marek Olšák:
On Sun, Jul 16, 2017 at 11:36 PM, Dave Airlie wrote:
I can take a look at it, I just won't have time until next week most likely.
I've taken a look, and it's seemingly more complicated than I'm
expecting I'd want to land in Mesa
Am 17.07.2017 um 05:36 schrieb Dave Airlie:
I can take a look at it, I just won't have time until next week most likely.
I've taken a look, and it's seemingly more complicated than I'm
expecting I'd want to land in Mesa before 17.2 ships, I'd really
prefer to just push the new libdrm_amdgpu api
Am 14.07.2017 um 21:44 schrieb Felix Kuehling:
On 17-07-14 06:08 AM, Christian König wrote:
Am 13.07.2017 um 23:08 schrieb Felix Kuehling:
[SNIP]
+result += bytes;
+buf = (uint8_t *)buf + bytes;
+pos += bytes;
+len -= bytes;
+if (pos >= (nodes->
From: Christian König <christian.koe...@amd.com>
The hardware can use huge pages to map 2MB of address space with only one PDE.
v2: few cleanups and rebased
v3: skip PT updates if we are using the PDE
v4: rebased, added support for CPU based updates
Signed-off-by: Christian König <chri
From: Christian König <christian.koe...@amd.com>
The fragment bits work differently for Vega10 compared to previous generations.
Increase the fragment size to 2MB for now to better handle that.
v2: handle the hardware setup as well
Signed-off-by: Christian König <christian.koe..
in place?
Thanks.
Best Regards,
David
On 11 Jul 2017, at 5:28 PM, Christian König <deathsim...@vodafone.de> wrote:
I hoped that Dave Airlied will land it together with this patch.
As far as I know the closed source driver already doesn't use that any more
either.
Regards,
Christian.
Am 11.0
version in
specific?
We still rely on legacy semaphore implementation and we have to use it if sync
object still takes time.
Thanks.
Best Regards,
David
On 11 Jul 2017, at 5:15 PM, Christian König <deathsim...@vodafone.de> wrote:
From: Christian König <christian.koe...@amd.com>
Am 11.07.2017 um 11:20 schrieb Dave Airlie:
On 11 July 2017 at 18:36, Christian König <deathsim...@vodafone.de> wrote:
Am 11.07.2017 um 08:49 schrieb Dave Airlie:
On 7 July 2017 at 19:07, Christian König <deathsim...@vodafone.de> wrote:
Hi Dave,
on first glance that looks rathe
Am 11.07.2017 um 08:49 schrieb Dave Airlie:
On 7 July 2017 at 19:07, Christian König <deathsim...@vodafone.de> wrote:
Hi Dave,
on first glance that looks rather good to me, but there is one things I
don't really like and I strongly think Marek will absolutely agree on that:
When we add
From: Christian König <christian.koe...@amd.com>
This reverts commit 6b79c66b841dded6ffa6b56f14e4eb10a90a7c07
and commit 6afadeaf13279fcdbc48999f522e1dc90a9dfdaf.
Semaphore support was never used by any open source project and
not even widely by any closed source driver.
This should be re
Am 10.07.2017 um 17:28 schrieb Jason Ekstrand:
On Wed, Jul 5, 2017 at 6:04 PM, Dave Airlie > wrote:
From: Dave Airlie >
This interface will allow sync object to be used to back
Vulkan
and the reason why that even
Microsoft forbids that under windows.
Christian.
Alex Bin Xie
*From:*amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] *On
Behalf Of *Jason Ekstrand
*Sent:* Monday, July 10, 2017 11:53 AM
*To:* Christian König <deathsim...@vodafone.de>
*Cc:* Dave Airlie
Am 10.07.2017 um 17:52 schrieb Jason Ekstrand:
On Mon, Jul 10, 2017 at 8:45 AM, Christian König
<deathsim...@vodafone.de <mailto:deathsim...@vodafone.de>> wrote:
Am 10.07.2017 um 17:28 schrieb Jason Ekstrand:
On Wed, Jul 5, 2017 at 6:04 PM, Dave Airlie <ai
admore a function which returns the casted GEM
object or NULL in mind, but that should o it as well.
Patch is Reviewed-by: Christian König <christian.koe...@amd.com>
Regards,
Christian.
---
drivers/gpu/drm/drm_prime.c | 24
include/drm/drmP.h | 2 ++
2 files
Hi Dave,
on first glance that looks rather good to me, but there is one things I
don't really like and I strongly think Marek will absolutely agree on
that: When we add a new CS function then let's get ride of all this
abstraction!
The new function should get an amdgpu_device_handle and a
From: Christian König <christian.koe...@amd.com>
This allows setting the gtt size independent of the gart size.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++
From: Christian König <christian.koe...@amd.com>
Limit the default GART size and save a lot of VRAM.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +---
dri
From: Christian König <christian.koe...@amd.com>
Rename symbols from gtt_ to gart_ as appropriate.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 8 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 +++---
dri
From: Christian König <christian.koe...@amd.com>
No functional change, just cleanup.
v2: rebased, keep gart name.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 48 +---
drivers/gpu/drm/amd/amdgpu/amdgpu
From: Christian König <christian.koe...@amd.com>
Not used any more.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c |
Am 12.07.2017 um 15:19 schrieb Alex Deucher:
This allows us to read the vbios image directly from ROM.
This is already implemented for other asics, but was not
yet available for SI.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Acked-by: Christian König <christian.koe..
still worth doing in the short term IMO.
Yeah, agree. Especially avoiding the interrupt ring overflow sounds like
a good idea to me.
Patch is Acked-by: Christian König <christian.koe...@amd.com> as well.
Christian.
Regards,
Felix
On 17-07-03 05:11 PM, Felix Kuehling wrote:
Am 12.07.2017 um 17:53 schrieb Jason Ekstrand:
[SNIP]
Is that easier than just waiting in the kernel, I'm not sure how
optimised we need this path to be.
I don't think so. I think it's more-or-less the same code regardless
of how it's done. The advantage of doing it in the kernel
From: Christian König <christian.koe...@amd.com>
The test was relaxed a bit to much.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
Am 15.07.2017 um 05:32 schrieb Michel Dänzer:
On 15/07/17 04:47 AM, Felix Kuehling wrote:
On 17-07-13 11:26 PM, Michel Dänzer wrote:
On 14/07/17 06:08 AM, Felix Kuehling wrote:
Allows gdb to access contents of user mode mapped BOs. VRAM access
requires the driver to implement a new callback
com>
Impressive result for such a simple change.
Patch is Reviewed-by: Christian König <christian.koe...@amd.com>
Are the PCI IDs already const in amdgpu or do we need a similar patch
there as well? I only see patch 1 of 5 in my inbox.
Christian.
---
drivers/gpu/drm/radeon/rade
Am 13.07.2017 um 23:08 schrieb Felix Kuehling:
Allows gdb to access contents of user mode mapped VRAM BOs.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 59 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2
Am 13.07.2017 um 23:08 schrieb Felix Kuehling:
Allows gdb to access contents of user mode mapped BOs. VRAM access
requires the driver to implement a new callback in ttm_bo_driver.
One more comment additionally to what Michel already wrote below, apart
from that it looks good to me.
Am 18.07.2017 um 02:48 schrieb Dave Airlie:
From: Dave Airlie <airl...@redhat.com>
These are just wrappers using the amdgpu device handle.
Signed-off-by: Dave Airlie <airl...@redhat.com>
Reviewed-by: Christian König <christian.koe...@amd.com> for this one.
---
amdgp
on that?
Regards,
Christian.
Am 18.07.2017 um 04:24 schrieb zhoucm1:
Still holding on? I thought this patch was pushed in earlier with my RB.
Regards,
David Zhou
On 2017年07月18日 05:02, Christian König wrote:
From: Christian König <christian.koe...@amd.com>
The hardware can use huge pages to m
Am 18.07.2017 um 04:29 schrieb zhoucm1:
On 2017年07月18日 01:35, Christian König wrote:
Am 17.07.2017 um 19:22 schrieb Marek Olšák:
On Sun, Jul 16, 2017 at 11:36 PM, Dave Airlie <airl...@gmail.com>
wrote:
I can take a look at it, I just won't have time until next week
most likely.
I've
think in total we use something like maybe ~40 at maximum.
This way we wouldn't need 3 different get/free functions and save us a
bunch of logic spread around everywhere.
Anyway that can come later, let's fix the bug first. So with Alex
suggestions the patch is Reviewed-by: Christian Kön
more generic to handle private memory pools
* document callback return value
* WARN_ON -> WARN_ON_ONCE
Signed-off-by: Felix Kuehling <felix.kuehl...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com> for both.
---
drivers/gpu/drm/ttm/t
Am 18.07.2017 um 02:48 schrieb Dave Airlie:
From: Dave Airlie
This just sends chunks to the kernel API for a single command
stream.
This should provide a more future proof and extensible API
for command submission.
Signed-off-by: Dave Airlie
---
ctions to
access bo and context internals.
Signed-off-by: Dave Airlie <airl...@redhat.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
amdgpu/amdgpu.h| 30 ++
amdgpu/amdgpu_cs.c | 47 +++
2
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Christian König
<deathsim...@vodafone.de>
Sent: Monday, July 17, 2017 17:02
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix
Subject: [PATCH 2/2] drm/amdgpu: enable huge page handling in the VM v4
Fro
Am 17.07.2017 um 23:30 schrieb Felix Kuehling:
On 17-07-17 05:02 PM, Christian König wrote:
+ if (p->adev->asic_type < CHIP_VEGA10 ||
+ nptes != AMDGPU_VM_PTE_COUNT(p->adev) ||
+ p->func != amdgpu_vm_do_set_ptes ||
+ !(flags & AMDGPU_PTE
From: Christian König <christian.koe...@amd.com>
We use this mask multiple times in the bus setup.
v2: fix some style nit picks
Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevche...@gmail.com>
---
drivers/pci/pci.h |
Hi everyone,
This is the eighth incarnation of this set of patches. It enables device
drivers to resize and most likely also relocate the PCI BAR of devices
they manage to allow the CPU to access all of the device local memory at once.
This is very useful for GFX device drivers where the
From: Christian König <christian.koe...@amd.com>
This allows device drivers to request resizing their BARs.
The function only tries to reprogram the windows of the bridge directly above
the requesting device and only the BAR of the same type (usually mem, 64bit,
prefetchable). This i
From: Christian König <christian.koe...@amd.com>
Try to resize BAR0 to let CPU access all of VRAM.
v2: rebased, style cleanups, disable mem decode before resize,
handle gmc_v9 as well, round size up to power of two.
v3: handle gmc_v6 as well, release and reassign all BARs in the driv
From: Christian König <christian.koe...@amd.com>
This way we can safely call it on SI as well.
v2: fix type in commit message
Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevche...@gmail.com>
---
drivers/gpu/drm/amd/amdgpu/am
From: Christian König <christian.koe...@amd.com>
Most BIOS don't enable this because of compatibility reasons.
Manually enable a 64bit BAR of 64GB size so that we have
enough room for PCI devices.
v2: style cleanups, increase size, add resource name, set correct flags,
print m
submit the code, it allows more people to experiment with it.
Regards,
Felix
On 17-07-18 09:54 AM, Christian König wrote:
Yeah, I mean it looks good from the software side but we still don't
see the hardware react as it should.
It doesn't seem to hurt anything, so I'm torn apart between pushing
From: Christian König <christian.koe...@amd.com>
The fragment bits work differently for Vega10 compared to previous generations.
Increase the fragment size to 2MB for now to better handle that.
v2: handle the hardware setup as well
Signed-off-by: Christian König <christian.koe..
From: Christian König <christian.koe...@amd.com>
The hardware can use huge pages to map 2MB of address space with only one PDE.
v2: few cleanups and rebased
v3: skip PT updates if we are using the PDE
v4: rebased, added support for CPU based updates
v5: fix CPU based updates once more
Am 20.07.2017 um 16:59 schrieb Marek Olšák:
On Jul 19, 2017 10:21 PM, "zhoucm1" > wrote:
On 2017年07月19日 23:34, Marek Olšák wrote:
On Jul 19, 2017 3:36 AM, "zhoucm1" > wrote:
Yeah, with the coding style fixed Reviewed-by: Christian König
<christian.koe...@amd.com> as well.
Christian.
Am 20.07.2017 um 05:01 schrieb zhoucm1:
one small nit pick, with that fix, Reviewed-by: Chunming Zhou
<david1.z...@amd.com>
On 2017年07月20日 10:46, Alex Xie wrote:
In R
t;
You added the signed-off-by line twice, please fix this.
With that fixed and the commit message improved a bit the patch is
Reviewed-by: Christian König <christian.koe...@amd.com>.
Regards,
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 2 +-
1 file changed, 1 insertion(+), 1
Am 25.07.2017 um 00:45 schrieb Colin King:
From: Colin Ian King <colin.k...@canonical.com>
Trivial fix to spelling mistake in WARN_ONCE message
Signed-off-by: Colin Ian King <colin.k...@canoical.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
drivers/
Am 25.07.2017 um 11:50 schrieb Xiangliang.Yu:
Vega10 also support virtual display, remove the error message.
Signed-off-by: Xiangliang.Yu <xiangliang...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 ++
1 fil
The term "legacy VGA" sounds like the whole render functionality which
actually isn't part of the GMC AFAIK.
But what Alex primary disables here is the old VGA BAR in the CPU
address space and that is part of the GMC (or at least related to it).
BTW: Patch are Acked-by: Chris
Am 25.07.2017 um 05:30 schrieb Alex Deucher:
Needs to be done when the MC is set up.
v2: make consistent with other asics
Signed-off-by: Alex Deucher
On first glance it kind of looks a bit odd to have that in the GMC code,
but on second glance it actually makes
Am 26.07.2017 um 22:46 schrieb Yong Zhao:
We achieved that by setting the PTEs to 2 (the SYSTEM bit is set) when
the corresponding addresses are not occupied by gpu driver allocated
buffers.
Change-Id: I995c11c7a25bdaf7a16700d9e08a8fe287d49417
Signed-off-by: Yong Zhao
Please make sure that you only change the type, with that fixed the
patch is Reviewed-by: Christian König <christian.koe...@amd.com>.
Regards,
Christian.
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+ /* max_bytes applies to SDMA_OP
Am 27.07.2017 um 04:13 schrieb Alex Deucher:
This got missed when we open sourced this.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Ups, indeed that should be fixed ASAP.
Reviewed-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/clear
Am 27.07.2017 um 04:44 schrieb Deucher, Alexander:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Leo Liu
Sent: Wednesday, July 26, 2017 3:08 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Leo
Subject: [PATCH] drm/amdgpu: remove unused power
on runs, disable it for now till pg/cg. Also remove
clock manual setting when dpm disabled, which was inherited from uvd.
Signed-off-by: Leo Liu <leo@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
Am 27.07.2017 um 22:50 schrieb Alex Deucher:
On Thu, Jul 27, 2017 at 4:39 PM, Felix Kuehling wrote:
On 17-07-27 03:46 PM, Alex Deucher wrote:
No functional change until wptr polling uses this
location (future patch).
Cc: Frank Min
Signed-off-by:
Am 27.07.2017 um 21:46 schrieb Alex Deucher:
nbio registers are not used in this file.
Cc: Frank Min <frank@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Patches #1 and #3-#5 are Reviewed-by: Christian König
<christian.koe...@amd.com>.
I agree
leanup which removes a bunch of references to
amdgpu_bo_create(), so don't be surprised when you need to rebase your
patch once more before pushing.
The patch is Reviewed-by: Christian König <christian.koe...@amd.com> and
that rebase should only require you to remove changes, so feel f
-by: Yong Zhao <yong.z...@amd.com>
Reviewed-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 29 -
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
2 files changed, 27 insertions(+), 5 deletions(-)
diff --g
Am 27.07.2017 um 22:43 schrieb Alex Deucher:
Use a lower case b to be consistent with the other wb functions.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
I still suggest to get rid of all those variants and always allocate
256bits, but anyway the patch is Reviewed-by: Chr
Am 28.07.2017 um 03:43 schrieb Alex Deucher:
On Tue, Jul 25, 2017 at 5:47 PM, Kees Cook wrote:
As done for vega10 in commit 3ddd396f6b57 ("drm/amd/powerplay: Use
designated initializers") mark other tableFunction entries with designated
initializers. The randstruct
Am 28.07.2017 um 05:41 schrieb Alex Deucher:
The gfxhub and mmhub code are now helpers for gmc rather
than standalone IPs. When that changes these were left
over. Remove them.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Reviewed-by: Christian König <christian.koe..
Hi Yong,
looks pretty good to me, but still quite a few comments.
First of all please send the patches directly to the mailing list using
"git send-email" and not as attachment.
Patch #1:
+
+ switch (word_size) {
+ case 4:
+ num_dw = num_loops *
Am 30.06.2017 um 04:24 schrieb Michel Dänzer:
On 29/06/17 07:05 PM, Daniel Vetter wrote:
On Thu, Jun 29, 2017 at 06:58:05PM +0900, Michel Dänzer wrote:
On 29/06/17 05:23 PM, Christian König wrote:
Am 29.06.2017 um 04:35 schrieb Michel Dänzer:
On 29/06/17 08:26 AM, John Brooks wrote:
On Wed
Am 30.06.2017 um 03:36 schrieb Michel Dänzer:
On 30/06/17 12:03 AM, Marek Olšák wrote:
Do you have any concern if we also stop using the CPU_ACCESS flag on radeon?
No concern from my side for radeon.
On Thu, Jun 29, 2017 at 4:51 PM, Christian König
<deathsim...@vodafone.de> wrote:
Y
Am 30.06.2017 um 08:51 schrieb Michel Dänzer:
We can deal with that internally in the kernel, while fixing the
existing flag for userspace.
And as I said, NAK to that approach. I'm not going to add a
CPU_ACCESS_REALLY_REQUIRED flag in the kernel just because mesa has
messed up it's use case.
Am 30.06.2017 um 03:21 schrieb Michel Dänzer:
On 30/06/17 06:08 AM, Shaoyun Liu wrote:
1. Use spin lock instead of mutex in KIQ
2. Directly write to KIQ fence address instead of using fence_emit()
3. Disable the interrupt for KIQ read/write and use CPU polling
This list indicates that this
From: Christian König <christian.koe...@amd.com>
Keep them where they belong.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 44
drivers/gpu/drm/amd/amdgpu/amdgpu
From: Christian König <christian.koe...@amd.com>
Overwriting still used ring content has a low probability to cause
problems, not writing at all has 100% probability to cause problems.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgp
From: Christian König <christian.koe...@amd.com>
This allows us to flush the system VM here.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 4 ++--
drivers/gpu/dr
From: Christian König <christian.koe...@amd.com>
No need to do this on every round.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 70 ++---
1 file changed, 29 insertions(+), 41 deletions(-)
From: Christian König <christian.koe...@amd.com>
We can finally remove this now.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amd
From: Christian König <christian.koe...@amd.com>
This avoids binding them later on.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 16 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 49 ++
From: Christian König <christian.koe...@amd.com>
Limit the size of the GART table for the system domain.
This saves us a bunch of visible VRAM, but also limitates the maximum BO size
we can swap out.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/dr
From: Christian König <christian.koe...@amd.com>
No need to map BOs to GTT on eviction and intermediate transfers any more.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 19 ++-
1 file changed, 2 inser
From: Christian König <christian.koe...@amd.com>
This allows us to queue IBs which needs an up to date system domain as well.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2
From: Christian König <christian.koe...@amd.com>
We want to use them as remap address space.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 5 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +++
2 files changed,
From: Christian König <christian.koe...@amd.com>
This way we don't need to map the full BO at a time any more.
Signed-off-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 127 +++-
drivers/gpu/drm/amd/amdgpu/
Am 30.06.2017 um 09:14 schrieb Michel Dänzer:
On 30/06/17 03:59 PM, Christian König wrote:
Am 30.06.2017 um 08:51 schrieb Michel Dänzer:
We can deal with that internally in the kernel, while fixing the
existing flag for userspace.
And as I said, NAK to that approach. I'm not going to add
-by: Alex Deucher <alexander.deuc...@amd.com>
Cc: sta...@vger.kernel.org
Acked-by: Christian König <christian.koe...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.
Yeah, I was thinking something similar.
See the intention behind CPU_ACCESS_REQUIRED is to always guarantee that
CPU access is immediately possible.
If you ask me that is not really useful for the UMD and was never meant
to be used by Mesa (only the closed source UMD and some kernel internal
Am 30.06.2017 um 17:18 schrieb John Brooks:
For userspace BO allocations, replace AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
with a new AMDGPU_BO_FLAG_CPU_ACCESS flag. This flag will be used to
indicate that a BO should currently be CPU accessible. Unlike the
CPU_ACCESS_REQUIRED flag, it is meant to
801 - 900 of 9666 matches
Mail list logo