A few register addresses were declared in
amd/display/dc/dce*/dce*_resource.c.
They have been consolidated with the appropriate
master list of registers in
amd/include/asic_reg/dce/...
This will make them accessible to external tools that
need direct asic register access
Signed-off-by: David
- the initial eram and the
interrupt vectors. These are treated as seperate pieces of
firmware and loaded by PSP
The loading occurs in the sw_init hook of DM
If the firmware is not found, the sw_init hook returns without error.
DMCU is not a requirement for DM to run.
Signed-off-by: David Francis
- the initial eram and the
interrupt vectors. These are treated as seperate pieces of
firmware and loaded by PSP
The loading occurs in the sw_init hook of DM
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 2 +
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c| 6
loading into its own function, properly
release firmware, add debug messages
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 2 +
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c| 6 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 114 +-
3 files
active pipes.
If no, set clocks to 0
Signed-off-by: David Francis
---
.../amd/display/dc/dce100/dce100_resource.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
b/drivers/gpu/drm/amd/display/dc/dce100
loading into its own function, properly
release firmware, add debug messages
v3: Use one binary file which contains both firmware pieces
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 21 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 10 ++
drivers/gpu/drm
Watermarks were being multiplied by 1000 in amdgpu_dm
and divided by 1000 in powerplay. Change watermarks
to units of mhz to stop doing that.
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 24 +-
.../drm/amd/display/dc/dm_services_types.h| 16
We were multiplying clock requests by 1000 in amdgpu_dm
and then dividing them by 1000 in powerplay.
Also, the vega12 code was dividing by 10 when it should have been
multiplying (to convert units of 10kHz to units of kHz).
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/amdgpu_dm
The default unit in powerplay is 10kHz
To convert from 10kHz to kHz, multiply by 10
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
b
This will clean up powerplay code, as we are no longer
multiplying the clocks by 1000 in DM and then dividing them
by 1000 in powerplay
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 6 +++---
drivers/gpu/drm/amd/include/dm_pp_interface.h
Watermarks were being multiplied by 1000 in amdgpu_dm
and divided by 1000 in powerplay. Change watermarks
to units of mhz to stop doing that.
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 24 +-
.../drm/amd/display/dc/dm_services_types.h| 16
The default unit in powerplay is 10kHz
To convert from 10kHz to kHz, multiply by 10
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
b
This will clean up powerplay code, as we are no longer
multiplying the clocks by 1000 in DM and then dividing them
by 1000 in powerplay
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 6 +++---
drivers/gpu/drm/amd/include/dm_pp_interface.h
Watermarks were being multiplied by 1000 in amdgpu_dm
and divided by 1000 in powerplay. Change watermarks
to units of MHz to stop doing that.
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 24 +-
.../drm/amd/display/dc/dm_services_types.h| 16
Backlight Transfer Characteristics,
Ready To Undock Notification
Changed functions: Get System Parameters,
Get System BIOS Requests
All changes are right from the standard
ATI ACPI Control Methods V0.44
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 31
Move struct dmcu_version from dc.h to dmcu.h to allow
dmcu to be included on its own
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/Makefile | 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
drivers/gpu
ven
series ASICs and only on eDP monitors.
This is a new property on amdgpu connectors, with a range of
0 (off) to 4 (severe backlight reduction).
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +
.../g
Move struct dmcu_version from dc.h to dmcu.h to allow
dmcu to be included on its own
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/Makefile | 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
drivers/gpu
are, which is currently available for
Raven ASICs only. If the feature does not work, please
ensure your firmware is up to date.
v2:
Fix commit message, only attach property if DMCU loaded
v3:
Storre ABM level in crtc state to accommodate dc
Signed-off-by: David Francis
---
drivers/gpu/drm/
of
1 to hardware.
Signed-off-by: David Francis
Bugzilla: https://bugs.freedesktop.org/108668
Fixes: 416615ea9578 ("drm/amd/display: set backlight level limit to 1")
Cc: suresh.gutt...@amd.com
Cc: harry.wentl...@amd.com
Cc: samant...@posteo.net
---
.../gpu/drm/amd/display/amdgpu_dm/a
are, which is currently available for
Raven ASICs only. If the feature does not work, please
ensure your firmware is up to date.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +
.../gpu/drm/amd/display
The fallback code for getting default backlight caps was using
the wrong variable name. Fix it.
Fixes:
https://lists.freedesktop.org/archives/dri-devel/2018-November/197752.html
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file changed, 2
, but only once. Use
the backlight caps in the backlight-to-dc
calculation.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 83 +++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 59
are, which is currently available for
Raven ASICs only. If the feature does not work, please
ensure your firmware is up to date.
v2:
Fix commit message, only attach property if DMCU loaded
v3:
Store ABM level in crtc state to accommodate dc
v4:
Fix ABM saving on dpms cycle
Signed-off-by: Dav
Move struct dmcu_version from dc.h to dmcu.h to allow
dmcu to be included on its own
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/Makefile | 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
drivers/gpu
Read the version number from the common firmware header and store
it in the dm struct
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu
DMCU firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12
include/uapi/drm/amdgpu_drm.h | 2 ++
2 files changed, 14 insertions(+)
diff --git
David Francis (2):
drm/amd/display: Add DMCU firmware version
drm/amdgpu: Add DMCU to firmware query interface
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
and parsing
logic similar to MEC, to extract the two ucodes from a single
struct firmware.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 21 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 10 ++
2 files changed, 29 insertions(+), 2 deletions
v2: measure intv offset in bytes instead of words
David Francis (3):
drm/amd: Add ucode DMCU support
drm/amd: Add PSP DMCU support
drm/amd: Add DM DMCU support
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 21 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 10 ++
drivers/gpu/drm
.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
index 02be34e72ed9..240dc8c85867 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
+++ b
is loaded by the kernel's loading mechanism
and split into two ucodes according to the header.
DMCU is optional, so if the firmware is not found, no error or
warning is raised.
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 91 ++-
.../gpu/drm/amd
.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
index 02be34e72ed9..240dc8c85867 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
+++ b
is loaded by the kernel's loading mechanism
and split into two ucodes according to the header.
DMCU is optional, so if the firmware is not found, no error or
warning is raised.
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 91 ++-
.../gpu/drm/amd
and parsing
logic similar to MEC, to extract the two ucodes from a single
struct firmware.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 21 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 10 ++
2 files changed, 29 insertions(+), 2 deletions
David Francis (3):
drm/amd: Add ucode DMCU support
drm/amd: Add PSP DMCU support
drm/amd: Add DM DMCU support
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 21 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 10 ++
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c| 6 ++
.../gpu/drm
to be
enabled. It counts the register reads and writes since the
last entry
v2: Don't check for NULL before kfree
Signed-off-by: David Francis
Reviewed-by: Harry Wentland
Acked-by: Leo Li
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +
.../amd/display/amdgpu_dm/amdgpu_dm_trace.h
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 135
-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 33 ++-
drivers/gpu/drm/i915/intel_vdsc.c | 4 ++--
include/drm/drm_dsc.h | 4 ++--
3 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm
is
a property of DSC over any connector, not just DP, and because
drm drivers may have their own SDP structs they wish to use,
make the functions that initialise SDP and PPS headers take
the components they operate on, not drm_dsc_pps_infoframe,
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c
with
their own SDP struct headers
Re-sending due to Mail Delivery System errors
v2:
Rebase onto drm-next
Refactor drm_dsc_dp_pps_header_init
Clean up documentation on new drm function
David Francis (3):
drm/i915: Move dsc rate params compute into drm
drm/dsc: Add native 420 and 422 support
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 133
, so the
mux component of a group is larger by one additional mux word
and one additional component
Now that there is native 422 support, the configuration option
previously called enable422 is renamed to simple_422 to avoid
confusion
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c
-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 86 +++
drivers/gpu/drm/i915/intel_vdsc.c | 2 +-
include/drm/drm_dsc.h | 2 +-
3 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c
for drivers with
their own SDP struct headers
David Francis (3):
drm/i915: Move dsc rate params compute into drm
drm/dsc: Add native 420 and 422 support to compute_rc_params
drm/dsc: Change infoframe_pack to payload_pack
drivers/gpu/drm/drm_dsc.c | 236 --
drivers
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 135
-by: Harry Wentland
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dsc.c | 33 ++-
drivers/gpu/drm/i915/intel_vdsc.c | 4 ++--
include/drm/drm_dsc.h | 4 ++--
3 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm
with
their own SDP struct headers
v2:
Rebase onto drm-next
Refactor drm_dsc_dp_pps_header_init
Clean up documentation on new drm function
David Francis (3):
drm/i915: Move dsc rate params compute into drm
drm/dsc: Add native 420 and 422 support to compute_rc_params
drm/dsc: Split DSC PPS and SDP header
Some of the grandfathered amd display code does not follow
Linux coding style and emits warnings or errors on checkpatch
No functional changes here - just cleanup
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 96 +--
1 file changed, 47
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 80 +++
1 file changed, 80 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 145fd73025dc..8d5357aec5e8 100644
devices,
use the upstream (peer) device
For DP-to-HDMI or virtual DP peer devices,
use the output port
For the Synaptix workaround, use the link aux
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 30 ++-
1 file
Store it on drm_dp_mst_port
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
include/drm/drm_dp_mst_helper.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 398e7314ea8b
This field on drm_dp_mst_branch was never filled
Initialize it to zero when the list of ports is created.
When a port is added to the list, increment num_ports
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers
l not have been created yet
If no DSC is attempted, zero the DSC caps
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 123 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.h | 3 +
2 files changed, 125 insertions
This reverts commit 5f2fd347eeff7d4ce271920efd47baaa18fe968c.
Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
FEC into account (FEC reduces the PBN per timeslot)
Use the DC helpers (dc_bandwidth_in_kbps_from_timing,
dc_link_bandwidth_kbps) instead
Cc: Jerry Zuo
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 41 ---
1 file changed, 8 insertions(+), 33
To use these functions in drm driver directories, they must be
exported
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 53a0ad16e37b
policy itself. This includes
the code for detecting and validating DSC capabilities, enabling
DSC over a link, computing the fair DSC configurations for
multiple DSC displays, and adding to atomic state crtcs that might
need reprogramming due to DSC.
David Francis (14):
Revert "drm/amd/di
of this at the end of amdgpu atomic check. If it fails,
fail check; This combination of timings cannot be supported.
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 375
This reverts commit 55a6f5bbcf00a49565946c0a9b8c716313dc6c05.
This commit was accidentally promoted twice
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 4 --
.../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
In create_stream_for_sink, check for SST DP connectors
Parse DSC caps to DC format, then, if DSC is supported,
compute the config
DSC hardware will be programmed by dc_commit_state
Cc: Mikita Lipski
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32
timing
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
For DSC MST, sometimes monitors would break out
in full-screen static. The issue traced back to the
PPS generation code, where these variables were being used
uninitialized and were picking up garbage.
memset to 0 to avoid this
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/display/dc
This field on drm_dp_mst_branch was never filled
Initialize it to zero when the list of ports is created.
When a port is added to the list, increment num_ports,
and when a port is removed from the list, decrement num_ports.
v2: remember to decrement on port removal
Signed-off-by: David Francis
Store it on drm_dp_mst_port
Signed-off-by: David Francis
Reviewed-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
include/drm/drm_dp_mst_helper.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm
During MST mode enumeration, if a new dc_sink is created,
populate it with dsc caps as appropriate.
Use drm_dp_mst_dsc_caps_for_port to get the raw caps,
then parse them onto dc_sink with dc_dsc_parse_dsc_dpcd.
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../display
Instead of having drm_dp_dpcd_read/write and
drm_dp_mst_dpcd_read/write as entry points into the
aux code, have drm_dp_dpcd_read/write handle both.
This means that DRM drivers can make MST DPCD read/writes.
Cc: Leo Li
Cc: Lyude Paul
Signed-off-by: David Francis
---
drivers/gpu/drm
k branch_dev_id = 0x90CC24 (Synaptix)
- There is exactly one branch device between the link and output
In this case, DSC can be attempted, but only using the *link*
aux device's caps. This is a quirk.
Cc: Lyude Paul
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
Rework the dm_helpers_write_dsc_enable callback to
handle the MST case.
Use the drm_dp_mst_dsc_enable helper.
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 16 +++-
1 file changed, 15 insertions(+), 1
of this at the end of amdgpu atomic check. If it fails,
fail check; This combination of timings cannot be supported.
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 375
and before adding connectors
and planes on modesetting crtcs
Cc: Leo Li
Cc: Nicholas Kazlauskas
Cc: Lyude Paul
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 77 +++
1 file changed, 77 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
For DSC MST, sometimes monitors would break out
in full-screen static. The issue traced back to the
PPS generation code, where these variables were being used
uninitialized and were picking up garbage.
memset to 0 to avoid this
Signed-off-by: David Francis
Reviewed-by: Nicholas Kazlauskas
With DSC, bpp can be a multiple of 1/16, so
drm_dp_calc_pbn_mode is insufficient.
Add drm_dp_calc_pbn_mode_dsc, a function which is
the same as drm_dp_calc_pbn_mode, but the bpp is
in units of 1/16.
Cc: Lyude Paul
Cc: Nicholas Kazlauskas
Signed-off-by: David Francis
---
drivers/gpu/drm
are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
This reverts commit 55a6f5bbcf00a49565946c0a9b8c716313dc6c05.
This commit was accidentally promoted twice
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 4 --
.../gpu/drm
are reprogrammed
v2: Updating patches 6 and 14 in respoinse to Nick's feedback
v3: Add return value to patch 6 and split it (now patches 6 & 7)
New patch 10 adding MST DPCD read/write support
Minor fix (num_ports--) to patch 11
Add DRM helpers (patch 12)
David Francis (16):
Revert &quo
In create_stream_for_sink, check for SST DP connectors
Parse DSC caps to DC format, then, if DSC is supported,
compute the config
DSC hardware will be programmed by dc_commit_state
Tested-by: Mikita Lipski
Signed-off-by: David Francis
Reviewed-by: Nicholas Kazlauskas
---
.../gpu/drm/amd
timing
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers
to cover our approach. Use the same
means of calculating pbn per time slot as the DSC code.
Cc: Jerry Zuo
Cc: Nicholas Kazlauskas
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git
This reverts commit 5f2fd347eeff7d4ce271920efd47baaa18fe968c.
Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed
l not have been created yet
If no DSC is attempted, zero the DSC caps
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 123 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.h | 3 +
2 files changed, 125 insertions
In create_stream_for_sink, check for SST DP connectors
Parse DSC caps to DC format, then, if DSC is supported,
compute the config
DSC hardware will be programmed by dc_commit_state
Tested-by: Mikita Lipski
Signed-off-by: David Francis
Reviewed-by: Nicholas Kazlauskas
---
.../gpu/drm/amd
timing
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers
To use these functions in drm driver directories, they must be
exported
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index b40d975aec76
Store it on drm_dp_mst_port
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
include/drm/drm_dp_mst_helper.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index d789b7af7dbf
This reverts commit 55a6f5bbcf00a49565946c0a9b8c716313dc6c05.
This commit was accidentally promoted twice
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 4 --
.../gpu/drm
of this at the end of amdgpu atomic check. If it fails,
fail check; This combination of timings cannot be supported.
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 375
feedback
David Francis (14):
Revert "drm/amd/display: skip dsc config for navi10 bring up"
Revert "drm/amd/display: navi10 bring up skip dsc encoder config"
Revert "drm/amd/display: add global master update lock for DCN2"
Revert "drm/amd/display: Fix
are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
devices,
use the upstream (peer) device
For DP-to-HDMI or virtual DP peer devices,
use the output port
For the Synaptix workaround, use the link aux
Cc: Wenjing Liu
Cc: Nikola Cornij
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 30 ++-
1 file
and before adding connectors
and planes on modesetting crtcs
Cc: Leo Li
Cc: Nicholas Kazlauskas
Signed-off-by: David Francis
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 74 +++
1 file changed, 74 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b
This field on drm_dp_mst_branch was never filled
Initialize it to zero when the list of ports is created.
When a port is added to the list, increment num_ports
Signed-off-by: David Francis
---
drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers
For DSC MST, sometimes monitors would break out
in full-screen static. The issue traced back to the
PPS generation code, where these variables were being used
uninitialized and were picking up garbage.
memset to 0 to avoid this
Signed-off-by: David Francis
Reviewed-by: Nicholas Kazlauskas
to cover our approach. Use the same
means of calculating pbn per time slot as the DSC code.
v2: Add drm helper for clock to pbn conversion
Cc: Jerry Zuo
Cc: Nicholas Kazlauskas
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 18 +---
drivers/gpu/drm
This reverts commit 5f2fd347eeff7d4ce271920efd47baaa18fe968c.
Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works
Signed-off-by: David Francis
Reviewed-by: Roman Li
Reviewed-by: Harry Wentland
Reviewed
: amd-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare
Reviewed-by: Lyude Paul
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c
: amd-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare
Reviewed-by: Lyude Paul
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c
: amd-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare
Reviewed-by: Lyude Paul
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c
: amd-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: intel-...@lists.freedesktop.org
Reviewed-by: Manasi Navare
Reviewed-by: Lyude Paul
Reviewed-by: Harry Wentland
Signed-off-by: David Francis
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c| 2 +-
drivers/gpu/drm
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