patch 1-8 are some fixes for sriov gpu reset feature
patch 9 -20 are for sriov gpu reset
BR Monk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Monk Liu
<monk@amd.com>
发送时间: 2017年2月7日 14:11:07
收件人: amd-gfx@lists.freedesktop.org
抄送:
.
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年2月7日 19:12:04
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 07/21] drm/amdgpu:fix gart table vram pin
> Because gpu_srio_reset (will send patch for this routine later) doe
this patch is dropped, we can call gart_vram_pin even the bo is already pinned,
the internal of pin function will check that, thanks
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年2月7日 19:12:04
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
() and resume()
in pair ..
I agree use hw_init without suspend is more reasonable
thanks
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年2月8日 下午 11:27
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: 答复: 答复: SPAM //答复: [PATCH 09/20] drm/amdgpu:imp
we will send another patch to fix it later that using ->hw_init instead of
->resume .
BR Monk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Liu, Monk
<monk@amd.com>
发送时间: 2017年2月8日 23:40:35
收件人: Christian König; amd-gfx@lists.
don't block driver proceeding after ib test failure detected ,
doable ?
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年2月8日 23:59:10
收件人: Liu, Monk; Michel Dänzer
抄送: amd-gfx@lists.freedesktop.org
主题: Re: 答复: 答复: [PATCH] drm/amdgpu:fix amdgpu_sa_bo_new
yeah, make sense
@Christian, why move fbdev_init() further down after ib test ? any
consideration ?
发件人: Michel Dänzer <mic...@daenzer.net>
发送时间: 2017年2月8日 23:19:23
收件人: Christian König; Liu, Monk
抄送: amd-gfx@lists.freedesktop.org
主题: Re: [PATCH] drm/amdg
agreed, why not just use cpu to clear it ? is it because performance ?
发件人: Michel Dänzer <mic...@daenzer.net>
发送时间: 2017年2月8日 23:52:02
收件人: Christian König; Liu, Monk
抄送: amd-gfx@lists.freedesktop.org
主题: Re: 答复: [PATCH] drm/amdgpu:fix amdgpu_sa_bo_new
messed up I don't think the test will easy pass. hw_init()
just call resume per engine.
you can take a deep look into sriov_gpu_reset and judge later
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年2月8日 18:49:57
收件人: Liu, Monk; a
月8日 23:13:46
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: 答复: SPAM //答复: [PATCH 09/20] drm/amdgpu:implement SRIOV gpu_reset
and like I said, this approach is correct and verified by hang test
Completely irrelevant.
Please try the following:
1. Trigger a hang
2. Reset the GPU
3. Suspend
Monday, February 06, 2017 10:31 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/21] drm/amdgpu:fix gart table vram pin
Hui? We shouldn't need to call this function from a GPU reset, do we really do
so?
But even if we call it from GPU reset we certain
06, 2017 4:14 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/21] drm/amdgpu:fix gart table vram pin
A bug NAK on this! amdgpu_gart_table_vram_unpin() must be called during suspend.
Otherwise the GART table can be corrupted and we run into a whole
, February 06, 2017 4:24 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/21] drm/amdgpu:BUG if gpu_reste and asic_reset from VF
Am 04.02.2017 um 11:34 schrieb Monk Liu:
> for SRIOV vf, Guest couldn't really access PCI registers so
&g
Thanks,
I hadn't test S3 feature currently so didn't run into it by far
BR Monk
-Original Message-
From: Zhu, Rex
Sent: Monday, February 06, 2017 8:32 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>
Subject: RE: [PATC
Thanks, I'll sort & cleanup my patches and send again.
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
Sent: Monday, February 06, 2017 4:18 PM
To: Zhou, David(ChunMing) <david1.z...@amd.com>; Liu,
: Wednesday, February 08, 2017 12:11 AM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>
Subject: RE: [PATCH 15/20] drm/amdgpu:use work instead of delay-work
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lis
thanks for this catch!
Reviewed-by: Monk Liu <monk@amd.com>
发件人: Colin King <colin.k...@canonical.com>
发送时间: 2017年2月4日 4:23:42
收件人: Deucher, Alexander; Koenig, Christian; David Airlie; Liu, Monk; Yu,
Xiangliang; amd-gfx@lists.freedesktop
FIJI is not supported in current stack
发件人: Yu, Xiangliang
发送时间: 2017年2月6日 10:35:34
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
抄送: Liu, Monk
主题: RE: [PATCH 02/21] drm/amdgpu:fix golden init for sriov
Does FIJI need the golden init?
Thanks!
Xiangliang Yu
yeah, there are 21 patches totally, but no need to expose all in one time
发件人: Yu, Xiangliang
发送时间: 2017年2月6日 10:38:23
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
抄送: Liu, Monk
主题: RE: [PATCH 05/21] drm/amdgpu:BUG if gpu_reste and asic_reset from VF
Have you
thanks for the catch, without those full access protection reboot is failed,
I'll remove it and adjust later patches for TDR
BR Monk
发件人: Liu, Monk
发送时间: 2017年2月6日 10:39:08
收件人: Yu, Xiangliang; amd-gfx@lists.freedesktop.org
主题: 答复: [PATCH 05/21] drm/amdgpu:BUG
anyone to review those patches ?
they are for SRIOV case mainly, and they are prepare for later TDR feature
(GPU-reset on SR-IOV)
发件人: Monk Liu <monk@amd.com>
发送时间: 2017年2月4日 18:34:59
收件人: amd-gfx@lists.freedesktop.org
抄送: Liu, Monk
主题: [PATCH 07/2
this patch is not needed, xgpu_vi_init_golden_registers(adev) will further
process each VI asic accordingly.
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Liu, Monk
<monk@amd.com>
发送时间: 2017年2月6日 10:37:55
收件人: Yu, Xiangli
I'll re-send the patch serials later, couple patches once
BR Monk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Michel Dänzer
<mic...@daenzer.net>
发送时间: 2017年2月6日 11:07:08
收件人: Liu, Monk; Yu, Xiangliang
抄送: amd-gfx@lists.freedesktop.or
please ignore those patches and we will give a formal patch serial later when
confirm good working
BR Monk
?件人: amd-gfx 代表 Felix Kuehling
?送??: 2017年1月25日 3:04:48
收件人:
ate
BR Monk
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月20日 16:48:17
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB(v3)
Yeah, thought about that possibility as well when we
> 代表 Liu, Monk
<monk@amd.com>
发送时间: 2017年1月22日 10:47:03
收件人: Christian König; amd-gfx@lists.freedesktop.org
主题: 答复: [PATCH] drm/amdgpu:guarantee 128dws between vm flush and IB(v3)
1, windows separate vm flush and gfx submit, so if with vm flush windows
actually submit 256 dw totally
Reviewed-by: Monk Liu <monk@amd.com>
发件人: Trigger Huang <trigger.hu...@amd.com>
发送时间: 2017年2月16日 18:48:19
收件人: amd-gfx@lists.freedesktop.org
抄送: Liu, Monk; Yu, Xiangliang; Huang, Trigger
主题: [PATCH] drm/amdgpu: Fix module unload hang by KIQ IRQ
];
};
change:
struct vi_mqd*mqd_backup[AMDGPU_MAX_COMPUTE_RINGS + 1];
to:
void *mqd_backup[AMDGPU_MAX_COMPUTE_RINGS + 1];
thanks
with above address,
Reviewed-by: Monk Liu <monk@amd.com>
other two patches:
Reviewed-by: Monk Liu <monk@amd.com>
BR Monk
disaster ...
another reason is we keep each DMAframe to 256dw is for better performance.
BR Monk
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月18日 17:28:15
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH] drm/amdgpu:guarantee 128dws between
sorry, I see we already have padding inside ring_alloc, I'll see why I still get
[drm:amdgpu_ring_insert_nop [amdgpu]] *ERROR* amdgpu: writing more dwords to
the ring than expected!
BR Monk
发件人: Liu, Monk
发送时间: 2017年1月18日 15:04:57
收件人: amd-gfx
pu]] *ERROR* amdgpu: writing more dwords to
the ring than expected!
any comments ?
BR Monk
________
发件人: Monk Liu <monk@amd.com>
发送时间: 2017年1月18日 14:56:46
收件人: amd-gfx@lists.freedesktop.org
抄送: Liu, Monk
主题: [PATCH] drm/amdgp
Reviewed-by: Monk Liu <monk@amd.com>
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Xiangliang Yu
<xiangliang...@amd.com>
发送时间: 2017年1月18日 13:00:14
收件人: amd-gfx@lists.freedesktop.org
抄送: Yu, Xiangliang
主题: [PATCH 1/2] drm/amdgpu:
Reviewed-by: Monk Liu <monk@amd.com>
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Xiangliang Yu
<xiangliang...@amd.com>
发送时间: 2017年1月18日 13:00:26
收件人: amd-gfx@lists.freedesktop.org
抄送: Yu, Xiangliang
主题: [PATCH 2/2] drm/amdgpu/v
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Christian König
<deathsim...@vodafone.de>
发送时间: 2017年1月18日 20:52:14
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: 答复: [PATCH] drm/amdgpu:guarantee 128dws between vm flush and I
mit
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
Sent: Thursday, January 19, 2017 5:11 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:guarantee 128dws between
frame.
e.g. we insert 180 dw this frame, start from0, end up at 179, and ring_commit()
padding NOPs and make wptr end up at 255, so only 75 NOPs is between
SWITCH_BUFFER and next frame (assume we don't have vm-flush next frame)
BR Monk
-Original Message-
From: Liu, Monk
Sent: Thursday
if ring_write_multiple is organized in a separate patch, doesn't it introduces
an function that no client using it ??
fine by me although ...
BR Monk
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月12日 20:27:48
收件人: Liu, Monk; a
-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
Sent: Wednesday, August 24, 2016 4:56 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Wang, Daniel(Xiaowei) <daniel.wa...@amd.com>; Jiang, Jerry (SW)
<jerry.ji...@amd.c
n for gfx and compute ring, why
SDMA engine is involved ?
And besides compute UMD doesn't need CE by far, so only GFX ring need preamble
CE IB by far.
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Wednesday, August 24, 2016 5:38 PM
To: Liu, Monk <monk@a
where DE is updating the page
table it will work due to the padding and the limitation of the ROQ.
/Hans
From: Liu, Monk
Sent: Monday, August 15, 2016 11:35 PM
To: Fernlund, Hans
Cc: Deucher, Alexander; Li, Bingley; Liu, Robert; Wang, Daniel(Xiaowei); Jiang,
Jerry (SW)
Subject: FW: CE synchron
switch or not, the way is that it should always run
“preamble CE IB” to restore the CE ram.
BR Monk
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Liu,
Monk
Sent: Wednesday, August 24, 2016 5:23 PM
To: Christian König <deathsim...@vodafone.de>; a
David,
No matter what's the initial purpose of this patch is, I think this patch is
needed, otherwise context switch judgment will be incorrect , e.g. process1 and
process2 can both have a context id 99, and that will
Lead to incorrect skipping of PREAMBLE CE IB
BR monk
-Original
ntext is already globally unique, so
never mind, our current code is okay!
Thanks
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
Sent: Wednesday, August 24, 2016 8:21 PM
To: Liu, Monk <monk@amd.com>; Zhou, Dav
But even user space will submit 10 ibs this submission, the calculate of
256*ibs is totally overflow, remember that ring buffer is only 4kb size
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Thursday, August 25, 2016 4:12 PM
To: Liu, Monk <m
Yeah, I was already doing that
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Thursday, August 25, 2016 4:08 PM
To: Liu, Monk <monk@amd.com>; Zhou, David(ChunMing) <david1.z...@amd.com>;
amd-gfx@lists.freedesktop.org
Cc: Mao, David <da
Yeah, CPC cannot use constant engine.
BR Monk
-Original Message-
From: Marek Olšák [mailto:mar...@gmail.com]
Sent: Tuesday, September 06, 2016 3:13 AM
To: Deucher, Alexander <alexander.deuc...@amd.com>
Cc: Christian König <deathsim...@vodafone.de>; Liu, Monk <monk@amd
TROL patch
BR Monk
-Original Message-
From: Koenig, Christian
Sent: Monday, September 05, 2016 7:57 PM
To: Liu, Monk <monk@amd.com>
Cc: brahma_hybrid_dev <brahma_hybrid_...@amd.com>
Subject: Re: [PATCH] drm/amdgpu:implement CONTEXT_CONTROL (v3)
Another possible solution
-Original Message-
From: Bas Nieuwenhuizen [mailto:b...@basnieuwenhuizen.nl]
Sent: Thursday, September 01, 2016 4:19 PM
To: Liu, Monk <monk@amd.com>
Cc: Christian König <deathsim...@vodafone.de>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:implement CONTEXT_CO
Oh, yeah. That is missed, thanks!
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
zhoucm1
Sent: Thursday, September 08, 2016 2:01 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:imp
ualization.
You need think it twice, you are insisting a wrong design/approach although it
runs for years.
BR Monk
BR Monk
-Original Message-
From: Bas Nieuwenhuizen [mailto:b...@basnieuwenhuizen.nl]
Sent: Friday, September 02, 2016 12:09 AM
To: Liu, Monk <monk@amd.com&
Behalf Of
Christian K?nig
Sent: Thursday, September 01, 2016 10:10 PM
To: Liu, Monk <monk@amd.com>; Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:implement CONTEXT_CONTROL (v3)
Am 01.09.2016 um 12:55 schrieb Liu, Monk:
>
ember 01, 2016 10:10 PM
To: Liu, Monk <monk@amd.com>; Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:implement CONTEXT_CONTROL (v3)
Am 01.09.2016 um 12:55 schrieb Liu, Monk:
>> Why does that makes a difference if it
, September 30, 2016 5:07 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:fix exclusive mode game texture blank(v2)
NAK, please stop adding workarounds like this into common code.
If we need to add the extra NOPs between each command submission tha
Already pushed to staging because Pro team are kinda hurry for this fix
The alloc size isn't need changed, cuz it always count vm_flush() in event no
vm_flush needed
BR Monk
-Original Message-
From: Deucher, Alexander
Sent: Friday, September 30, 2016 9:23 PM
To: Liu, Monk <m
Is that applied to all ring ?
Cuz seems only GFX ring each lot of dw per submit ...
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Thursday, September 15, 2016 3:24 PM
To: Andy Furniss <adf.li...@gmail.com>; Liu, Monk <monk@amd.c
All those 5 patches are :
Reviewed-by: Monk Liu <monk@amd.com>
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex
Deucher
Sent: Tuesday, September 20, 2016 2:36 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <alexa
stian.koe...@amd.com>
Cc: Wang, Ken <ken.w...@amd.com>; Huang, Ray <ray.hu...@amd.com>; Liu, Monk
<monk@amd.com>
Subject: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue
From: Huang Rui <ray.hu...@amd.com>
Fix commit (ed22ee2 drm/amdgpu:changes of vir
tian König [mailto:deathsim...@vodafone.de]
Sent: Tuesday, September 06, 2016 5:39 PM
To: Liu, Monk <monk@amd.com>; Koenig, Christian <christian.koe...@amd.com>;
Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu:i
256dw is enough
TODO:
use DMAframe entry design to implement ib_schedule(), make sure each DMAframe
is aligned and fixed at their offset, which is needed for preemption and easy
for ring buffer debug & dump.
Change-Id: I1b98d6352b7ead91b661094921bfd43cfeaae190
Signed-off-by: Monk Liu &
-Original Message-
From: Monk Liu [mailto:monk@amd.com]
Sent: Wednesday, August 24, 2016 12:00 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>
Subject: [PATCH] drm/amdgpu:fix DMAframe for GFX8
1,drop inserting double SWITCH_BUFFERS scheme, which i
But speaking with practice attitude: at least close source UMD OCL doesn't use
CE at all, and I guess MESA either ...
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Monday, August 29, 2016 4:25 PM
To: Liu, Monk <monk@amd.com>; a
n K?nig
Sent: Monday, August 29, 2016 4:10 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/amdgpu:implement CONTEXT_CONTROL
Am 29.08.2016 um 04:55 schrieb Monk Liu:
> use CONTEXT_CONTROL package to dynamically skip preamble IB and other
> l
But for VI. My patch will reduce those 5 redundant SB and one SB can always use
ping-pong buffer,
so the performance looks raised around 5%.
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Liu,
Monk
Sent: Friday, August 26, 2016 11
of DE by a certain number DW )
So I think CE can keep the original logic.
BR Monk
-Original Message-
From: Deucher, Alexander
Sent: Thursday, August 25, 2016 9:33 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>
Subject: RE
Okay, good advice
BR Monk
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Friday, October 21, 2016 10:55 PM
To: Christian König <deathsim...@vodafone.de>
Cc: Liu, Monk <monk@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
Subjec
I have no strong opinion, I checked windows kmd and they separate vgt-flush and
cntx-ctrl as well,
Fine with your suggestion
BR Monk
-邮件原件-
发件人: Christian König [mailto:deathsim...@vodafone.de]
发送时间: Monday, November 14, 2016 7:33 PM
收件人: Liu, Monk; amd-...@freedesktop.org
主题: Re: 答复
Alex, the patch is already rebased against staging-4.7 , it just fixed non-FIJI
pass-through bug, which should use regular rules but without this patch it
will always do post.
BR Monk
-邮件原件-
发件人: Deucher, Alexander
发送时间: Friday, November 11, 2016 11:05 PM
收件人: Liu, Monk; amd
Please use "drm/amdgpu" as th prefix for the title
-邮件原件-
发件人: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] 代表 Xiangliang Yu
发送时间: Monday, November 21, 2016 2:13 PM
收件人: amd-...@freedesktop.org
抄送: Yu, Xiangliang
主题: [PATCH 1/2] amdgpu: fix firmware loading failure
For
, November 01, 2016 3:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>; Yu, Xiangliang <xiangliang...@amd.com>;
Huang, Trigger <trigger.hu...@amd.com>
Subject: [PATCH] drm/amdgpu: Add a ring type KIQ definition
Add a new ring type definition for KIQ. KIQ is us
<trigger.hu...@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Min, Frank <frank@amd.com>; Yu, Xiangliang <xiangliang...@amd.com>;
Liu, Monk <monk@amd.com>; Huang, Trigger <trigger.hu...@amd.com>
Subject: RE: [PATCH] drm/amdgpu:bypass avfs event manager for sriov
>
, Reviewed-by: Monk Liu
<monk@amd.com>
发件人: Liu, Monk
发送时间: 2017年1月12日 11:19:40
收件人: Christian König; Yu, Xiangliang; amd-gfx@lists.freedesktop.org
主题: 答复: [V3 04/11] drm/amdgpu/virt: use kiq to access registers
Xiangliang
please BUG() when register access o
Xiangliang
please BUG() when register access occured in RUNTIME and IRQ context, e.g.:
if (amdgpu_sriov_runtime(adev)) {
}
return amdgpu_virt_kiq_wreg(adev, reg, v);
with above addressed, Reviewed-by: Monk Liu <monk@amd.com>
发件人: amd-gfx &l
Sounds make sense!
BR Monk
-Original Message-
From: Yu, Xiangliang
Sent: Wednesday, January 11, 2017 11:04 PM
To: Yu, Xiangliang <xiangliang...@amd.com>; Liu, Monk <monk@amd.com>;
amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun <shaoyun@amd.com>
Subject: RE: [V3
Reviewed-by: Monk Liu
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Xiangliang Yu
Sent: Wednesday, January 11, 2017 9:18 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, Xiangliang
Subject: [V3 09/11] drm/amdgpu/virt:
We should BUG and not access register at all if found during RUNTIME &&
IRQ_context
By far.
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Wednesday, January 11, 2017 10:44 PM
To: Liu, Monk <monk@amd.com>; Yu, Xianglia
ary 11, 2017 8:46 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm/amdgpu:new field members for SRIOV
Am 11.01.2017 um 11:43 schrieb Monk Liu:
> and implement CSA functions in this file
>
> Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb
he interfaces to support virtualization.
Signed-off-by: Xiangliang Yu <xiangliang...@amd.com>
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 57
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 14
2 fil
See in lines
-Original Message-
From: Yu, Xiangliang
Sent: Wednesday, January 11, 2017 10:27 PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Subject: RE: [V3 05/11] drm/amdgpu/virt: add high level interfaces for virt
> This patch is not derived from my
PM
To: Liu, Monk <monk@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun <shaoyun@amd.com>
Subject: RE: [V3 06/11] drm/amdgpu/virt: implement VI virt operation interfaces
> -Original Message-----
> From: Liu, Monk
> Sent: Wednesday, January 11, 2017 10:28 PM
__
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月9日 19:04:44
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 7/7] drm/amdgpu:map/unmap static csa accordingly
Am 09.01.2017 um 09:03 schrieb Monk Liu:
> and update CSA bo_va in each submit
>
> Change-Id: I5e
think they should
be put into common structure at all.
see we have "struct amdgpu_virt" in "struct amdgpu_device", the same style
BR Monk
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月9日 18:57:06
收件人: Liu, Monk; amd-gfx@l
and strictly speaking that's not constant, the address is calculated ...
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月9日 18:57:06
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 2/7] drm/amdgpu:new field members for SRIOV
Am 09.01.2
of directly reading them via KIQ )
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Wednesday, January 11, 2017 9:38 PM
To: Yu, Xiangliang <xiangliang...@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Liu, Monk <monk@amd.com>
Subject: R
> + fence_get(f);
> + amdgpu_ring_commit(ring);
> + mutex_unlock(>virt.lock);
> +
> + r = fence_wait(f, false);
> + fence_put(f);
Why do you grab and release an extra fence reference here?
Christian.
[ML] e.g. without those grab/release pare, if fence is signaled right
> + mutex_lock(>virt.lock);
> + amdgpu_ring_alloc(ring, 32);
> + amdgpu_ring_emit_hdp_flush(ring);
> + amdgpu_ring_emit_rreg(ring, reg);
> + amdgpu_ring_emit_hdp_invalidate(ring);
> + amdgpu_fence_emit(ring, );
> + fence_get(f);
> + amdgpu_ring_commit(ring);
> +
onk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Liu, Monk
<monk@amd.com>
发送时间: 2017年1月11日 11:06:34
收件人: Christian König; Yu, Xiangliang; amd-gfx@lists.freedesktop.org
主题: 答复: [V2 04/11] drm/amdgpu/virt: use kiq to access registers
>
Reviewed-by: monk liu
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Xiangliang Yu
Sent: Friday, December 02, 2016 2:04 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, Xiangliang ; Liu, Shaoyun
after you removed this interface, don't forget to call thos
"xx_detect_hw_virtualization" in head of xx_set_ip_blocks() routine
e.g. CI also need its "adev->virt.caps" with flag of "AMDGPU_PASSTHROUGH_MODE"
BR Monk
发件人: amd-gfx
Hi Xiangliang
please change as below accordingly:
1, call "vi_detect_hw_virtualization" in vi_set_ip_blocks directly
2, drop below changes:
+ if (amdgpu_sriov_vf(adev)) {
+ amdgpu_ip_block_add(adev, _common_ip_block);
+ amdgpu_ip_block_add(adev,
Reviewed-by: Monk Liu <monk@amd.com>
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Xiangliang Yu
<xiangliang...@amd.com>
发送时间: 2017年1月9日 13:05:53
收件人: amd-gfx@lists.freedesktop.org
抄送: Yu, Xiangliang
主题: [V2 1/2] drm/amdgpu/vi: m
RB as well
发件人: amd-gfx 代表 Xiangliang Yu
发送时间: 2017年1月9日 13:06:07
收件人: amd-gfx@lists.freedesktop.org
抄送: Yu, Xiangliang
主题: [V2 2/2] drm/amdgpu: remove detect_hw_virtualization interface
Call
important anyway.
BR Monk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Christian König
<deathsim...@vodafone.de>
发送时间: 2017年1月10日 17:51:46
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: 答复: [PATCH 2/7] drm/amdgpu:new field members f
Yeah, make sense
thanks
BR Monk
发件人: Nils Wallménius <nils.wallmen...@gmail.com>
发送时间: 2017年1月10日 15:56:36
收件人: Liu, Monk
抄送: amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 6/7] drm/amdgpu:alloc/dealloc csa accordingly
Hi Monk, a comment below.
Den
: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Xiangliang Yu
<xiangliang...@amd.com>
发送时间: 2017年1月10日 18:00:50
收件人: amd-gfx@lists.freedesktop.org
抄送: Yu, Xiangliang; Liu, Monk
主题: [V2 11/11] drm/amdgpu: do not reset gpu for virtualization
Current job timeout settin
nually
call "amdgpu_vm_bo_map" as well as "amdgpu_vm_bo_update" in sequence in
"amdgpu_vm_bo_update" ?
BR Monk
发件人: Christian König <deathsim...@vodafone.de>
发送时间: 2017年1月10日 17:44:21
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主
the current IB's context (that's
why need do mapping for each virtual memory on CSA)
BR Monk
发件人: Alex Deucher <alexdeuc...@gmail.com>
发送时间: 2016年12月20日 7:20:09
收件人: Yu, Xiangliang
抄送: amd-gfx list; dl.SRDC_SW_GPUVirtualization; Liu, Monk
主题: Re: [PATCH 11/23] drm/
)
BR Monk
发件人: Alex Deucher <alexdeuc...@gmail.com>
发送时间: 2016年12月20日 7:37:06
收件人: Yu, Xiangliang
抄送: amd-gfx list; dl.SRDC_SW_GPUVirtualization; Min, Frank; Liu, Monk
主题: Re: [PATCH 21/23] drm/amdgpu: change golden register program sequence of
virtuali
something
BR Monk
发件人: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> 代表 Christian König
<deathsim...@vodafone.de>
发送时间: 2016年12月19日 19:17:38
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: 转发: [PATCH 02/23] drm/amdgpu: add kiq into compiling
- r = vi_set_ip_blocks(adev);
detect_sriov(adev);
if (amdgpu_sriov_vf(adev))
+ adev->flags |= AMD_IS_VF;
if (adev->flags & AMD_IS_VF)
+ r = amd_xgpu_set_ip_blocks(adev);
+
Sorry, NAK for the KIQ implement patches.
KIQ is just another compute queue, and each generation of compute queue
initialization is different, so there is no need of a amdgpu_kiq.c file to
cover the function of kiq,
Kiq is good enough to be in each gfx_x_x.c file .e.g :
KIQ for VI is in
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