This patchset solves some coding style issues on dc_link for readability
and cleaning up warnings. Change suggested by checkpatch.pl.
Melissa Wen (2):
drm/amd/display: dc_link: code clean up on enable_link_dp function
drm/amd/display: dc_link: code clean up on detect_dp function
drivers
Removes codestyle issues on detect_dp function as suggested by
checkpatch.pl.
CHECK: Lines should not end with a '('
WARNING: Missing a blank line after declarations
WARNING: line over 80 characters
CHECK: Alignment should match open parenthesis
Signed-off-by: Melissa Wen
---
drivers/gpu/drm
follow close brace '}'
CHECK: Comparison to NULL could be written
"link->preferred_training_settings.fec_enable"
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 32 +--
1 file changed, 16 insertions(+), 16 deletions(-)
diff --
follow close brace '}'
CHECK: Comparison to NULL could be written
"link->preferred_training_settings.fec_enable"
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 29 +--
1 file changed, 14 insertions(+), 15 deletions(-)
diff --
This patchset solves some coding style issues on dc_link for readability
and cleaning up warnings. Change suggested by checkpatch.pl.
Changes in v2:
- Apply patches to the right amdgpu repository.
- Remove unnecessary {} added in the previous version.
Melissa Wen (2):
drm/amd/display: dc_link
Removes codestyle issues on detect_dp function as suggested by
checkpatch.pl.
CHECK: Lines should not end with a '('
WARNING: Missing a blank line after declarations
WARNING: line over 80 characters
CHECK: Alignment should match open parenthesis
Signed-off-by: Melissa Wen
---
drivers/gpu/drm
The dpp2_get_optimal_number_of_taps function is never used. Removing just for
code cleaning up.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 78 ---
1 file changed, 78 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
when you send patches to amdgpu, use
> the following repository:
>
> git://people.freedesktop.org/~agd5f/linux
>
> Could you prepare a V2?
Yes.
Thanks for reviewing my patches.
Soon, I will send a V2 with the changes suggested by you.
>
> Thanks!
>
> On 02/26, Melissa
Solve comments alignment problems on dc_link file
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 25 +++
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display
These patches address many code style issues on dc_link for readability
and cleaning up warnings. Change suggested by checkpatch.pl.
Some issues remain and need some minor code refactoring for proper handling.
Melissa Wen (4):
drm/amd/display: cleanup codestyle type BLOCK_COMMENT_STYLE
parenthesis
CHECK: Lines should not end with a '('
WARNING: please, no space before tabs
WARNING: Comparisons should place the constant on the right side of the test
WARNING: braces {} are not necessary for single statement blocks
CHECK: Please don't use multiple blank lines
Signed-off-by: Melissa Wen
: Comparison to NULL could be written
CHECK: Logical continuations should be on the previous line
CHECK: Blank lines aren't necessary after an open brace '{'
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 94 ++-
1 file changed, 50 insertions(+), 44 deletions
->dpcd_caps.sink_count.bits.SINK_COUNT'
CHECK: Unnecessary parentheses around
WARNING: Missing a blank line after declarations
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 130 +-
1 file changed, 62 insertions(+), 68 deletions(-)
diff --
fine.
Reviewed-by: Melissa Wen
> ---
> drivers/gpu/drm/vkms/vkms_drv.c | 8
> drivers/gpu/drm/vkms/vkms_gem.c | 13 +
> 2 files changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/drivers/gpu/drm/vkms/vkms_drv.c
&
l to convert.
>
> Signed-off-by: Thomas Zimmermann
Thanks here again.
This drv file is little tumultuous to me.
I mean, I took a while to sort functions in my head.
However, finally, I got it, and the change looks good.
Reviewed-by: Melissa Wen
> ---
> drivers/gpu/
, could you test this patch and review
> it? Remember to add your Tested-by when you finish.
>
Hi,
I've applied the patch series, ran some tests on vkms, and found no
issues. I mean, things have remained stable.
Tested-by: Melissa Wen
> Thanks
>
> On 07/07, Daniel Vetter wrote:
&g
Hi,
On 07/14, Daniel Vetter wrote:
> On Tue, Jul 14, 2020 at 11:57 AM Melissa Wen wrote:
> >
> > On 07/12, Rodrigo Siqueira wrote:
> > > Hi,
> > >
> > > Everything looks fine to me, I just noticed that the amdgpu patches did
> > > not apply
On 06/25, Thomas Zimmermann wrote:
> The field drm_device.irq_enabled is only used by legacy drivers
> with userspace modesetting. Don't set it in vkms.
>
> Signed-off-by: Thomas Zimmermann
> Reviewed-by: Laurent Pinchart
I've also checked here, lgtm.
Reviewed-
- dcn31x_update_bw_bounding_box() functions
- dcn31_calculate_wm_and_dlg_fp()
Also, it adds dc_assert_fp_enabled() in public dml-fpu functions, as required,
and I've checked if their calls are properly wrapped by DC_FP_START/END (and
removed when inside dml/fpu files too).
Melissa Wen (3):
drm/amd/dicplay: move FPU
Moves related structs and dcn315_update_bw_bounding_box from dcn315
driver code to dml/dcn31_fpu that centralizes FPU code for DCN 3.1x.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn315/Makefile| 26 --
.../amd/display/dc/dcn315/dcn315_resource.c | 232
()
- dcn31_update_bw_bounding_box()
adding dc_assert_fp_enabled to them and drop DC_FP_START/END inside
functions that was moved to dml folder, as required.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/dcn31/Makefile | 26 --
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 355 +--
.../drm
Moves FPU-related structs and dcn316_update_bw_bounding_box from dcn316
driver to dml/dcn31 that centralize FPU operations for DCN 3.1x
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn316/Makefile| 26 --
.../amd/display/dc/dcn316/dcn316_resource.c | 231
dcn20_fpu_adjust_dppclk(): adjust operation on RequiredDPPCLK
that is a double.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/dcn20/Makefile | 25 -
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 1370 +---
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 30 +-
.../drm/amd
) functions that require FPU access`
Also, there isn't a dcn10_fpu in dml/dcn10 folder, therefore, I create
related files to isolate FPU structs there.
This patchset depends on previous patch to isolate FPU code from dcn20
driver: https://patchwork.freedesktop.org/series/100487/
Melissa Wen (2
in dcn20_fpu.
Reuse dcn20_fpu_adjust_dppclk() in dcn21_fast_validate_bw() as it isolates
the same FPU operation.
Include dchubbub.h as it is required in dcn21_populate_dml_pipes_from_context()
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/dcn21/Makefile | 25 -
.../drm/amd/display
-by: Melissa Wen
---
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 62 -
.../drm/amd/display/dc/dcn10/dcn10_resource.h | 4 +
drivers/gpu/drm/amd/display/dc/dml/Makefile | 2 +
.../drm/amd/display/dc/dml/dcn10/dcn10_fpu.c | 124 ++
.../drm/amd/display/dc/dml/dcn10
On 02/23, Rodrigo Siqueira Jordao wrote:
>
>
> On 2022-02-21 06:31, Melissa Wen wrote:
> > Move parts of dcn20 code that uses FPU to dml folder. It aims to isolate
> > FPU operations as described by series:
> >
> > drm/amd/display: Introduce
-by: Melissa Wen
---
drivers/gpu/drm/amd/display/dc/dcn20/Makefile | 25 -
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 1370 +---
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 30 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c |2 +
.../drm/amd/display/dc/dcn30
e
concepts?
Thanks,
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/g
, as required.
Signed-off-by: Melissa Wen
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 10 --
.../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 2 ++
.../gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c | 14 --
.../gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 2 --
4
dth
in dcn10 - that calls dcn_validate_bandwidth and wraps with DC_FP_*
accordingly. The second patch removes invocations of DC_FP_* from dml
files and properly wraps FPU functions in dc code outside dml folder.
Melissa Wen (2):
drm/amd/display: detach fpu operations from dcn10_validate_bandwi
function with DC_FP_* macro.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 14 ++
.../gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c | 5 +
drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h | 2 +-
3 files changed, 16 insertions(+), 5 deletions
able.
>
> >> Adding FPU protection avoids context switch and probable loss of vba
> >> context as there is potential contention while drm debug logs are enabled.
> >>
> >> Signed-off-by: CHANDAN VURDIGERE NATARAJ
> >>
> >>
> >> diff -
On 03/30, Rodrigo Siqueira Jordao wrote:
>
>
> On 2022-03-26 16:24, Melissa Wen wrote:
> > From FPU documentation, developers must not use DC_FP_START/END in dml
> > files, but invoke it when calling FPU-associated functions (isolated in
> > dml folder). Therefo
t's wrap their calls properly.
Note: this patch complements the fix from [1].
[1]
https://lore.kernel.org/amd-gfx/20220329082957.1662655-1-chandan.vurdigerenata...@amd.com/
Signed-off-by: Melissa Wen
---
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 25 +--
.../drm/amd/disp
On 03/28, Simon Ser wrote:
> Thanks a lot for you patch! I've noticed as well that amdgpu ignores
> the plane alpha property [1]. I'll try to find time to test it.
Hi Simon,
So you've faced this kind of issue many times :/
Let me know the results from your side, so we can use it to find the
On 03/28, Christian König wrote:
> Am 26.03.22 um 21:24 schrieb Melissa Wen:
> > dcn10_validate_bandwidth is only used on dcn10 files, but is declared in
> > dcn_calcs files. Rename dcn10_* to dcn_* in calcs, remove DC_FP_* wrapper
> > inside DML folder a
On 03/28, Kazlauskas, Nicholas wrote:
> [AMD Official Use Only]
>
> > -Original Message-
> > From: Melissa Wen
> > Sent: Friday, March 25, 2022 4:45 PM
> > To: amd-gfx@lists.freedesktop.org; Wentland, Harry
> > ; Deucher, Alexander
> > ; Si
On 03/28, Melissa Wen wrote:
> On 03/28, Kazlauskas, Nicholas wrote:
> > [AMD Official Use Only]
> >
> > > -Original Message-----
> > > From: Melissa Wen
> > > Sent: Friday, March 25, 2022 4:45 PM
> > > To: amd-gfx@lists.freedesk
* correct the logical ordering for combined global gain (Nicholas)
* apply to dcn10 too (Nicholas)
Signed-off-by: Melissa Wen
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 14 +-
2 files changed, 18 inserti
Color caps changed between HW versions which caused DCN10 color state
sections on DTN log no longer fit DCN3.0 versions. Create a
DCN3.0-specific color state logging and hook it to drivers of DCN3.0
family.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5
...@igalia.com/
[2] https://github.com/ValveSoftware/gamescope
Melissa Wen (5):
drm/amd/display: detach color state from hw state logging
drm/amd/display: fill up DCN3 DPP color state
drm/amd/display: create DCN3-specific log for MPC state
drm/amd/display: hook DCN30 color state logging to DTN log
Prepare to hook color state logging according to DCN version.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 27 +--
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b
Logging DCN3 MPC state was following DCN1 implementation that doesn't
consider new DCN3 MPC color blocks. Create new elements according to
DCN3 MPC color caps and a new DCN3-specific function for reading MPC
data.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 55
DCN3 DPP color state was uncollected and some state elements from DCN1
doesn't fit DCN3. Create new elements according to DCN3 color caps and
fill them up for DTN log output.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 28 +--
drivers/gpu/drm
Add color caps information for DPP and MPC block to show HW color caps.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 23 +++
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 23 +++
2 files changed, 46 insertions(+)
diff --git
On 09/05, Melissa Wen wrote:
> Hi,
>
> I'm updating the color state part of DTN log to match DCN3.0 HW better.
> Currently, the DTN log considers the DCN10 color pipeline, which is
> useless for DCN3.0 because of all the differences in color caps between
> DCN versions. In add
: 96b020e2163f ("drm/amd/display: check attr flag before set cursor
degamma on DCN3+")
Signed-off-by: Melissa Wen
---
Hi,
It seems that the previous color fix for atomic API brought out a
difference in behavior of degamma color blocks between DCN2 and DCN3, as
reported in the link.
AFAIU
-by: Melissa Wen
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 +
.../gpu/drm/amd/display/dc/core/dc_resource.c | 69 ++-
drivers/gpu/drm/amd/display/dc/dc_stream.h| 1 +
3 files changed, 54 insertions(+), 48 deletions(-)
diff --git
Hi,
The first version of this series from Joshua [1] was accepted, but never
merged upstream.
During this time, Guilherme reported issues when performing GPU reset
that point to this work, and I identified the need to mark CRTC state for
reset when the property differs between states.
In this
From: Joshua Ashton
This was never filled in and thus never truly used.
Checking the EDID for content_type support is not required for sending
the avi infoframe packet.
v2:
- rebase to amd-staging-drm-next
Reviewed-by: Melissa Wen
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
://github.com/ValveSoftware/gamescope
Melissa Wen (5):
drm/amd/display: detach color state from hw state logging
drm/amd/display: fill up DCN3 DPP color state
drm/amd/display: create DCN3-specific log for MPC state
drm/amd/display: hook DCN30 color state logging to DTN log
drm/amd/display: add
DCN3 DPP color state was uncollected and some state elements from DCN1
doesn't fit DCN3. Create new elements according to DCN3 color caps and
fill them up for DTN log output.
rfc-v2:
- fix reading of gamcor and blnd gamma states
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn30
Add color caps information for DPP and MPC block to show HW color caps.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 23 +++
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 23 +++
2 files changed, 46 insertions(+)
diff --git
Color caps changed between HW versions which caused DCN10 color state
sections on DTN log no longer fit DCN3.0 versions. Create a
DCN3.0-specific color state logging and hook it to drivers of DCN3.0
family.
rfc-v2:
- detail RAM mode for gamcor and blnd gamma blocks
Signed-off-by: Melissa Wen
Logging DCN3 MPC state was following DCN1 implementation that doesn't
consider new DCN3 MPC color blocks. Create new elements according to
DCN3 MPC color caps and a new DCN3-specific function for reading MPC
data.
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 55
Prepare to hook color state logging according to DCN version.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 27 +--
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b
On 09/06, Harry Wentland wrote:
> On 2023-08-10 12:02, Melissa Wen wrote:
> > Hi all,
> >
> > Here is the next version of our work to enable AMD driver-specific color
> > management properties [1][2]. This series is a collection of
> > contributions from Joshua,
/-/issues/2803
Fixes: 96b020e2163f ("drm/amd/display: check attr flag before set cursor
degamma on DCN3+")
Signed-off-by: Melissa Wen
---
v2: cc'ing stable
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/a
On 09/07, Pekka Paalanen wrote:
> On Wed, 6 Sep 2023 15:30:04 -0400
> Harry Wentland wrote:
>
> > On 2023-08-10 12:02, Melissa Wen wrote:
> > > Add 3D LUT property for plane gamma correction using a 3D lookup table.
> > > Since a 3D LUT has a limited number of
On 09/06, Harry Wentland wrote:
> On 2023-08-10 12:02, Melissa Wen wrote:
> > On AMD HW, 3D LUT always assumes a preceding shaper 1D LUT used for
> > delinearizing and/or normalizing the color space before applying a 3D
> > LUT. Add pre-defined transfer function to enable
On 09/06, Harry Wentland wrote:
>
>
> On 2023-08-10 12:03, Melissa Wen wrote:
> > From: Joshua Ashton
> >
> > Need to funnel the color caps through to these functions so it can check
> > that the hardware is capable.
> >
> > v2:
> > - remo
On 09/06, Harry Wentland wrote:
>
>
> On 2023-08-25 10:18, Melissa Wen wrote:
> > On 08/22, Pekka Paalanen wrote:
> >> On Thu, 10 Aug 2023 15:02:47 -0100
> >> Melissa Wen wrote:
> >>
> >>> Instead of relying on color block names to get th
On 09/06, Harry Wentland wrote:
> On 2023-08-10 12:02, Melissa Wen wrote:
> > From: Harry Wentland
> >
> > The region and segment calculation was incapable of dealing
> > with regions of more than 16 segments. We first fix this.
> >
> > Now that we can su
On 09/06, Harry Wentland wrote:
>
>
> On 2023-08-10 12:03, Melissa Wen wrote:
> > Plane CTM for pre-blending color space conversion. Only enable
> > driver-specific plane CTM property on drivers that support both pre- and
> > post-blending gamut remap matrix, i.
On 09/06, Harry Wentland wrote:
>
>
> On 2023-08-10 12:03, Melissa Wen wrote:
> > Map the plane CTM driver-specific property to DC plane, instead of DC
> > stream. The remaining steps to program DPP block are already implemented
> > on DC shared-code.
> >
On 10/06, Sebastian Wick wrote:
> On Thu, Oct 05, 2023 at 04:14:55PM -0100, Melissa Wen wrote:
> > Hello,
> >
> > Just another iteration for AMD driver-specific color properties.
> > Basically, addressing comments from the previous version.
> >
> > Rec
On 10/06, Sebastian Wick wrote:
> On Thu, Oct 05, 2023 at 04:15:04PM -0100, Melissa Wen wrote:
> > Add 3D LUT property for plane color transformations using a 3D lookup
> > table. 3D LUT allows for highly accurate and complex color
> > transformations and is suitable to adjus
On 11/02, Joshua Ashton wrote:
>
>
> On 10/5/23 18:15, Melissa Wen wrote:
> > Add 3D LUT property for plane color transformations using a 3D lookup
> > table. 3D LUT allows for highly accurate and complex color
> > transformations and is suitable to adjust the balance
for
debugging the issue.
BR,
Melissa
>
> Thanks
>
> - Joshie ✨
>
> On 11/2/23 03:48, Joshua Ashton wrote:
> >
> >
> > On 10/5/23 18:15, Melissa Wen wrote:
> > > Add 3D LUT property for plane color transformations using a 3D lookup
&g
-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index d03bdb010e8b..14f9c02539c6 100644
to identity (Pekka)
- define the right TFs for BT.709 (Pekka and Harry)
- add comment about AMD TF coefficients
Suggested-by: Harry Wentland
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 27 +---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 67
-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 5 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 19 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 21 +++
.../amd
ontent, pass in
(203.0 / 80.0).
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 14 ++
.../drm/amd/display/amd
(Harry)
- replace BT709 EOTF by inv OETF
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 21
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 +++
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 29 +
.../amd/display/amdgpu_dm
out TF+LUT behavior in the commit and comments (Harry)
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 22
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 21
and another 1D
LUT after 3D LUT (blend) to linearize content again for blending. The
next patches add these 1D LUTs to the plane color mgmt pipeline.
v3:
- improve commit message about 3D LUT
- describe the 3D LUT entries and size (Harry)
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd
and comments (Harry)
Co-developed-by: Joshua Ashton
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 7 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 8 +++
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 7 ++
.../amd/display
Describe some expected behavior of the AMD DM color mgmt programming.
Reviewed-by: Harry Wentland
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display
if regamma TF differs between states (Joshua)
- map inverse EOTF to DC transfer function (Melissa)
v3:
- update AMDGPU TF list
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
From: Joshua Ashton
Otherwise this is just initialized to 0. This needs to actually have a
value so that compute_curve can work for PQ EOTF.
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display
property.
Reviewed-by: Harry Wentland
Reviewed-by: Simon Ser
Signed-off-by: Melissa Wen
---
include/drm/drm_mode_object.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm_mode_object.h b/include/drm/drm_mode_object.h
index 912f1e415685..08d7a7f0188f 100644
: allow newer DC hardware to use degamma ROM for PQ/HLG
drm/amd/display: copy 3D LUT settings from crtc state to stream_update
drm/amd/display: Add 3x4 CTM support for plane CTM
Melissa Wen (18):
drm/drm_mode_object: increase max objects to accommodate new color
props
drm/drm_property
Place it in drm_property where drm_property_replace_blob and
drm_property_lookup_blob live. Then we can use the DRM helper for
driver-specific KMS properties too.
Reviewed-by: Harry Wentland
Reviewed-by: Liviu Dudau
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/arm/malidp_crtc.c | 2
-by: Harry Wentland
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/drm_atomic.c | 1 +
drivers/gpu/drm/drm_atomic_state_helper.c | 1 +
include/drm/drm_plane.h | 7 +++
3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm
prop description
- move private color operations from amdgpu_display to amdgpu_dm_color
Reviewed-by: Harry Wentland
Co-developed-by: Joshua Ashton
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 11 +++
.../gpu/drm/amd/display
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 20 +++
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm
Plane CTM for pre-blending color space conversion. Only enable
driver-specific plane CTM property on drivers that support both pre- and
post-blending gamut remap matrix, i.e., DCN3+ family. Otherwise it
conflits with DRM CRTC CTM property.
Reviewed-by: Harry Wentland
Signed-off-by: Melissa Wen
combinations.
Reviewed-by: Harry Wentland
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 59 +--
1 file changed, 41 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display
LUT programming and better understand each
step, detach atomic regamma programming from the crtc colocr updating
code.
Reviewed-by: Harry Wentland
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 53 ---
1 file changed, 34 insertions(+), 19 deletions
return -EINVAL
if we don't have plane degamma settings, so we can continue and check
CRTC degamma.
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index
From: Joshua Ashton
We should reset a plane state if at least one of the color management
properties differs from old and new state.
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Co-developed-by: Melissa Wen
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm
From: Joshua Ashton
Detach value translation from CTM to reuse it for programming HDR
multiplier property.
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 8 +---
drivers/gpu/drm/amd/display
set_color_properties (Harry)
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 29 ---
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display
Enable usage of predefined transfer func in addition to shaper 1D LUT.
That means we can save some complexity by just setting a predefined
curve, instead of programming a custom curve when preparing color space
for applying 3D LUT.
Reviewed-by: Harry Wentland
Signed-off-by: Melissa Wen
From: Joshua Ashton
Create drm_color_ctm_3x4 to support 3x4-dimension plane CTM matrix and
convert DRM CTM to DC CSC float matrix.
v3:
- rename ctm2 to ctm_3x4 (Harry)
Signed-off-by: Joshua Ashton
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 28 +--
Map the plane CTM driver-specific property to DC plane, instead of DC
stream. The remaining steps to program DPP block are already implemented
on DC shared-code.
v3:
- fix comment about plane and CRTC CTMs priorities (Harry)
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm
module to fill parameters when setting non-linear TF with empty LUT.
v2:
- rename DRM TFs to AMDGPU TFs
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 55
From: Joshua Ashton
With `dc_fixpt_from_s3132()` translation, we can just use it to set
hdr_mult.
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
drivers/gpu/drm/amd/display/amdgpu_dm
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