sta...@vger.kernel.org
Reviewed-by: Charlene Liu
Signed-off-by: Yihan Zhu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c
b/drivers/gpu/drm/amd/display/dc/dml2/dml2_poli
when compared to the current dc_state,
triggering a dsc recompute that should not have happened.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Fangzhi Zuo
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
1 file changed, 1 insertion(+), 1
actually change.
Reviewed-by: Dillon Varone
Signed-off-by: Joshua Aberback
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 45 ---
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 -
3
From: Samson Tam
[Why & How]
Fix static analysis warnings in SPL library
Reviewed-by: Alvin Lee
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/spl/dc_spl_types.h | 4 +--
.../gpu/drm/amd/display/dc/spl/spl_debug.h
From: Leo Li
[Why]
There are more IPS modes other than DMUB_IPS_ENABLE that enables IPS. We
need to enable the hotplug detect idle workqueue for those modes as
well.
[How]
Modify the if condition to initialize the workqueue in all IPS modes
except for DMUB_IPS_DISABLE_ALL.
Fixes: 514fd3e75d90
From: Charlene Liu
[why]
set dispclk to 0 cause stability issue.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/resource/dcn351
instead of context.
Use pipe from current_state instead of context. This assumes that
pipe in the current_state is an OTG_MASTER pipe if the pipe in the context is
an OTG_MASTER pipe.
Reviewed-by: Dillon Varone
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display
le ID supported platform receives no
reply from a DMUB cable id query.
Reviewed-by: Wenjing Liu
Reviewed-by: Ovidiu Bunea
Signed-off-by: Michael Strauss
Signed-off-by: Aurabindo Pillai
---
.../dc/link/protocols/link_dp_capability.c| 22 ++-
1 file changed, 16 insertions(
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 2 ++
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 17 +
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 11 +--
.../gpu/drm/amd/display/dc/hwss/hw_sequencer.h | 4
4 files
functions that can be used to determine power level:
-get power profile after a dc_state has undergone full validation
Reviewed-by: Aric Cyr
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 9 -
.../dml21/src/dml2_pmo
sta...@vger.kernel.org
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 ++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 4
drivers/gpu/drm/amd/display/dc/dc_types.h
egister clock branch will
always be running.
As a consequence, the dynamic power will be higher than expected.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c | 10 --
1 file changed, 4 insert
case.
Restore the optimized pbn value, instead of using the pbn value under minimum
compression.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wayne Lin
Signed-off-by: Fangzhi Zuo
Signed-off-by: Aurabindo Pillai
---
.../amd/display/amdgpu_dm
From: Sung Lee
[WHY]
Triple buffer enablement currently does not work properly
[HOW]
Allow triple buffer enablement to happen properly on
fast updates
Reviewed-by: Aric Cyr
Signed-off-by: Sung Lee
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 23
From: Aric Cyr
Signed-off-by: Aric Cyr
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 6d60f7597f88..51fdc0085935 100644
unlock order.
Indicate which pipes should be unlocked first using
array stored in dc scratch memory.
Pipes indicated in array can be unlocked in any order.
Reviewed-by: Alvin Lee
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 42
ead 3 different
status registers for pending cleared, one specifically for OTG updates,
one specifically for OPTC updates, and the last for surface related
updates.
Reviewed-by: Dillon Varone
Signed-off-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/core/dc_hw_sequencer.c
From: Shunlu Zhang
[WHY]
cm2_params is used to set update_flags.
It's value is not intended to be modified.
[WHAT]
Change the declaration of cm2_params to be a constant variable
Reviewed-by: Tao Huang
Reviewed-by: Ariel Bernstein
Signed-off-by: Shunlu Zhang
Signed-off-by: Aurabindo P
DC 3.2.302 contains some improvements as summarized below:
* Stability fixes in DML, SPL,
* Improvements for MST, DSC, eDP, IPS, HDR
* Fix clock gating on DCN35
* Fixes from static analysis checks
* Other bug fixes and debug improvements
___
Alex Hung (1):
drm/amd/display: Add HDR workaround fo
: Nicholas Kazlauskas
Signed-off-by: Zhongwei
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h
from PWM
to nits or vice versa.
[How]
Added backlight_level_params struct and modified existing functions to
include the new structure.
Reviewed-by: Harry Vanzylldejong
Signed-off-by: Kaitlyn Tse
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 5
From: Samson Tam
[Why & How]
When integer scaling is enabled, set taps to 1 and disable adaptive
scaler and sharpener.
Reviewed-by: Jun Lei
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc_spl_translate.c | 1 +
drivers/gpu/drm/amd/displa
commit
drm/amd/display: Fix Synaptics Cascaded DSC Determination
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Aurabindo Pillai
--
Thanks & Regards,
Aurabindo Pillai
_DISABLE_IPS2_DYNAMIC = 0x2000,
+
+ /**
+* @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time.
+*/
+ DC_FORCE_IPS_ENABLE = 0x4000,
};
enum amd_dpm_forced_level;
Reviewed-by: Aurabindo Pillai
--
Thanks & Regards,
Aurabindo Pillai
From: Aric Cyr
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 272ae1bdc57f..4077c1ddb9c1 100644
dc/{dcn401,dcn303} are unused since the files in it got moved under their
respective new components location. Hence they are no longer necessary
Fixes: fb17441f8ce4 ("drm/amd/display: Refactor DCN3X into component folder")
Signed-off-by: Aurabindo Pillai
Reviewed-by: Leo Li
---
drive
HWSS.
- update_plane_addr should only be public, as it's used outside HWSS.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Joshua Aberback
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 1 -
.../gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq
From: Dillon Varone
The disable fams2 operation was reworked, but some of the old code
remained. This commit removes the disable_fams2_drr from the
dml2_stream_parameters.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Dillon Varone
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dml2
From: Rodrigo Siqueira
Remove some old comments from DCN32/321.
Signed-off-by: Rodrigo Siqueira
Reviewed-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c | 4 ++--
2 files changed, 4 insertions
From: Alex Hung
[WHAT & HOW]
Functions dp_enable_link_phy and dp_disable_link_phy can pass link_res
without initializing hpo_dp_link_enc and it is necessary to check for
null before dereferencing.
This fixes 1 FORWARD_NULL issue reported by Coverity.
Fixes: abdcd93214 ("drm/amd/display: Check l
From: Alex Hung
[WHY & HOW]
dc_link_detect returns a boolean value which can be used to print debug
messages when it fails.
This fixes 1 CHECKED_RETURN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Hung
---
drivers/gpu/drm
DTBCLK and causes
hang.
[how]
For DP2.0 MST hubs, only treat 1st remote sink as an encoder
only when there are multiple displays connected.
Reviewed-by: Michael Strauss
Signed-off-by: Aurabindo Pillai
Signed-off-by: Sung Joon Kim
---
.../amd/display/dc/dml2/dml2_internal_types.h | 1 +
.../display
From: Gabe Teeger
[what & why]
System hang after s4 regression points to code change here.
Removing possible NULL dereference.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Aurabindo Pillai
Signed-off-by: Gabe Te
From: Ilya Bakoulin
[Why/How]
Need to identify which fast updates will update more than just the
address.
Reviewed-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
Signed-off-by: Ilya Bakoulin
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 25 +++-
drivers/gpu/drm/amd
To distinguish between different soc with same DCN IP, use variants
starting with alphabets
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c| 2 +-
.../amd/display/dc/dml2/dml21
Use more accurate names to refer to the asic architecture.
dcn3 in DML actually refers to DCN32 and DCN321, so rename it to dcn32x
dcn4 refers to any DCN4x soc., and hence rename dcn4 to dcn4x
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aurabindo Pillai
From: Hansen Dsouza
[why & how]
Add source select helpers based on DCCG spec
Reviewed-by: Daniel Miess
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 324 ++
1 file changed, 324 insertions(+)
diff --g
From: Austin Zheng
[Why]
Even if the mode is not supported dml2_check_mode_supported() would still
return true.
This causes an unsupported mode to be programmed.
[How]
Check if the mode is supported or not and return the proper result.
Reviewed-by: Chaitanya Dhere
Signed-off-by: Aurabindo
From: Ryan Seto
[Why]
Visual confirm was incorrect on dual monitor SubVP setup
[How]
Adjusted p_state assignment for dual monitor SubVP setup
Signed-off-by: Ryan Seto
Reviewed-by: Chaitanya Dhere
Signed-off-by: Aurabindo Pillai
---
.../dc/dml2/dml21/dml21_translation_helper.c | 13
force EASF coefficients programming
Reviewed-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
Signed-off-by: Samson Tam
---
.../display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 28 +--
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp
From: Hansen Dsouza
[why & how]
Add standard RCG helpers based on DCCG spec
Reviewed-by: Daniel Miess
Reviewed-by: Muhammad Ahmed
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 307 ++
1 file changed,
the
ASSERT if the significance is equal to zero to avoid unnecessary noise.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Chaitanya Dhere
Signed-off-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../dml2/dml21/src/dml2_standalone_libraries
From: Revalla Hari Krishna
[Why]
To refactor HPO files
[How]
Moved hpo related files to specific hpo folder and
update Makefiles.
Reviewed-by: Martin Leung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 2
From: Hansen Dsouza
[why & how]
Add private data types for better RCG control
Reviewed-by: Chris Park
Reviewed-by: Yihan Zhu
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 81 +++
1 file changed
From: Sung Joon Kim
[why & how]
Need to make sure plane_state is initialized
before accessing its members.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Xi (Alex) Liu
Signed-off-by: Aurabindo Pillai
Signed-off-by: Sung Joon Kim
---
drivers/gpu/drm
From: Dillon Varone
[WHY&HOW]
Hardmax message will be retired for dcn4, so this removes it.
Reviewed-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
Signed-off-by: Dillon Varone
---
.../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 44 ++-
drivers/gpu/drm/amd/display/dc/
Wheeler
Alex Hung (2):
drm/amd/display: Add MST debug message when link detection fails
drm/amd/display: Check link_res->hpo_dp_link_enc before using it
Aric Cyr (1):
drm/amd/display: 3.2.293
Aurabindo Pillai (3):
drm/amd/display: rename dcn3/dcn4 to more sound terms
drm/amd/display: ren
9d7
drm/amd/display: fix documentation warnings for mpc.h
--
Thanks & Regards,
Aurabindo Pillai
Reviewed-by: Aurabindo Pillai
On 7/15/24 4:57 PM, roman...@amd.com wrote:
From: Roman Li
[Why]
htmldocs warning:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h: warning:
Function parameter or struct member 'idle_workqueue' not described in
'amdgpu_display_manager'
phen Rothwell
this patch is:
Reviewed-by: Aurabindo Pillai
--
Thanks & Regards,
Aurabindo Pillai
Fixes the warning:
Function parameter or struct member 'bb_from_dmub' not described in
'amdgpu_display_manager'
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a
Increase the KMS minor version to indicate GFX12 DCC support since this
contains a major change in how DCC is managed across IPs like GFX, DCN
etc. This will be used mainly by userspace like Mesa to figure out
DCC support on GFX12 hardware.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm
On 7/10/24 4:12 PM, Marek Olšák wrote:
Can you also increase KMS_DRIVER_MINOR with a proper comment in
amdgpu_drv.c, which will be used by Mesa to tell whether display DCC
is supported on gfx12?
Sure, will do.
--
Thanks & Regards,
Aurabindo Pillai
On 7/10/24 10:49 AM, Marek Olšák wrote:
This will enable display DCC for Wayland because Mesa already exposes
modifiers with DCC. Has it been tested?
Yes, its working for most resolutions. Investigating issue with certain
modes.
Marek
--
Thanks & Regards,
Aurabindo Pillai
To enable mesa to use display dcc, DM should expose them in the
supported modifiers. Add the best (most efficient) modifiers first.
Signed-off-by: Aurabindo Pillai
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 31 +++
1 file changed, 25 insertions(+), 6 deletions(-)
diff
] ? dm_update_plane_state.constprop.0+0x4e3/0x6b0 [amdgpu]
[ 181.850840] amdgpu_dm_atomic_check+0xdfe/0x1760 [amdgpu]
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/resource/dcn20/dcn20_resource.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd
Reviewed-by: Aurabindo Pillai
On 6/26/24 2:31 PM, Marek Olšák wrote:
They were added accidentally.
Signed-off-by: Marek Olšák
---
include/uapi/drm/drm_fourcc.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index
Reviewed-by: Aurabindo Pillai
On 6/26/24 2:31 PM, Marek Olšák wrote:
There were multiple bugs, like checking SWIZZLE_MODE before checking
GFX12_SWIZZLE_MODE, which has undefined behavior.
The function had no effect before (it always returned -EINVAL).
Signed-off-by: Marek Olšák
Reviewed-by: Aurabindo Pillai
On 6/26/24 2:31 PM, Marek Olšák wrote:
Signed-off-by: Marek Olšák
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
ne_fill_gfx9_plane_attributes_from_modifiers(adev, afb, format,
rotation, plane_size,
tiling_info, dcc,
Reviewed-by: Aurabindo Pillai
--
Thanks & Regards,
Aurabindo Pillai
Reviewed-by: Aurabindo Pillai
On 6/26/24 2:31 PM, Marek Olšák wrote:
All this code has undefined behavior on GFX12 and shouldn't be executed.
Signed-off-by: Marek Olšák
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 47 ++-
1 file changed, 25 insertions(+
Reviewed-by: Aurabindo Pillai
On 6/26/24 2:31 PM, Marek Olšák wrote:
Checking SWIZZLE_MODE has undefined behavior on gfx12.
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers
state,
curr_pipe->plane_state);
+ if (!phantom_plane)
+ return;
}
memcpy(&phantom_plane->address, &curr_pipe->plane_state->address, sizeof(phantom_plane->address));
--
--
Thanks & Regards,
Aurabindo Pillai
] ? dm_update_plane_state.constprop.0+0x4e3/0x6b0 [amdgpu]
[ 181.850840] amdgpu_dm_atomic_check+0xdfe/0x1760 [amdgpu]
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/resource/dcn20/dcn20_resource.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers
Add some register offsets that are required for Display DCC on DCN401
Fixes: 000342e3a22 ("drm/amd: Add reg definitions for DCN401 DCC")
Reported-by: Tom St Denis
Signed-off-by: Aurabindo Pillai
---
.../include/asic_reg/dcn/dcn_4_1_0_offset.h| 18 ++
1 file c
Add registers and entry points to enable DCC on DCN4x
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 +
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 11 +
drivers/gpu/drm/amd/display/dc/dc.h | 4 +
.../drm/amd/display/dc/dml2
Add the necessary register definitions to enable DCC on DCN4x
Signed-off-by: Aurabindo Pillai
---
.../include/asic_reg/dcn/dcn_4_1_0_sh_mask.h | 110 ++
1 file changed, 110 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h
b/drivers/gpu
From: Likun Gao
Add support to init TA firmware for psp v14.
Signed-off-by: Likun Gao
---
drivers/gpu/drm/amd/amdgpu/psp_v14_0.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
index cc0248efa6b6..4d33c95
Idle optimizations were disabled due to some bugs which are now fixed in
DMCUB and PM firwmare. Enable these the optimizations back.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c| 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers
This reverts commit 44069f0f9b1fe577c5d4f05fa9eb02db8c618adc since
the code path is called from FPU context, and triggers error like:
[ 26.924055] BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:306
[ 26.924060] in_atomic(): 1, irqs_disabled(): 0, non_block: 0,
we previously assumed 'plane'
could be null (see line 922)
Cc: Tom Chung
Cc: Nicholas Kazlauskas
Cc: Bhawanpreet Lakha
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Hersen Wu
Cc: Alex Hung
Cc: Aurabindo Pillai
Cc: Harry Wentland
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/
From: Rodrigo Siqueira
Signed-off-by: Rodrigo Siqueira
---
.../include/asic_reg/dcn/dcn_4_1_0_offset.h | 51 ++-
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_offset.h
b/drivers/gpu/drm/amd/include/asic_reg/dc
Move creation of CGS device node and the DAL allocation list from
amdgpu_dm_init() to dm_sw_init() which runs before dmub's sw init hook.
This is required for communicating with the VBIOS DMUB image from the
VBIOS that was loaded for early pre-os boot.
Signed-off-by: Aurabindo P
Allocate some memory, send the address in chunks to dmub, and finally
ask it to copy the bounding box data into the newly allocated memory.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 121 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
New commands for enabling copy of DC bounding box values from VBIOS DMUB
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm
All the DC_FP_START/END should be used before call anything from DML2,
for this reason, the use of those guards inside DML it is not correct.
This commit removes two unnecessary DC_FP_START/END from a dml2
function.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu
When ODM slice happens on DCN401, there is a null pointer exception
caused by that. This commit address this issue by checking if the
required data structures are initialized.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
DCN401 is using DCN 320 headers, which does not have all the right
registers for DCN401. This commit just replace DCN320 includes with the
one from DCN410.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c| 4
Drop the extra HPD irq entry for DCN401.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
b
From: Pinninti
[why]
cleaning up the code refactor requires hubp to be in its own component.
[how]
move all files under newly created hubp folder and fixing the makefiles.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Pinninti
---
drivers/gpu/drm/amd/display/dc/dcn401/Makefile | 1 -
From: Rodrigo Siqueira
This commit removes some unused code with the required adjustments.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h | 2 +-
drivers/gpu/drm/amd/display/dc/d
From: Samson Tam
[Why]
Enable sharpener support for DCN401
[How]
- Removed memcmp check that was preventing ISHARP from being enabled.
- Add missing ISHARP register defines, masks, and writes.
- Add programming of Blur and Scale coefficients.
- Program FMT_MODE and NLDELTA registers based on LLS
From: "Arvindekar, Sridevi"
[Why]
Incorrect cursor position calculation in some scenarios. Also for
mirror and rotation cases.
[How]
Fix for incorrect cursor position. Added new test scenarios for diags
cursor test. Updated CRC for few of the diags cursor test scenarios.
Reviewed-by: Rodrigo
Reviewed-by: Aurabindo Pillai
On 5/16/24 3:26 PM, roman...@amd.com wrote:
From: Roman Li
[Why]
Compilation errors while compiling without CONFIG_DRM_AMD_DC_FP:
"undefined reference to `dc_bandwidth_in_kbps_from_timing'"
[How]
Fix Makefile to move dsc files out of DC_F
Reviewed-by: Aurabindo Pillai
On 4/23/24 9:29 PM, Srinivasan Shanmugam wrote:
This commit removes a redundant NULL check in the
`dce110_set_input_transfer_func` function in the `dce110_hwseq.c` file.
The variable `tf` is assigned the address of
`plane_state->in_transfer_func` unconditiona
Enable initializing Display Manager for DCN410 IP
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is
made in DC codebase to use 4.1.0
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is
made in DC codebase to use 4.1.0
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b
Patch has been merged to amd-staging-drm-next.
On 4/28/24 12:09 PM, Aurabindo Pillai wrote:
Thanks for the fix!
Reviewed-by: Aurabindo Pillai
On 4/28/24 8:42 AM, Dan Carpenter wrote:
Smatch complains because some lines are indented more than they should
be. I went a bit crazy re-indenting
Thanks for the fix!
Reviewed-by: Aurabindo Pillai
On 4/28/24 8:42 AM, Dan Carpenter wrote:
Smatch complains because some lines are indented more than they should
be. I went a bit crazy re-indenting this. ;)
The comments were not useful except as a marker of things which are left
to
From: Aric Cyr
Summary:
* Changes across DSC, MST, DMCUB, Panel Replay and misc fixes.
* Fixes to cursor programming sequence
* Add some missing register defs
* Formatting/Sytle fixes
Acked-by: Aurabindo Pillai
Signed-off-by: Aric Cyr
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd
From: Anthony Koo
- Adjust the dmub_fw_boot_options reserved bits to be correct
Acked-by: Aurabindo Pillai
Signed-off-by: Anthony Koo
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
From: Rodrigo Siqueira
The string dp_hdmi_dongle_signature_str already uses u8 but the string
dp_hdmi_dongle_signature_str does not. Just replace uint8_t with u8 for
dp_hdmi_dongle_signature_str.
Reviewed-by: Wenjing Liu
Acked-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
Tested-by
mode set.
Reviewed-by: Jun Lei
Acked-by: Aurabindo Pillai
Signed-off-by: yi-lchen
Tested-by: Daniel Wheeler
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++
.../drm/amd/display/dc/dcn314/dcn314_dccg.c | 12 ++---
.../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 13 +++---
.../
From: Sung Joon Kim
[why & how]
There are potential issues with Z8 and IPS
that need to be addressed and need to add
in missing function pointers.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Aurabindo Pillai
Signed-off-by: Sung Joon Kim
Tested-by: Daniel Wheeler
---
drivers/gpu/drm
From: Cruise
[Why]
Error correction was enabled in a monitor which doesn't support.
[How]
Disable error correction if it's not supported
Reviewed-by: Wenjing Liu
Acked-by: Aurabindo Pillai
Signed-off-by: Cruise
Tested-by: Daniel Wheeler
---
.../display/dc/link/protocols/lin
From: Sung Joon Kim
[why & how]
The recout x offset was incorrect which led to
wrong viewport calculation. For stereo
side-by-side case, the slice index should be
0 for both split pipes.
Reviewed-by: Dmytro Laktyushkin
Acked-by: Aurabindo Pillai
Signed-off-by: Sung Joon Kim
Tested-by: Da
s
first to ensure hubp has the right attributes to be programmed.
Reviewed-by: Agustin Gutierrez
Acked-by: Aurabindo Pillai
Signed-off-by: Harry Wentland
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 2 +-
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_h
ommits.
Reviewed-by: Agustin Gutierrez
Acked-by: Aurabindo Pillai
Signed-off-by: Harry Wentland
Tested-by: Daniel Wheeler
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 6 +-
.../gpu/drm/amd/display/dc/core/dc_stream.c | 87
-by: Chaitanya Dhere
Acked-by: Aurabindo Pillai
Signed-off-by: Joshua Aberback
Tested-by: Daniel Wheeler
---
drivers/gpu/drm/amd/display/dc/core/dc_state.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
b/drivers
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