Re: [PATCH] drm/amdgpu: fix amdgpu_need_full_reset (v2)

[Christian König]

Am 14.10.2016 um 04:29 schrieb zhoucm1:



On 2016年10月14日 05:22, Alex Deucher wrote:

IP types are not an index.  Each asic may have number and
type of IPs.  Properly check the the type rather than
using the type id as an index.

v2: fix all the IPs to not use IP type as an idx as well.

Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org

Reviewed-by: Chunming Zhou 


Reviewed-by: Christian König .

Might also make sense to replace all those special IP handling in the 
common code with flags or something similar.


Regards,
Christian.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 23 
---

  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 17 +
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  | 13 ++---
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 14 ++
  drivers/gpu/drm/amd/amdgpu/tonga_ih.c  | 14 ++
  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c  | 14 +++---
  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c  | 15 +++
  drivers/gpu/drm/amd/include/amd_shared.h   |  2 +-
  9 files changed, 60 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

index 5a99a43..a67a572 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2128,7 +2128,8 @@ static bool amdgpu_check_soft_reset(struct 
amdgpu_device *adev)

  if (!adev->ip_block_status[i].valid)
  continue;
  if (adev->ip_blocks[i].funcs->check_soft_reset)
- adev->ip_blocks[i].funcs->check_soft_reset(adev);
+adev->ip_block_status[i].hang =
+ adev->ip_blocks[i].funcs->check_soft_reset(adev);
  if (adev->ip_block_status[i].hang) {
  DRM_INFO("IP block:%d is hang!\n", i);
  asic_hang = true;
@@ -2157,12 +2158,20 @@ static int amdgpu_pre_soft_reset(struct 
amdgpu_device *adev)

static bool amdgpu_need_full_reset(struct amdgpu_device *adev)
  {
-if (adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang ||
-adev->ip_block_status[AMD_IP_BLOCK_TYPE_SMC].hang ||
-adev->ip_block_status[AMD_IP_BLOCK_TYPE_ACP].hang ||
-adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) {
-DRM_INFO("Some block need full reset!\n");
-return true;
+int i;
+
+for (i = 0; i < adev->num_ip_blocks; i++) {
+if (!adev->ip_block_status[i].valid)
+continue;
+if ((adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) ||
+(adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_SMC) ||
+(adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_ACP) ||
+(adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_DCE)) {
+if (adev->ip_block_status[i].hang) {
+DRM_INFO("Some block need full reset!\n");
+return true;
+}
+}
  }
  return false;
  }
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

index bd0ecf4..15c3833 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -3104,16 +3104,11 @@ static int dce_v10_0_wait_for_idle(void *handle)
  return 0;
  }
  -static int dce_v10_0_check_soft_reset(void *handle)
+static bool dce_v10_0_check_soft_reset(void *handle)
  {
  struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  -if (dce_v10_0_is_display_hung(adev))
-adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = true;
-else
-adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = false;
-
-return 0;
+return dce_v10_0_is_display_hung(adev);
  }
static int dce_v10_0_soft_reset(void *handle)
@@ -3121,9 +3116,6 @@ static int dce_v10_0_soft_reset(void *handle)
  u32 srbm_soft_reset = 0, tmp;
  struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  -if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang)
-return 0;
-
  if (dce_v10_0_is_display_hung(adev))
  srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_DC_MASK;
  diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index ed49e33..6f3996f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5147,7 +5147,7 @@ static int gfx_v8_0_wait_for_idle(void *handle)
  return -ETIMEDOUT;
  }
  -static int gfx_v8_0_check_soft_reset(void *handle)
+static bool gfx_v8_0_check_soft_reset(void *handle)
  {
  struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  u32 grbm_soft_reset = 0, srbm_soft_reset = 0;
@@ -5199,16 +5199,14 @@ static int gfx_v8_0_check_soft_reset(void 
*handle)

  SRBM_SOFT_RESET, SOFT_RESET_SEM, 1);
if (grbm_soft_reset || srbm_soft_reset) {
-

Re: [PATCH] drm/amdgpu: fix amdgpu_need_full_reset (v2)

[zhoucm1]

On 2016年10月14日 05:22, Alex Deucher wrote:

IP types are not an index.  Each asic may have number and
type of IPs.  Properly check the the type rather than
using the type id as an index.

v2: fix all the IPs to not use IP type as an idx as well.

Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org

Reviewed-by: Chunming Zhou 

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 23 ---
  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 17 +
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  | 13 ++---
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 14 ++
  drivers/gpu/drm/amd/amdgpu/tonga_ih.c  | 14 ++
  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c  | 14 +++---
  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c  | 15 +++
  drivers/gpu/drm/amd/include/amd_shared.h   |  2 +-
  9 files changed, 60 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5a99a43..a67a572 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2128,7 +2128,8 @@ static bool amdgpu_check_soft_reset(struct amdgpu_device 
*adev)
if (!adev->ip_block_status[i].valid)
continue;
if (adev->ip_blocks[i].funcs->check_soft_reset)
-   adev->ip_blocks[i].funcs->check_soft_reset(adev);
+   adev->ip_block_status[i].hang =
+   
adev->ip_blocks[i].funcs->check_soft_reset(adev);
if (adev->ip_block_status[i].hang) {
DRM_INFO("IP block:%d is hang!\n", i);
asic_hang = true;
@@ -2157,12 +2158,20 @@ static int amdgpu_pre_soft_reset(struct amdgpu_device 
*adev)
  
  static bool amdgpu_need_full_reset(struct amdgpu_device *adev)

  {
-   if (adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_SMC].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_ACP].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) {
-   DRM_INFO("Some block need full reset!\n");
-   return true;
+   int i;
+
+   for (i = 0; i < adev->num_ip_blocks; i++) {
+   if (!adev->ip_block_status[i].valid)
+   continue;
+   if ((adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_SMC) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_ACP) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_DCE)) {
+   if (adev->ip_block_status[i].hang) {
+   DRM_INFO("Some block need full reset!\n");
+   return true;
+   }
+   }
}
return false;
  }
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index bd0ecf4..15c3833 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -3104,16 +3104,11 @@ static int dce_v10_0_wait_for_idle(void *handle)
return 0;
  }
  
-static int dce_v10_0_check_soft_reset(void *handle)

+static bool dce_v10_0_check_soft_reset(void *handle)
  {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  
-	if (dce_v10_0_is_display_hung(adev))

-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = true;
-   else
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = false;
-
-   return 0;
+   return dce_v10_0_is_display_hung(adev);
  }
  
  static int dce_v10_0_soft_reset(void *handle)

@@ -3121,9 +3116,6 @@ static int dce_v10_0_soft_reset(void *handle)
u32 srbm_soft_reset = 0, tmp;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  
-	if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang)

-   return 0;
-
if (dce_v10_0_is_display_hung(adev))
srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_DC_MASK;
  
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index ed49e33..6f3996f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5147,7 +5147,7 @@ static int gfx_v8_0_wait_for_idle(void *handle)
return -ETIMEDOUT;
  }
  
-static int gfx_v8_0_check_soft_reset(void *handle)

+static bool gfx_v8_0_check_soft_reset(void *handle)
  {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
u32 grbm_soft_reset = 0, srbm_soft_reset = 0;
@@ -5199,16 +5199,14 @@ static int gfx_v8_0_check_soft_reset(void *handle)
SRBM_SOFT_RESET, 
SOFT_RESET_SEM, 1);
 

[PATCH] drm/amdgpu: fix amdgpu_need_full_reset (v2)

[Alex Deucher]

IP types are not an index.  Each asic may have number and
type of IPs.  Properly check the the type rather than
using the type id as an index.

v2: fix all the IPs to not use IP type as an idx as well.

Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 23 ---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 17 +
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  | 13 ++---
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 14 ++
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c  | 14 ++
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c  | 14 +++---
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c  | 15 +++
 drivers/gpu/drm/amd/include/amd_shared.h   |  2 +-
 9 files changed, 60 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5a99a43..a67a572 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2128,7 +2128,8 @@ static bool amdgpu_check_soft_reset(struct amdgpu_device 
*adev)
if (!adev->ip_block_status[i].valid)
continue;
if (adev->ip_blocks[i].funcs->check_soft_reset)
-   adev->ip_blocks[i].funcs->check_soft_reset(adev);
+   adev->ip_block_status[i].hang =
+   
adev->ip_blocks[i].funcs->check_soft_reset(adev);
if (adev->ip_block_status[i].hang) {
DRM_INFO("IP block:%d is hang!\n", i);
asic_hang = true;
@@ -2157,12 +2158,20 @@ static int amdgpu_pre_soft_reset(struct amdgpu_device 
*adev)
 
 static bool amdgpu_need_full_reset(struct amdgpu_device *adev)
 {
-   if (adev->ip_block_status[AMD_IP_BLOCK_TYPE_GMC].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_SMC].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_ACP].hang ||
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang) {
-   DRM_INFO("Some block need full reset!\n");
-   return true;
+   int i;
+
+   for (i = 0; i < adev->num_ip_blocks; i++) {
+   if (!adev->ip_block_status[i].valid)
+   continue;
+   if ((adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_SMC) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_ACP) ||
+   (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_DCE)) {
+   if (adev->ip_block_status[i].hang) {
+   DRM_INFO("Some block need full reset!\n");
+   return true;
+   }
+   }
}
return false;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index bd0ecf4..15c3833 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -3104,16 +3104,11 @@ static int dce_v10_0_wait_for_idle(void *handle)
return 0;
 }
 
-static int dce_v10_0_check_soft_reset(void *handle)
+static bool dce_v10_0_check_soft_reset(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-   if (dce_v10_0_is_display_hung(adev))
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = true;
-   else
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang = false;
-
-   return 0;
+   return dce_v10_0_is_display_hung(adev);
 }
 
 static int dce_v10_0_soft_reset(void *handle)
@@ -3121,9 +3116,6 @@ static int dce_v10_0_soft_reset(void *handle)
u32 srbm_soft_reset = 0, tmp;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-   if (!adev->ip_block_status[AMD_IP_BLOCK_TYPE_DCE].hang)
-   return 0;
-
if (dce_v10_0_is_display_hung(adev))
srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_DC_MASK;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ed49e33..6f3996f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5147,7 +5147,7 @@ static int gfx_v8_0_wait_for_idle(void *handle)
return -ETIMEDOUT;
 }
 
-static int gfx_v8_0_check_soft_reset(void *handle)
+static bool gfx_v8_0_check_soft_reset(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
u32 grbm_soft_reset = 0, srbm_soft_reset = 0;
@@ -5199,16 +5199,14 @@ static int gfx_v8_0_check_soft_reset(void *handle)
SRBM_SOFT_RESET, 
SOFT_RESET_SEM, 1);
 
if (grbm_soft_reset || srbm_soft_reset) {
-   adev->ip_block_status[AMD_IP_BLOCK_TYPE_GFX].hang