Hi Alex, This also seems to work on my setup.
Cheers, Tom On 02/02/18 10:23 AM, Alex Deucher wrote:
On Thu, Feb 1, 2018 at 11:52 PM, Rex Zhu <rex....@amd.com> wrote:Change-Id: I2d7663e164ff8eeafe0a4fed99e106b1d130a285 Signed-off-by: Rex Zhu <rex....@amd.com> --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index ba3c7d6..6700839 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -2919,10 +2919,10 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, PHM_PlatformCaps_DisableMclkSwitchingForFrameLock); - disable_mclk_switching = ((1 < info.display_count) || - disable_mclk_switching_for_frame_lock || + disable_mclk_switching = ((1 < info.display_count) && + (disable_mclk_switching_for_frame_lock || smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us) || - (mode_info.refresh_rate > 120)); + (mode_info.refresh_rate > 120)));I think this will break the logic to handle single display over 120 hz and the vblank too short cases. I think you want 1 <= display_count. It might be better to make the logic more clear. How about the attached patch? Alexsclk = smu7_ps->performance_levels[0].engine_clock; mclk = smu7_ps->performance_levels[0].memory_clock; -- 1.9.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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