[PATCH] drm/amd/powerplay: avoid possible buffer overflow

[Young Xiao]

Make sure the clock level enforced is within the allowed
ranges in case PP_SCLK and PP_MCLK.

Signed-off-by: Young Xiao <92siuy...@gmail.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 707cd4b..ae6cbe8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -1836,6 +1836,12 @@ static int vega12_force_clock_level(struct pp_hwmgr 
*hwmgr,
case PP_SCLK:
soft_min_level = mask ? (ffs(mask) - 1) : 0;
soft_max_level = mask ? (fls(mask) - 1) : 0;
+   if (soft_max_level >= data->dpm_table.gfx_table.count) {
+   pr_err("Clock level specified %d is over max allowed 
%d\n",
+   soft_max_level,
+   data->dpm_table.gfx_table.count - 1);
+   return -EINVAL;
+   }
 
data->dpm_table.gfx_table.dpm_state.soft_min_level =

data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;
@@ -1856,6 +1862,12 @@ static int vega12_force_clock_level(struct pp_hwmgr 
*hwmgr,
case PP_MCLK:
soft_min_level = mask ? (ffs(mask) - 1) : 0;
soft_max_level = mask ? (fls(mask) - 1) : 0;
+   if (soft_max_level >= data->dpm_table.gfx_table.count) {
+   pr_err("Clock level specified %d is over max allowed 
%d\n",
+   soft_max_level,
+   data->dpm_table.gfx_table.count - 1);
+   return -EINVAL;
+   }
 
data->dpm_table.mem_table.dpm_state.soft_min_level =

data->dpm_table.mem_table.dpm_levels[soft_min_level].value;
-- 
2.7.4

Re: [PATCH] drm/amd/powerplay: avoid possible buffer overflow

[Alex Deucher]

Reviewed-by: Alex Deucher 

On Mon, Jan 7, 2019 at 9:36 PM Evan Quan  wrote:
>
> Make sure the clock level enforced is within the allowed
> ranges.
>
> Change-Id: If69a8512121c0c94818ab698595502e17569d4c7
> Signed-off-by: Evan Quan 
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 14 ++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index 8f6097c6a02b..c2061d351d04 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -2251,6 +2251,13 @@ static int vega20_force_clock_level(struct pp_hwmgr 
> *hwmgr,
> soft_min_level = mask ? (ffs(mask) - 1) : 0;
> soft_max_level = mask ? (fls(mask) - 1) : 0;
>
> +   if (soft_max_level >= data->dpm_table.gfx_table.count) {
> +   pr_err("Clock level specified %d is over max allowed 
> %d\n",
> +   soft_max_level,
> +   data->dpm_table.gfx_table.count - 1);
> +   return -EINVAL;
> +   }
> +
> data->dpm_table.gfx_table.dpm_state.soft_min_level =
> 
> data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;
> data->dpm_table.gfx_table.dpm_state.soft_max_level =
> @@ -2271,6 +2278,13 @@ static int vega20_force_clock_level(struct pp_hwmgr 
> *hwmgr,
> soft_min_level = mask ? (ffs(mask) - 1) : 0;
> soft_max_level = mask ? (fls(mask) - 1) : 0;
>
> +   if (soft_max_level >= data->dpm_table.mem_table.count) {
> +   pr_err("Clock level specified %d is over max allowed 
> %d\n",
> +   soft_max_level,
> +   data->dpm_table.mem_table.count - 1);
> +   return -EINVAL;
> +   }
> +
> data->dpm_table.mem_table.dpm_state.soft_min_level =
> 
> data->dpm_table.mem_table.dpm_levels[soft_min_level].value;
> data->dpm_table.mem_table.dpm_state.soft_max_level =
> --
> 2.20.1
>
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[PATCH] drm/amd/powerplay: avoid possible buffer overflow

[Evan Quan]

Make sure the clock level enforced is within the allowed
ranges.

Change-Id: If69a8512121c0c94818ab698595502e17569d4c7
Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index 8f6097c6a02b..c2061d351d04 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -2251,6 +2251,13 @@ static int vega20_force_clock_level(struct pp_hwmgr 
*hwmgr,
soft_min_level = mask ? (ffs(mask) - 1) : 0;
soft_max_level = mask ? (fls(mask) - 1) : 0;
 
+   if (soft_max_level >= data->dpm_table.gfx_table.count) {
+   pr_err("Clock level specified %d is over max allowed 
%d\n",
+   soft_max_level,
+   data->dpm_table.gfx_table.count - 1);
+   return -EINVAL;
+   }
+
data->dpm_table.gfx_table.dpm_state.soft_min_level =

data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;
data->dpm_table.gfx_table.dpm_state.soft_max_level =
@@ -2271,6 +2278,13 @@ static int vega20_force_clock_level(struct pp_hwmgr 
*hwmgr,
soft_min_level = mask ? (ffs(mask) - 1) : 0;
soft_max_level = mask ? (fls(mask) - 1) : 0;
 
+   if (soft_max_level >= data->dpm_table.mem_table.count) {
+   pr_err("Clock level specified %d is over max allowed 
%d\n",
+   soft_max_level,
+   data->dpm_table.mem_table.count - 1);
+   return -EINVAL;
+   }
+
data->dpm_table.mem_table.dpm_state.soft_min_level =

data->dpm_table.mem_table.dpm_levels[soft_min_level].value;
data->dpm_table.mem_table.dpm_state.soft_max_level =
-- 
2.20.1

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