Alex Deucher writes:
> On Fri, Dec 21, 2018 at 9:16 AM Liviu Dudau wrote:
>>
>> On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
>> > On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
>> > > I'm not familiar enough with ARM to know if write combining
>> > > is actually
On Fri, Dec 21, 2018 at 9:16 AM Liviu Dudau wrote:
>
> On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
> > On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
> > > I'm not familiar enough with ARM to know if write combining
> > > is actually an architectural limitation or
On Thu, Dec 20, 2018 at 04:36:19PM +0100, Daniel Vetter wrote:
> On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
> > I'm not familiar enough with ARM to know if write combining
> > is actually an architectural limitation or if it's an issue
> > with the PCIe IPs used on various platfo
On Thu, Dec 20, 2018 at 09:56:57AM -0500, Alex Deucher wrote:
> I'm not familiar enough with ARM to know if write combining
> is actually an architectural limitation or if it's an issue
> with the PCIe IPs used on various platforms, but so far
> everyone that has tried to run radeon hardware on
> A
I'm not familiar enough with ARM to know if write combining
is actually an architectural limitation or if it's an issue
with the PCIe IPs used on various platforms, but so far
everyone that has tried to run radeon hardware on
ARM has had to disable it. So let's just make it official.
Signed-off-b
