From: Yongqiang Sun <yongqiang....@amd.com>
Change-Id: Ifcec8c22d0df9434a470e2abc1bc77f503d9c0f7
Signed-off-by: Yongqiang Sun <yongqiang....@amd.com>
Acked-by: Harry Wentland <harry.wentl...@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 55d96656e54b..b0ac94d673c4 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -74,7 +74,8 @@ void dp_enable_link_phy(
if (pipes[i].stream != NULL &&
pipes[i].stream->sink != NULL &&
pipes[i].stream->sink->link == link) {
- if (pipes[i].clock_source->id !=
CLOCK_SOURCE_ID_DP_DTO) {
+ if (pipes[i].clock_source != NULL &&
+ pipes[i].clock_source->id !=
CLOCK_SOURCE_ID_DP_DTO) {
pipes[i].clock_source = dp_cs;
pipes[i].pix_clk_params.requested_pix_clk =
pipes[i].stream->public.timing.pix_clk_khz;
--
2.9.3
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