From: Eryk Brol <eryk.b...@amd.com>
[Why]
In order to ensure that incoming flips are latched and
complete immediately, we need to program the vupdate
interrupt to come during the back porch of each frame.
[How]
Program the vupdate start_line to be in the back porch
like it's done for DCN1.
Signed-off-by: Eryk Brol <eryk.b...@amd.com>
Reviewed-by: Aric Cyr <aric....@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet la...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index e7580e6e0fb6..f9eae47f7be3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1704,13 +1704,10 @@ void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx,
void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx)
{
struct timing_generator *tg = pipe_ctx->stream_res.tg;
- int start_position = get_vupdate_offset_from_vsync(pipe_ctx);
- uint32_t start_line;
+ int start_line = get_vupdate_offset_from_vsync(pipe_ctx);
- if (start_position < 0)
- start_line = pipe_ctx->stream->timing.v_total + start_position
- 1;
- else
- start_line = start_position;
+ if (start_line < 0)
+ start_line = 0;
if (tg->funcs->setup_vertical_interrupt2)
tg->funcs->setup_vertical_interrupt2(tg, start_line);
--
2.20.1
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