From: Michel Dänzer <michel.daen...@amd.com>
Not used with older GPUs.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/drmmode_display.c | 5 +++--
src/radeon_bo_helper.c | 7 ++++---
src/radeon_kms.c | 18 +++++++++++-------
3 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 958532fb6..f99667fb1 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -135,7 +135,7 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
if (!radeon_set_pixmap_bo(pixmap, bo))
goto fail;
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ if (info->surf_man) {
surface = radeon_get_pixmap_surface(pixmap);
if (surface) {
memset(surface, 0, sizeof(struct radeon_surface));
@@ -2301,7 +2301,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int
height)
aligned_height = RADEON_ALIGN(height, drmmode_get_height_align(scrn,
tiling_flags));
screen_size = RADEON_ALIGN(pitch * aligned_height,
RADEON_GPU_PAGE_SIZE);
base_align = 4096;
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
+
+ if (info->surf_man) {
memset(&surface, 0, sizeof(struct radeon_surface));
surface.npix_x = width;
surface.npix_y = height;
diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
index 0366f613b..8245d6247 100644
--- a/src/radeon_bo_helper.c
+++ b/src/radeon_bo_helper.c
@@ -107,9 +107,10 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int
height, int depth,
pitch = RADEON_ALIGN(width, drmmode_get_pitch_align(pScrn, cpp, tiling)) *
cpp;
base_align = drmmode_get_base_align(pScrn, cpp, tiling);
size = RADEON_ALIGN(heighta * pitch, RADEON_GPU_PAGE_SIZE);
- memset(&surface, 0, sizeof(struct radeon_surface));
- if (info->ChipFamily >= CHIP_FAMILY_R600 && info->surf_man) {
+ if (info->surf_man) {
+ memset(&surface, 0, sizeof(struct radeon_surface));
+
if (width) {
surface.npix_x = width;
/* need to align height to 8 for old kernel */
@@ -340,7 +341,7 @@ Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void
*fd_handle,
if (!ret)
goto error;
- if (info->ChipFamily >= CHIP_FAMILY_R600 && info->surf_man) {
+ if (info->surf_man) {
uint32_t tiling_flags;
#ifdef USE_GLAMOR
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 26810e084..861fbf97c 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -2228,7 +2228,16 @@ Bool RADEONScreenInit_KMS(ScreenPtr pScreen, int argc,
char **argv)
if (info->r600_shadow_fb == FALSE)
info->directRenderingEnabled = radeon_dri2_screen_init(pScreen);
- info->surf_man = radeon_surface_manager_new(pRADEONEnt->fd);
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ info->surf_man = radeon_surface_manager_new(pRADEONEnt->fd);
+
+ if (!info->surf_man) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
+ "Failed to initialize surface manager\n");
+ return FALSE;
+ }
+ }
+
if (!info->bufmgr)
info->bufmgr = radeon_bo_manager_gem_ctor(pRADEONEnt->fd);
if (!info->bufmgr) {
@@ -2694,12 +2703,7 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
pitch = RADEON_ALIGN(pScrn->virtualX, drmmode_get_pitch_align(pScrn, cpp,
tiling_flags)) * cpp;
screen_size = RADEON_ALIGN(pScrn->virtualY,
drmmode_get_height_align(pScrn, tiling_flags)) * pitch;
base_align = drmmode_get_base_align(pScrn, cpp, tiling_flags);
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
- if(!info->surf_man) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "failed to initialise surface manager\n");
- return FALSE;
- }
+ if (info->surf_man) {
memset(&surface, 0, sizeof(struct radeon_surface));
surface.npix_x = pScrn->virtualX;
surface.npix_y = pScrn->virtualY;
--
2.18.0
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