RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"
Hi all, Please ignore this patch, the root cause about the sdma hang introduced by sdma wptr polling has been found, will submit another patch. Best Wishes, Emily Deng > -Original Message- > From: Deng, Emily > Sent: Tuesday, March 06, 2018 9:50 AM > To: Deng, Emily <emily.d...@amd.com>; amd-gfx@lists.freedesktop.org > Subject: RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 > wptr for VF" > > Ping > Hi all, > Please help review this, the regression introduced by the commit > 2ffe31deb27579e2f2c9444e01f4d8abf385d145 is gating the sriov sanity test. > > Best Wishes, > Emily Deng > > > > -Original Message- > > From: Emily Deng [mailto:emily.d...@amd.com] > > Sent: Friday, March 02, 2018 11:32 AM > > To: amd-gfx@lists.freedesktop.org > > Cc: Deng, Emily <emily.d...@amd.com> > > Subject: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr > > for VF" > > > > This reverts commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145. > > The sdma wptr poll memomy doesn't have the same efficiency as > > doorbell, and it will make sdma hang when running tests. > > > > Change-Id: I6e334430b309b0c21aa18a08764320c7ff51e353 > > Signed-off-by: Emily Deng <emily.d...@amd.com> > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 - > > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 > --- > > 2 files changed, 8 insertions(+), 20 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > index 102dad3..5dcf98b 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > > @@ -186,7 +186,6 @@ struct amdgpu_ring { > > uint64_teop_gpu_addr; > > u32 doorbell_index; > > booluse_doorbell; > > - booluse_pollmem; > > unsignedwptr_offs; > > unsignedfence_offs; > > uint64_tcurrent_ctx; > > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > > index 521978c..d3fb3ca 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > > @@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct > > amdgpu_ring *ring) > > struct amdgpu_device *adev = ring->adev; > > u32 wptr; > > > > - if (ring->use_doorbell || ring->use_pollmem) { > > + if (ring->use_doorbell) { > > /* XXX check if swapping is necessary on BE */ > > wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; > > } else { > > @@ -380,13 +380,10 @@ static void sdma_v3_0_ring_set_wptr(struct > > amdgpu_ring *ring) > > > > if (ring->use_doorbell) { > > u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > > + > > /* XXX check if swapping is necessary on BE */ > > WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > > WDOORBELL32(ring->doorbell_index, lower_32_bits(ring- > > >wptr) << 2); > > - } else if (ring->use_pollmem) { > > - u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > > - > > - WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > > } else { > > int me = (ring == >adev->sdma.instance[0].ring) ? 0 : 1; > > > > @@ -719,14 +716,10 @@ static int sdma_v3_0_gfx_resume(struct > > amdgpu_device *adev) > > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + > sdma_offsets[i], > >upper_32_bits(wptr_gpu_addr)); > > wptr_poll_cntl = > > RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); > > - if (ring->use_pollmem) > > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > > - > > SDMA0_GFX_RB_WPTR_POLL_CNTL, > > - ENABLE, 1); > > + if (amdgpu_sriov_vf(adev)) > > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1); > > else > > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > > - > > SDMA0_GFX_RB_WPTR_POLL_CNTL, > > - ENABLE, 0); > > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cnt
Re: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"
Acked-by: Alex DeucherFrom: amd-gfx on behalf of Emily Deng Sent: Thursday, March 1, 2018 10:31 PM To: amd-gfx@lists.freedesktop.org Cc: Deng, Emily Subject: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF" This reverts commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145. The sdma wptr poll memomy doesn't have the same efficiency as doorbell, and it will make sdma hang when running tests. Change-Id: I6e334430b309b0c21aa18a08764320c7ff51e353 Signed-off-by: Emily Deng --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 - drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 --- 2 files changed, 8 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 102dad3..5dcf98b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -186,7 +186,6 @@ struct amdgpu_ring { uint64_teop_gpu_addr; u32 doorbell_index; booluse_doorbell; - booluse_pollmem; unsignedwptr_offs; unsignedfence_offs; uint64_tcurrent_ctx; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index 521978c..d3fb3ca 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct amdgpu_ring *ring) struct amdgpu_device *adev = ring->adev; u32 wptr; - if (ring->use_doorbell || ring->use_pollmem) { + if (ring->use_doorbell) { /* XXX check if swapping is necessary on BE */ wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; } else { @@ -380,13 +380,10 @@ static void sdma_v3_0_ring_set_wptr(struct amdgpu_ring *ring) if (ring->use_doorbell) { u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; + /* XXX check if swapping is necessary on BE */ WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr) << 2); - } else if (ring->use_pollmem) { - u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; - - WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); } else { int me = (ring == >adev->sdma.instance[0].ring) ? 0 : 1; @@ -719,14 +716,10 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev) WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i], upper_32_bits(wptr_gpu_addr)); wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); - if (ring->use_pollmem) - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, - SDMA0_GFX_RB_WPTR_POLL_CNTL, - ENABLE, 1); + if (amdgpu_sriov_vf(adev)) + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1); else - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, - SDMA0_GFX_RB_WPTR_POLL_CNTL, - ENABLE, 0); + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 0); WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl); /* enable DMA RB */ @@ -1208,13 +1201,9 @@ static int sdma_v3_0_sw_init(void *handle) for (i = 0; i < adev->sdma.num_instances; i++) { ring = >sdma.instance[i].ring; ring->ring_obj = NULL; - if (!amdgpu_sriov_vf(adev)) { - ring->use_doorbell = true; - ring->doorbell_index = (i == 0) ? - AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1; - } else { - ring->use_pollmem = true; - } + ring->use_doorbell = true; + ring->doorbell_index = (i == 0) ? + AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1; sprintf(ring->name, "sdma%d", i); r = amdgpu_ring_init(adev, ring, 1024, -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list
RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"
Ping Hi all, Please help review this, the regression introduced by the commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145 is gating the sriov sanity test. Best Wishes, Emily Deng > -Original Message- > From: Emily Deng [mailto:emily.d...@amd.com] > Sent: Friday, March 02, 2018 11:32 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deng, Emily> Subject: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr > for VF" > > This reverts commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145. > The sdma wptr poll memomy doesn't have the same efficiency as doorbell, > and it will make sdma hang when running tests. > > Change-Id: I6e334430b309b0c21aa18a08764320c7ff51e353 > Signed-off-by: Emily Deng > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 - > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 --- > 2 files changed, 8 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 102dad3..5dcf98b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -186,7 +186,6 @@ struct amdgpu_ring { > uint64_teop_gpu_addr; > u32 doorbell_index; > booluse_doorbell; > - booluse_pollmem; > unsignedwptr_offs; > unsignedfence_offs; > uint64_tcurrent_ctx; > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > index 521978c..d3fb3ca 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > @@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct > amdgpu_ring *ring) > struct amdgpu_device *adev = ring->adev; > u32 wptr; > > - if (ring->use_doorbell || ring->use_pollmem) { > + if (ring->use_doorbell) { > /* XXX check if swapping is necessary on BE */ > wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; > } else { > @@ -380,13 +380,10 @@ static void sdma_v3_0_ring_set_wptr(struct > amdgpu_ring *ring) > > if (ring->use_doorbell) { > u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > + > /* XXX check if swapping is necessary on BE */ > WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > WDOORBELL32(ring->doorbell_index, lower_32_bits(ring- > >wptr) << 2); > - } else if (ring->use_pollmem) { > - u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > - > - WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > } else { > int me = (ring == >adev->sdma.instance[0].ring) ? 0 : 1; > > @@ -719,14 +716,10 @@ static int sdma_v3_0_gfx_resume(struct > amdgpu_device *adev) > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + > sdma_offsets[i], > upper_32_bits(wptr_gpu_addr)); > wptr_poll_cntl = > RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); > - if (ring->use_pollmem) > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 1); > + if (amdgpu_sriov_vf(adev)) > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1); > else > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 0); > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 0); > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + > sdma_offsets[i], wptr_poll_cntl); > > /* enable DMA RB */ > @@ -1208,13 +1201,9 @@ static int sdma_v3_0_sw_init(void *handle) > for (i = 0; i < adev->sdma.num_instances; i++) { > ring = >sdma.instance[i].ring; > ring->ring_obj = NULL; > - if (!amdgpu_sriov_vf(adev)) { > - ring->use_doorbell = true; > - ring->doorbell_index = (i == 0) ? > - AMDGPU_DOORBELL_sDMA_ENGINE0 : > AMDGPU_DOORBELL_sDMA_ENGINE1; > - } else { > - ring->use_pollmem = true; > - } > + ring->use_doorbell = true; > + ring->doorbell_index = (i == 0) ? > + AMDGPU_DOORBELL_sDMA_ENGINE0 : > AMDGPU_DOORBELL_sDMA_ENGINE1; > > sprintf(ring->name, "sdma%d", i); > r = amdgpu_ring_init(adev, ring, 1024, > -- > 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"
You can tag my RB -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Deng, Emily Sent: 2018年3月5日 18:20 To: Deng, Emily <emily.d...@amd.com>; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF" Ping Hi all, Please help review this, the regression introduced by the commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145 is gating the sriov sanity test. Best Wishes, Emily Deng > -Original Message- > From: Emily Deng [mailto:emily.d...@amd.com] > Sent: Friday, March 02, 2018 11:32 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deng, Emily <emily.d...@amd.com> > Subject: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr > for VF" > > This reverts commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145. > The sdma wptr poll memomy doesn't have the same efficiency as > doorbell, and it will make sdma hang when running tests. > > Change-Id: I6e334430b309b0c21aa18a08764320c7ff51e353 > Signed-off-by: Emily Deng <emily.d...@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 - > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 --- > 2 files changed, 8 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 102dad3..5dcf98b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -186,7 +186,6 @@ struct amdgpu_ring { > uint64_teop_gpu_addr; > u32 doorbell_index; > booluse_doorbell; > - booluse_pollmem; > unsignedwptr_offs; > unsignedfence_offs; > uint64_tcurrent_ctx; > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > index 521978c..d3fb3ca 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > @@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct > amdgpu_ring *ring) > struct amdgpu_device *adev = ring->adev; > u32 wptr; > > - if (ring->use_doorbell || ring->use_pollmem) { > + if (ring->use_doorbell) { > /* XXX check if swapping is necessary on BE */ > wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; > } else { > @@ -380,13 +380,10 @@ static void sdma_v3_0_ring_set_wptr(struct > amdgpu_ring *ring) > > if (ring->use_doorbell) { > u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > + > /* XXX check if swapping is necessary on BE */ > WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > WDOORBELL32(ring->doorbell_index, lower_32_bits(ring- > >wptr) << 2); > - } else if (ring->use_pollmem) { > - u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > - > - WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > } else { > int me = (ring == >adev->sdma.instance[0].ring) ? 0 : 1; > > @@ -719,14 +716,10 @@ static int sdma_v3_0_gfx_resume(struct > amdgpu_device *adev) > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i], > upper_32_bits(wptr_gpu_addr)); > wptr_poll_cntl = > RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); > - if (ring->use_pollmem) > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 1); > + if (amdgpu_sriov_vf(adev)) > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1); > else > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 0); > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 0); > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], > wptr_poll_cntl); > > /* enable DMA RB */ > @@ -1208,13 +1201,9 @@ static int sdma_v3_0_sw_init(void *handle) > for (i = 0; i < adev->sdma.num_instances; i++) { > ring = >sdma.instance[i].ring; > ring->ring_obj = NULL; > - if (!amdgpu_sriov_vf(adev)) { > -
RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"
Ping Hi all, Please help review this, the regression introduced by the commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145 is gating the sriov sanity test. Best Wishes, Emily Deng > -Original Message- > From: Emily Deng [mailto:emily.d...@amd.com] > Sent: Friday, March 02, 2018 11:32 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deng, Emily> Subject: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr > for VF" > > This reverts commit 2ffe31deb27579e2f2c9444e01f4d8abf385d145. > The sdma wptr poll memomy doesn't have the same efficiency as doorbell, > and it will make sdma hang when running tests. > > Change-Id: I6e334430b309b0c21aa18a08764320c7ff51e353 > Signed-off-by: Emily Deng > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 - > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 --- > 2 files changed, 8 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > index 102dad3..5dcf98b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h > @@ -186,7 +186,6 @@ struct amdgpu_ring { > uint64_teop_gpu_addr; > u32 doorbell_index; > booluse_doorbell; > - booluse_pollmem; > unsignedwptr_offs; > unsignedfence_offs; > uint64_tcurrent_ctx; > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > index 521978c..d3fb3ca 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c > @@ -355,7 +355,7 @@ static uint64_t sdma_v3_0_ring_get_wptr(struct > amdgpu_ring *ring) > struct amdgpu_device *adev = ring->adev; > u32 wptr; > > - if (ring->use_doorbell || ring->use_pollmem) { > + if (ring->use_doorbell) { > /* XXX check if swapping is necessary on BE */ > wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; > } else { > @@ -380,13 +380,10 @@ static void sdma_v3_0_ring_set_wptr(struct > amdgpu_ring *ring) > > if (ring->use_doorbell) { > u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > + > /* XXX check if swapping is necessary on BE */ > WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > WDOORBELL32(ring->doorbell_index, lower_32_bits(ring- > >wptr) << 2); > - } else if (ring->use_pollmem) { > - u32 *wb = (u32 *)>wb.wb[ring->wptr_offs]; > - > - WRITE_ONCE(*wb, (lower_32_bits(ring->wptr) << 2)); > } else { > int me = (ring == >adev->sdma.instance[0].ring) ? 0 : 1; > > @@ -719,14 +716,10 @@ static int sdma_v3_0_gfx_resume(struct > amdgpu_device *adev) > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + > sdma_offsets[i], > upper_32_bits(wptr_gpu_addr)); > wptr_poll_cntl = > RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); > - if (ring->use_pollmem) > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 1); > + if (amdgpu_sriov_vf(adev)) > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 1); > else > - wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > - > SDMA0_GFX_RB_WPTR_POLL_CNTL, > -ENABLE, 0); > + wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, > +SDMA0_GFX_RB_WPTR_POLL_CNTL, F32_POLL_ENABLE, 0); > WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + > sdma_offsets[i], wptr_poll_cntl); > > /* enable DMA RB */ > @@ -1208,13 +1201,9 @@ static int sdma_v3_0_sw_init(void *handle) > for (i = 0; i < adev->sdma.num_instances; i++) { > ring = >sdma.instance[i].ring; > ring->ring_obj = NULL; > - if (!amdgpu_sriov_vf(adev)) { > - ring->use_doorbell = true; > - ring->doorbell_index = (i == 0) ? > - AMDGPU_DOORBELL_sDMA_ENGINE0 : > AMDGPU_DOORBELL_sDMA_ENGINE1; > - } else { > - ring->use_pollmem = true; > - } > + ring->use_doorbell = true; > + ring->doorbell_index = (i == 0) ? > + AMDGPU_DOORBELL_sDMA_ENGINE0 : > AMDGPU_DOORBELL_sDMA_ENGINE1; > > sprintf(ring->name, "sdma%d", i); > r = amdgpu_ring_init(adev, ring, 1024, > -- > 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx