Reviewed-by: Leo Liu <leo....@amd.com>
-----Original Message-----
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Zhu,
James
Sent: Monday, December 17, 2018 9:17 AM
To: amd-gfx@lists.freedesktop.org
Cc: jzh...@gmail.com
Subject: [PATCH v2] drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREG
If register value is updating, reset timeout counter.
It improves robustness of SOC15_WAIT_ON_RREG.
Signed-off-by: James Zhu <james....@amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index 958b10a..49c2625 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -49,14 +49,19 @@
#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \
do { \
+ uint32_t old_ = 0; \
uint32_t tmp_ =
RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
uint32_t loop = adev->usec_timeout; \
while ((tmp_ & (mask)) != (expected_value)) { \
- udelay(2); \
+ if (old_ != tmp_) { \
+ loop = adev->usec_timeout; \
+ old_ = tmp_; \
+ } else \
+ udelay(1); \
tmp_ =
RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
loop--; \
if (!loop) { \
- DRM_ERROR("Register(%d) [%s] failed to reach
value 0x%08x != 0x%08x\n", \
+ DRM_WARN("Register(%d) [%s] failed to reach
value 0x%08x != 0x%08x\n", \
inst, #reg, (unsigned)expected_value,
(unsigned)(tmp_ & (mask))); \
ret = -ETIMEDOUT; \
break; \
--
2.7.4
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