[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Le Ma <le...@amd.com>
Regards,
Ma Le
-----Original Message-----
From: Andrey Grodzovsky <andrey.grodzov...@amd.com>
Sent: Thursday, December 12, 2019 4:39 AM
To: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Ma, Le <le...@amd.com>;
Zhang, Hawking <hawking.zh...@amd.com>; Quan, Evan <evan.q...@amd.com>;
Grodzovsky, Andrey <andrey.grodzov...@amd.com>
Subject: [RESEND PATCH 5/5] drm/amdgpu: Switch from system_highpri_wq to
system_unbound_wq
This is to avoid queueing jobs to same CPU during XGMI hive reset because there
is a strict timeline for when the reset commands must reach all the GPUs in the
hive.
Signed-off-by: Andrey Grodzovsky <andrey.grodzov...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index e4089a0..1518565 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3842,7 +3842,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info
*hive,
list_for_each_entry(tmp_adev, device_list_handle,
gmc.xgmi.head) {
/* For XGMI run all resets in parallel to speed up the
process */
if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {
- if (!queue_work(system_highpri_wq,
&tmp_adev->xgmi_reset_work))
+ if (!queue_work(system_unbound_wq,
&tmp_adev->xgmi_reset_work))
r = -EALREADY;
} else
r = amdgpu_asic_reset(tmp_adev);
--
2.7.4
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